From analog to digital circuits

A phenomenological overview

Bogdan Roman

2Outline

• Insulators, conductors and semiconductors• Semiconductor diodes: the p-n junction• The Field Effect Transistor (FET):

– The Junction FET (JFET)

– The Metal Oxide Semiconductor FET (MOSFET)• The MOS Inverter

– Resistive and same MOS type

– Complementary MOS (CMOS) technology• Elementary gates• Flip-flops• Examples

Loosely based on the IA and 3B Engineering dept. courses (Linear Circuits and Devices, Digital Circuits,

Information Processing, Integrated Digital Electronics)

3Insulators and conductors

Mean velocity of electron:

where = mobility

u E

Current given by:

conductivity

resistance

I I ne u A

V ne Au E I V

L Lne

LR

A

Ohm's Law: V

IR

4Semiconductors: Intrinsic silicon

At room temperature, the thermal energy kT ~ 1/40 eV is enough to break a few covalent bonds to produce free electrons. This also leaves holes (i.e. positive net charges left by the broken covalent bond).

Both electrons and holes contribute to current flow.

At low temperatures, silicon is an insulator since there is not enough thermal energy to break the covalent bonds.

5Semiconductors: Extrinsic silicon

hole concentration

hole mobility

-type conductivity

p

p p

p

p pe

when then n pn p

electron concentration

electron mobility

-type conductivity n

n n

n

n ne

6The p-n junction: The diode

Reverse biased diode:

Forward biased diode:

7The Diode (contd.)

Reverse biased diode: Forward biased diode:

8The Junction Field Effect Transistor (JFET)

JFET Interactive (opens browser)

- Proposed by Shockley in 1951

- First made by Teszner in 1958 in France

9Metal Oxide Semiconductor FET (MOSFET)

- First made in 1960 at Bell Laboratories in the USA by Atalla and Kahng.

- Offers extremely high component density in integrated circuits.

- Very high input resistance, low noise, simpler fabrication than bipolar transistors.

MOSFET Interactive (opens browser)

10The NMOS inverter

Resistive load:

-When input is low (0) then T1 is off, hence output goes high (1) (i.e. VDD)

-When VIN = high (1) then T1 conducts (linear region) and brings the output low (0), depending on RL

-High RL = low logic zero and low power consumption but large area on silicon and slow switching => compromise

NMOS load:

- T2 has the gate tied to its drain and is always on (and in saturation). Acts as a pseudo-resistor load.

- Similar operation to the resistive load inverter

- Smaller area on silicon (so easier to manufacture) and faster switching but has a lower high logic voltage (VDD – VT), and high power consumption when input high.

11Complementary MOS (CMOS) inverter

In CMOS technology, the output is clamped to one of the power rails by a conductive (on) device, while the other device serves as a load of effectively infinite resistance (off). This leads to static properties that approximate those of the ideal inverter.

- The PMOS devices is slower (lower mobility of holes) so it has to be larger to compensate. It is also more complex to manufacture.

12NOR and NAND gates

NAND Gate

A

BA·B

NOR Gate

A

BA+B

The 74HC00 IC has four 2-input NAND gates

The 74HC02 IC has four 2-input NOR gates

A B

A+B

+V

A

B

+V

A B

A+B

B

A

A·B

+V

A B

B

A

A·B

+V

13Flip-flops and clocked flip-flops

S

R

E

Q

Q =

Master

S

R

Ck Slave

Q

Q

14Multiplexer

A crucial circuit, vital for implementing functions:

15Binary Counter

Current state (ABCD)

Next state (ABCD)+

0 0 0 0 0 0 0 1

0 0 0 1 0 0 1 0

0 0 1 0 0 0 1 1

…. ….

1 1 1 1 0 0 0 0

16Real stuff