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Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a)...

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Fundamentals of Multichip Modules and Packaging Technologies
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Page 1: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Fundamentals of

Multichip Modulesand Packaging Technologies

Page 2: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM

• Advanced VLSI Packaging (AVP)• MCM-D• MCM-C• MCM-L

Page 3: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

System Packaging Methods

(a) System-on-a Chip or Wafer Scale Integration

(b) Multichip Module

(c) Single Chip Packagingv= velocity of Propagation C = Speed of LightE= Relative Dielectric Constant

Page 4: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Multi-chip Module

4

AT&T Bell Labs.1983-1988.

Page 5: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Schematic Representation of Multi-layered Thin–Film Polymide Substrate (MCM-D)

Page 6: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Number of Layers Versus effective Trace Density for Various Multichip Module Substrate Technologies and Trace Pitches (line plus gap in mils.)

The Penalty Factor is assumed to be less than 10%.]

Page 7: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM Fractional Yield as a Function of the KGD Probability

KGD = Known Good Die

Page 8: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Motherboard for iPhone 4

MCM in 1987

A4 in 2010

Page 9: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Xilinx Virtex 7 with 2.5D tiling, 2011.

Page 10: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Deep Reactive Ion Etching (RIE)

Case Western Reserve Univ. MEMS Website;http://mems.cwru.edu/

Advanced Micro Machines Website;http://www.memslink.com/

DARPA Microsystems Technology Office, MEMS Website; http://www.darpa.mil/MTO/MEMS/

© V. M. Bright and K. Ishikawa, 2001

Page 11: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=
Page 12: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Why 2.5D Packaging?

Xilinx calls this assembly “SSI” (stacked system interconnect) and this approach to large-FPGA assembly provides two big benefits according to Liam Madden, the Xilinx corporate VP of FPGA development and silicon technology. “We can get many more connections within the silicon than you can with a system-in-package. [There are “more than 10,000 routing connections between FPGA slices.] But the biggest advantage of this approach is power savings. Because we are using chip interconnect to connect the dice, it is much more economical in power than connecting dice through big traces, through packages or through circuit boards,” says Madden in the Xcell Journal article.

Page 13: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM

• Advanced VLSI Packaging (AVP)• MCM-D• MCM-C• MCM-L

Page 14: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Schematic Representation of Multi-layered Thin–Film Polymide Substrate (MCM-D)

Page 15: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM

• Advanced VLSI Packaging (AVP)• MCM-D• MCM-C• MCM-L

Page 16: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Thermal Conduction Module (IBM 3081)

500 WattsWater-cooled

16

Page 17: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Thermal Conduction Module

17

Page 18: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Schematic Representation of Low Temperature, Co-fired Ceramic (LTCC) MCM

Page 19: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

The Improvement of Wire Length and Number of Connections For IBM’s Thermal Conduction Module (an) MCM Versus the Same System

Implemented in Single Chip Packages

Page 20: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Line Width Versus Packaging Efficiency For Various Packing Styles

Single chip module

System on packagesystem on chip

Chip area/Substrate area

Page 21: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM

• Advanced VLSI Packaging (AVP)• MCM-D• MCM-C• MCM-L

Page 22: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Examples of Multi-Chip Module

Central Processing

Unit

Individuality Packaged

Microprocessor such as those

used in a Personal Computer

Page 23: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

The Major Steps in theFabrication of Multi-layer PWB ’s

23

Page 24: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

A Typical Printed Wiring Board Configuration

24

Page 25: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Production of PWB Laminates

25

Page 26: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Schematic Representation of a Built–up MCM-L

26

Page 27: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

PCB for iPhone 4

27

Page 28: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

MCM Relative Cost Versus Module I/O for the Various MCM Technologies

Page 29: Fundamentals of Multichip Modules and Packaging · PDF fileSystem Packaging Methods (a) System-on-a Chip or Wafer Scale Integration (b) Multichip Module (c) Single Chip Packaging v=

Motherboard for iPhone 4

MCM in 1987

A4 in 2010

Xilinx Virtex 7, 2011


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