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Fuzzy Simulated Evolution for Power and Performance of VLSI Placement

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Fuzzy Simulated Evolution for Power and Performance of VLSI Placement. Sadiq M. SaitHabib Youssef Junaid A. KhanAimane El-Maleh Department of Computer Engineering King Fahd University of Petroleum and Minerals Dhahran, Saudi Arabia. Presentation Overview. Introduction - PowerPoint PPT Presentation
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Fuzzy Simulated Evolution for Power and Performance of VLSI Placement Sadiq M. Sait Habib Youssef Junaid A. Khan Aimane El-Maleh Department of Computer Engineering King Fahd University of Petroleum and Minerals Dhahran, Saudi Arabia
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Page 1: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy Simulated Evolution for Power and

Performance of VLSI Placement

Sadiq M. Sait Habib YoussefJunaid A. Khan Aimane El-Maleh

Department of Computer EngineeringKing Fahd University of Petroleum and Minerals

Dhahran, Saudi Arabia

Page 2: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Presentation Overview

Introduction Problem statement and

cost functions Proposed scheme Experiments and Results Conclusion

Page 3: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Introduction A Fuzzy Evolutionary Algorithm for

VLSI placement is presented. Standard Cell Placement is:

A hard multi-objective combinatorial optimization problem.

With no known exact and efficient algorithm that can guarantee a solution of specific or desirable quality.

Simulated Evolution is used to perform intelligent search towards better solution.

Due to imprecise nature of design. information, objectives and constraints are expressed in fuzzy domain.

New Fuzzy Operators are proposed. The proposed algorithm is compared

with Genetic Algorithm.

Page 4: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Problem Statement & Cost Functions

Page 5: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Problem Statement (given)

A set of modules M = {m1,m2,m3,… mn}

A set of signals V = {v1, v2, v3,… vk}

A set of Signals Vi V, associated with each module mi M

A set of modules Mj = {mi|vj Vi}, associated with each signal vj V

A set of locations L = {L1, L2, L3…Lp}, where p n

Problem Statement (Objective) The objective of the problem is to assign each

mi M a unique location Lj, such that Power is optimized Delay is optimized Wire length is optimized Within accepted layout Width (Constraint)

Page 6: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Cost Functions

Wire length Estimation

Whereli …… is the estimate of actual length of

signal net vi,computed using median Steiner tree technique

Mi

iwire lCost

Power Estimation

iDD

Mii SfVCP 2

t 2

1

Where:Si …… Switching probability of module mi

Ci …… Load Capacitance of module mi

VDD … Supply Voltage

f …… Operating frequency …… Technology dependent constant

Page 7: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Power Estimation (contd.)

Also

iMj

gj

rii CCC

Where

Cir …… Interconnect capacitance at the

output node of cell i.

Cjg …… Input capacitance of cell j.

• In standard cell placement VDD, f, , and Cj

g are constant and power dissipation depends only on Si and Ci

r which is proportional to wire-length of the net vi. Therefore the cost due to power can be written as:

Mi

iipower lSCost

Page 8: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Delay Estimation

We have a set of critical paths {1, 2, 3……k}

{vi1, vi2, vi3…… viq} is the set of signal nets traversing path i.

Ti is the delay of path i computed as:

q

iiii IDCDT

1

)(

}......4,3,2,1{).....max( kiTCost idelay

WhereCDi …… is the delay due to the

cell driving signal net vi.

IDi …… is the interconnect delay of signal net vi.

Now

Page 9: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

WhereWidthmax … is the max. allowable width of

layoutWidthopt … is the optimal width of layouta …… denotes how wide layout

we can have as compared to its optimal value.

optWidthaWidth )1(max

Width Constraint

Page 10: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy Cost Measure

Set of solutions is generated by SE. Best solution is one, which performs

better in terms of all objectives and satisfies the constraint.

Due to multi-objective nature of this NP hard problem fuzzy logic (fuzzy goal based computation) is employed in modeling the single aggregating function.

Range of acceptable solution set

Page 11: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy operators used

And-like operators Min operator = min(1, 2) And-like OWA

= x min(1, 2) + ½ (1- )(1+ 2) Fuzzy Controlled And Operator (FCAO)

= 1- (1/ 2 + 2

/2)/(1/ + 2

/ )

Or-like operators Max operator = max(1, 2) Or-like OWA

= x max(1, 2) + ½ (1- )(1+ 2) Fuzzy Controlled OR Operator (FCOO)

= (1 2 + 2

2)/(1 + 2)

Page 12: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy Cost Measure (contd.)

Following fuzzy rule is suggested in order to combine all objectives and constraint

IF a solution is within acceptable wire-length AND acceptable power AND acceptable delay AND within acceptable layout width

THEN it is an acceptable solution

cl

cd

cp

cl

cd

cp

pdlc x

222

1)(

))(),(min()( xxx widthc

pdlcc

Page 13: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy Cost Measure (contd.)

where X … is the solutionc

pdl … is membership in fuzzy set, acceptable power and

delay and wire-length c

p … is membership in fuzzy set, acceptable power

cd … is membership in fuzzy set,

acceptable delayc

l … is membership in fuzzy set, acceptable wire-

lengthc

width … is membership in fuzzy set, acceptable width

c … is membership in fuzzy set, acceptable solution

Page 14: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Fuzzy Cost Measure (contd.)

cwidth

1.0

gwidth

Cwidth/Owidth

Membership functions

Oi …… optimal costsCi …… actual costs

Page 15: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Proposed Scheme

Page 16: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

SimE AlgorithmALGORITHM SimE(M,L)/* M: Set of moveable elements *//* L: Set of locations *//* B: Selection bias */INITIALIZAION:Repeat

EVALUATION: For Each m M

compute(gm) End For EachSELECTION: For Each m M

If Selection(m,B) ThenPs = Ps U {m}

Else Pr = Pr U {m}End If

End For Each

Sort the elements of Ps;

ALLOCATION:

For Each m Ps

Allocation(m) End For Each

Until Stopping criteria are metReturn (Best Solution)End SimE

Page 17: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Proposed Fuzzy goodness evaluation

IF cell i is

near its optimal wire-length AND near its optimal power AND near its optimal net delay OR Tmax(i)

is much smaller than TmaxTHEN it has high goodness.

Where

Tmax is the delay of the most critical path in the current iteration and Tmax(i) is the delay of the longest path traversing cell i in the current iteration

)()()(

)()()(1)(

222

xxx

xxxx

eid

eip

eiw

eid

eip

eiwe

i

where

)()(

)()()(

22

xx

xxx

eipath

einet

eipath

einete

id

Page 18: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Goodness evaluation (contd.)

and

we …… membership in fuzzy set, near

optimal wire length

pe …… membership in fuzzy set, near

optimal power

nete …… membership in fuzzy set, near

optimal net delay

pathe …… membership in fuzzy set,

Tmax(i) much smaller than Tmax

ie(x) …… is the goodness gi of cell i

x …… is the location of cell i

Superscript e denotes that these memberships

are for evaluation

Page 19: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Goodness (Membership Functions)

X nete

enet

amin_net amax_net

1.0near optimal net delay

X pathe

epath

1.0 2.0

1.0 T max (i) is much smallerthan T max

X we

ew

amin_w amax_w

1.0near optimal wire-length

X pe

ep

amin_p amax_p

1.0near optimal power

Page 20: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Goodness (base values)

Wherel*

j …… lower bound on wire length of signal net vj

lj …… actual wire length of signal net vj

Sj …… is the switching probability of vi

k

jj

k

j

j

eiw

l

l

xX

1

1

*

)(

Ki

jjj

k

j

jje

ip

lS

lS

xX

1

1

*

.

.

)(

pi

piinet

e

IDID

IDIDxX

**

)()(

)(max

max

iT

TxX ipath

e

WhereIDi

* …… is the lower bound on interconnect delay of vi

IDp* …… is the lower bound on interconnect delay

of the input net of cell i that is on max(i)

Tmax(i) …… Delay of longest path traversing cell i

Tmax …… Delay of most critical path in current iteration

Page 21: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Goodness (amin_i and amax_i)

amin_i = average(Xei) – 2 x SD(Xe

i)

amax_i = average(Xei) + 2 x SD(Xe

i)

Selection

A cell i will be selected if

Rndom gi + bias

Range of the random number will be fixed [0,M]

M = average(gi) + 2 x SD(gi)

M is computed in first few iteration, and updated

only once when size of selection set is 90% of its

initial size

Page 22: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Allocation Selected cells are sorted w.r.t. their

connectivity to non-selected cells.

Top of the list cell is picked and swapped its location with other cells in the selection set or with dummy cells, the best swap is accepted and cell is removed from the selection set.

Following Fuzzy Rule is used to find good swap

IF a swap results in

reduced overall wire length AND reduced overall power AND reduced overall delay AND within acceptable layout width

THEN it gives good location

Page 23: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Allocation (contd.)

Wherel …… represents a locationiw

a …… membership in fuzzy set, reduced wire length

ipa …… membership in fuzzy set, reduced power

ida …… membership in fuzzy set, reduced delay

ai_width …… membership in fuzzy set, smaller layout width

ia(l) …… is the membership in fuzzy set of good

location for cell i

)()()(

)()()(1)(

222

_lll

llll

aid

aip

aiw

aid

aip

aiw

pwdia

))(),(min()( __ lll pwdia

widthiaa

i

Page 24: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Allocation (membership functions)

X da

ad

ad1.0

1.0reduced delay

X awidth

aw

1.0within acceptable width

1+a width

X wa

aw

aw1.0

1.0reduced wire-length

X pa

ap

ap1.0

1.0reduced power

kj

mnjm

ki

mim

kj

mnjm

ki

mim

iwa

ll

lllX

11

1

11

)(

)()(

kj

mnjmjm

ki

mimim

kj

mnjmjm

ki

mimim

ipa

lSlS

lSlSlX

11

1

11

)(

)()(

1)(

)()(

njpjipi

njpjipiid

a

IDIDIDID

IDIDIDIDlX

opt

Widthlwidthi

a

Width

CostX n)(_

These values are computed when cell i swap its location with cell j, in nth iteration

Page 25: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Genetic Algorithm

• Membership value c(x) is used as the fitness value.• Roulette wheel selection scheme is used for parent selection.• Partially Mapped Crossover is used.• Extended Elitism Random Selection is used for the creation of next generation.• Variable mutation rate in the range [0.03- 0.05] is used depending upon the standard deviation of the fitness value in a population.

Page 26: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Experiments and Results

Page 27: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Technology details

.25 MOSIS TSMC CMOS technology library is used

Metal1 is used for the routing in horizontal tracks

Metal2 is used for the routing in vertical tracks

0.25 technology parameters

Page 28: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Circuits and layout details

Page 29: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Results

Page 30: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Results (contd.)

(c) (f)

(b) (e)

(a) (d)

(a), (b), and (c) show membership value vs. execution time for FSE with CFO, FSE with OWA and GA. (d), (e), and (f) show cumulative number of solutions visited in specific

membership ranges vs. execution time for FSE with CFO, FSE with OWA and GA respectively

Page 31: Fuzzy Simulated Evolution for Power and Performance  of VLSI Placement

Conclusions

Fuzzy Simulated Evolution Algorithm for VLSI standard cell placement is presented.

Fuzzy logic is used in Evaluation, and allocation stages of the SE algorithm and in the selection of best solution.

New Controlled Fuzzy Operators are presented. The proposed scheme is compared with GA and

with OWA operators. FSE performs better than GA with less

execution time and better quality of final solution.

FSE has better evolutionary rate as compared to GA.

CFO gives solution with same or better quality without the need of any parameter like .

CFO exhibits better evolutionary rate than OWA.


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