High-Performance Two-Dimensional InSeField-Effect Transistors with NovelSandwiched Ohmic Contact for Sub-10 nmNodes: a Theoretical StudyJiaduo Zhu1,2* , Jing Ning1,2, Dong Wang1,2, Jincheng Zhang1,2*, Lixin Guo3 and Yue Hao1,2
Abstract
Two-dimensional (2D) InSe-based field effect transistor (FET) has shown remarkable carrier mobility and high on-offratio in experimental reports. Theoretical investigations also predicated the high performance can be well preservedat sub-10 nm nodes in the ballistic limit. However, both experimental experience and theoretical calculationspointed out achieving high-quality ohmic has become the main limiting factor for high-performance 2D FET. In thiswork, we proposed a new sandwiched ohmic contact with indium for InSe FET and comprehensively evaluated itsperformance from views of material and device based on ab initio methods. The material properties denote that allof fundamental issues of ohmic contact including tunneling barrier, the Schottky barrier, and effective doping arewell concerned by introducing the sandwiched structure, and excellent contact resistance was achieved. At deviceperformance level, devices with gate length of 7, 5, and 3 nm were investigated. All metrics of sandwichedcontacted devices far exceed requirement of the International Technology Roadmap for Semiconductors (ITRS) andexhibit obvious promotion as compared to conventional structures. Maximum boost of current with 69.4%, 50%,and 49% are achieved for devices with 7, 5, and 3 nm gate length, respectively. Meanwhile, maximum reduction ofthe intrinsic delay with 20.4%, 16.7%, and 18.9% are attained. Moreover, a benchmark of energy-delay product (EDP)against other 2D FETs is presented. All InSe FETs with sandwiched ohmic contact surpass MoS2 FETs as well asrequirement from ITRS 2024. The best result approaches the upper limit of ideal BP FET, denoting superiorpreponderance of sandwiched structures for InSe FETs in the next generation of complementary metal-oxidesemiconductor (CMOS) technology.
Keywords: InSe, Field-effect transistor, Density functional theory, Non-equilibrium Green function, Ohmic contact
IntroductionTwo-dimensional (2D) semiconductors have attractedmuch interest in electronic devices due to their appealingapplications for the next generation of complementarymetal-oxide semiconductor (CMOS) technology [1, 2].Their ultra-thin thickness and good dielectric propertycan provide excellent electrostatic gate control to suppressthe well-known short channel effects [3]. In addition, asfew layers of 2D materials usually possess smooth surfacewith lack of dangle bonds, superiority carrier mobility of
2D materials can be well preserved in ultrathin bodysystems as compared to conventional semiconductor [4].Except for the gapless graphene, most of synthesized 2Dsemiconductors like transition metal dichalcogenides(TMDs), black phosphorus (BP), and indium selenide(InSe) possess none-zero band gap and are demonstratedto be suitable for field-effect transistor (FET). TMDs-based FETs have shown high on-off ratio as much as 108
and low leakage current in short channel devices, benefit-ting from the heavy effective mass [5]. BP-based FETshave presented outstanding current and switching charac-teristic [6], due to the high mobility of ~ 1000 cm2/V sand anisotropic transport property [7]. Recently, InSewas demonstrated to present a superiority mobility of
* Correspondence: [email protected]; [email protected] Bandgap Semiconductor Technology Disciplines State Key Laboratory,School of Microelectronics, Xidian University, Xi’an 710071, ChinaFull list of author information is available at the end of the article
Zhu et al. Nanoscale Research Letters (2019) 14:277 https://doi.org/10.1186/s11671-019-3106-8
~ 2000 cm2/V s at room temperature [8, 9], and FETbased on InSe revealed a high on-off ratio of 108
[10]. First-principle calculations also identified thatInSe FET can be well scaled down to sub-10 nm inthe ballistic limit [11, 12]. However, due to the neg-lect of contact resistance and hypothesis of heavilydoping, approaching the theoretical limit is still chal-lenging in real applications. In fact, as reliable dopingmethod and way to high-quality ohmic contact arestill lacking, FETs based on 2D materials includingInSe are usually Schottky barrier (SB) FET [13–16].The SB at the active regions yields large contactresistance, and low doping level further degradescurrent density. Achieving low contact resistance withsufficiently doped active regions has become the mainlimiting factor for 2D materials-based FET (2D FET)to achieve high performance [17–19].Aiming at above issues, we proposed a novel sand-
wiched ohmic contact for InSe FET. Indium was selectedas the electrode metal, as recent experimental and theor-etical studies suggest that indium can be a promising can-didate for InSe FET to achieve good performance [20–22].We theoretically evaluated the ohmic contact quality andperformance of devices with gate length of 7, 5, and 3 nmfollowing the framework of the International TechnologyRoadmap for Semiconductors 2013 (ITRS) [23]. It shouldbe noted although ITRS has been replaced by theInternational Roadmap for Devices and Systems (IRDS)[24], ITRS2013 presents a clear scaling trend for transistorand has been still adopted in recent studies [25, 26]. Thismanuscript is arranged as follows: first, electrical proper-ties of sandwiched and conventional (top) contacts areinvestigated. Second, device performance metrics such ason-state current and intrinsic delay are evaluated andcompared with requirements of ITRS. Finally, benchmark
of power-delay product versus intrinsic delay is presentedto compare against other 2D materials-based devices.
MethodsAll of atomic structures were optimized by VASP [27];energy cut of 335 eV was employed during all calcula-tions. Unit cell of InSe was relaxed with stress criterionof 0.01 eV/Å under the framework of MetaGGA ofSCAN [28]. Lattice parameters of metal indium wereobtained from handbook of chemistry and physics [29].As shown in Fig. 1, the lattice constant of InSe is 4.029Å, which is in very good agreement with experimentalreports [30, 31].The initial structure of indium on InSe was built with
4 × 1 × 1 and 5 × 2 × 1 unit cells of InSe and indium(001) surface, respectively. The mean absolute strain was1.32%, which is sufficient to preserve the intrinsic prop-erties of the material. As shown in Fig. 2a, b, the sand-wiched structure was built with indium/InSe/indiumlayers, indium of bottom and top sides has mirrorsymmetry with center of InSe. Both of hybrid structureswere relaxed with van der Waals (vdW) functional ofoptb88 with criterion of force on each atom lower than0.02 eV/Å [32, 33]. The finnal contact area is 16.19 Å ×6.41 Å. The resistance of ohmic contact was then evalu-ated by a two-probe device as shown in Fig. 2a, b.Getting rid of unnecessary resistance from semicon-ductor out of contact regions, InSe in the cathode washeavily doped with 1 × 1014 e/cm2 for both top andsandwiched contacts.As for the evaluation of device performance, geometry
of InSe FET with sandwiched and top ohmic contacts isshown in Fig. 3a, b, respectively. All devices and nodesname follow requirement from ITRS and IRDS, respect-ively. Device parameters are listed in Table 1. To
Fig. 1 Top view of unit cell for InSe (a) and indium (b), respectively
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suppress the intra-band tunneling, 1 nm underlap (UL)was applied at gate length of 3 nm. In contrary to ohmiccontact modeling, none of parts in devices wasintentional doped. The devices were built by mergingthe source, drain, and channel along transport direction.The channel and its two interfaces with active regions
were additionally relaxed with fixed source and drain.All simulations were based on non-equilibrium Green’sfunction (NEGF) theory and carried out by Quantu-mATK with fully self-consistent calculation [34–36],which was usually employed to design and investigatetransistors at sub-10 nm nodes [17, 37–39]. Double-
Fig. 2 Atomic structures of contact and related two-probe device used for evaluation of contact resistance. a, b are for top and sandwichedcontacts, respectively. The coordinates denote the location of atoms in the out-plane direction
Fig. 3 Geometries of InSe FETs with sandwiched (a) and top (b) contacts
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zeta polarized basis set were employed with mech-cutoff of 90 Rydberg. Monkhorst pack k-point mesh wassampled with density of 8/Å−1 × 11/Å−1 × 180/Å−1. Paral-lel conjugate gradient solver is chosen as the Poissonsolver for the sake of efficiency. The current of all devicescan be then obtained by solving the Landauer-Büttikerformula [40]:
I V Biasð Þ ¼ 2eh
ZT E;VL;VRð Þ
� f R E;VRð Þ− f L E;VLð Þ½ �dE
Where,VBias is the bias and can be achieved by:VBias = VR ‐ VL, T(E,VL,VR) is the transmission coef-ficient of carriers, fR(E,VR) and fL(E,VL) are theFermi-Dirac distribution function for cathode (drain)and anode (source), respectively.
Results and discussionIn general, there are three key factors correlated to theohmic contact quality in 2D materials [18], i.e., thetunneling barrier and distance which is derived fromvdW gap, orbital overlap between electrode and semi-conductor, and also the SB height. First, the tunnelingbarrier and distance were described by effective potentialshown in Fig. 4a. Compared to the top contact, intro-duction of sandwiched contact not only provides anadditional transport path at the bottom side but alsogives rise to a decrease of tunneling barrier from 5.48 to2.38 eV, leading a reduction of 56.6%. Meanwhile, theinterfacial distance also gets slightly lowered with 0.66Å, denoting the width of tunneling barrier gets alsoreduced. Second, the orbital overlap can be evaluatedfrom valance charge distribution in Fig. 4b. It can benoticed that sandwiched contact possesses more valanceelectrons at the interfacial region as compared to the topcontact, indicating stronger orbital overlapping betweenindium and InSe. This feature also helps to introducedoping effect into InSe, and the excess electrons numbercan be calculated by using Mulliken population. Weextracted the total number of electrons in InSe of sand-wiched and top contacted structures, respectively. Thenthe doping level can be obtained by dividing the electronnumber by the area of the contact region, as net chargeof isolated InSe should always be zero. As shown in theright panel of Fig. 4b, sandwiched contact yields a very
Table 1 Device parameters following ITRS and IRDSrequirement
Channel length EOT (nm) VDS (V) Node
7 nm 0.5 0.68 2019
5 nm 0.41 0.64 2021
3 nm 0.41 0.64 2024
Fig. 4 a Effective potential normal to the transport direction. The coordinate corresponds to the location of atoms and is defined in Fig. 1. Thedark regions correspond to the vdW gap. b Plane-averaged electron distribution normal to the transport direction. The right panel is the dopinglevel. The coordinate corresponds to the location of atoms and is defined in Fig. 1. c DOS of InSe. The green corresponds to pristine InSe. dCurrent dependent bias of the two probe devices. All of the red and blue correspond to top and sandwiched contacts, respectively
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high doping level of 1.6 × 1013 e/cm2, which is nearly 2.8times higher than that of the top contact. Such a highlevel has approached the hypothesis in simulations of 2Dtunneling FET, which usually claims much heavierdoping level than metal-oxide-semiconductor FET.Thirdly, the density of states (DOS) of InSe in pristine,sandwiched, and top contacted structures are shown Fig.4c. Orbital overlapping between indium and InSe at theinterfacial region metallized the band gap of InSe, andsandwiched one results in a higher level. This featuregreatly enhances carrier injection through vdW tunnel-ing barrier at the interfacial region, as the metalizedstates in the band gap offer additional tunnelingchannels. In addition, the Fermi levels are pined abovethe conduction band minimum, resulting in energydegeneracy of ~ 0.07 and 0.27 eV for top and sandwichedcontacts, respectively. Therefore, the SB between indiumand InSe are completely eliminated. Fourthly, the ohmiccontact resistance was calculated based on bias-currentcurve obtained from the two-probe devices, and allresults are shown in Fig. 4d. We can notice both ofcontacts are ohmic due to the linear evolutions. Attheoretical level, i.e., neglecting of surface roughness,interfacial impurities, etc., the sandwiched structure
leads to a very low contact value of 0.032 ± 0.002 Ωmm, which reduces more than half of resistance of thetop contact. Based on above discussions, it is interestingto notice that double the contact region always leads tomore than twice improvement of the ohmic contact.Because top contact with indium was recently experi-mental confirmed to be effective to boost InSe-baseddevices performance [21, 22], sandwiched structure canbe an appealing ohmic contact solution for InSe FETs.Then, the device performance was evaluated, and the
transfer characteristics of InSe FET at 2019, 2021, and2024 nodes were shown in Fig. 5. It can be observed thatthe subthreshold swing (SS) of all nodes are below 100mV/dec, and SS at 2019 node shows nearly ideal switch-ing characteristics of 61.8 and 64.4 mV/dec for top andsandwiched contacted devices, respectively, indicatingoutstanding electrostatic control in InSe FETs. Inaddition, sandwiched contacted devices lead to evidentimprovement of IDS compared to top ones with max-imum increasement of 69.4%, 50%, and 49% beingachieved at 2019, 2021, and 2024 nodes, respectively.Furthermore, ION was extracted following the require-ment of high performance (HP) in the ITRS. As shownin Fig. 5d, ION of all systems is far above the HP
Fig. 5 Transfer characteristics of InSe FETs at node. a 2019, b 2021, and c 2024 nodes, respectively. d Comparisons of ION following HPrequirement of ITRS
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requirement. Compared to top contacted devices, sand-wiched systems still present a promotion of 38.2%,27.3%, and 20.5% for 2019, 2021, and 2024 nodes,respectively.Another essential metric of FET is intrinsic delay (τ),
which signifies the upper limit of switching speed in thelogical circuit. The τ was obtained by τ = (QON −QOFF)/ION, where QON and QOFF are charges at on and offstates, respectively. The on and off states are constrainedat |VDS|=0.68, 0.64, and 0.64 V for 2019, 2021, and 2024nodes, respectively. Intrinsic delay as a function of on-off ratio is shown in Fig. 6. Despite the non-monotonicevolution at large delay which is derived from thetunneling under low gate voltages [41], all delays arebelow 0.15 ps and sufficiently lowered than the ITRSrequirement of 0.44-0.46 ps. In addition, sandwichedcontacted devices give rise to a reduction of more than30% at regions of ION/IOFF ≤ 107, 106, 105 for 2019, 2021,and 2024 nodes, respectively. On the basis of HPrequirements shown in Fig. 6d, sandwiched contacteddevices can still promote the switching speed with20.4%, 16.7%, and 18.9% for 2019, 2021, and 2024 nodes,respectively.In order to evaluate the device performance more
intuitionally, power-delay product (PDP) versus intrinsicdelay is extracted. PDP corresponds to the powerconsumption in a single switching event and is definedby PDP = (QON −QOFF)VDS with all parameters derived
from HP requirement of ITRS. Results and comparisonwith other 2D FETs are shown in Fig. 7. Firstly, all 2DFETs were selected based on the rule that they have beenpreliminarily verified as transistors in experimental re-ports, which goes a step further for CMOS technology.Secondly, except for InSe and MoS2 [42], all other deviceswere simulated with heavily doping in active regions andneglect of ohmic contact resistance [43, 44], therefore theresults correspond to the upper limit of performance. Ascan be seen, all energy-delay product (EDP) are belowITRS 2024 requirement, indicating the appealing future of2D FETs. The maximum of EDP belongs to MoS2 FET at9.9 nm, and the best is from BP FET. As for InSe FETs,sandwiched contacted devices always perform better thantop contacted ones at all nodes. The highest EDP ofsandwiched contacted devices is at gate length of 7 nm(2019 node) and exceeds all MoS2 FETs. The lowest one isat gate length of 3 nm (2024 node) and even approachesthe upper limit of BP FET in the armchair direction,which is well known for the outstanding transport proper-ties. Accordingly, the EDP of InSe FET signifies thatsandwiched contacted devices exhibit sufficient competi-tiveness among 2D FETs.
ConclusionsIn this work, a new sandwiched ohmic contact withindium was proposed for InSe FET. The sandwichedohmic contact not only doubles the contact region but
Fig. 6 Intrinsic delay as a function of on-off ratio at node. a 2019, b 2021, and c 2024 nodes, respectively. d Comparisons of intrinsic delayfollowing HP requirement of ITRS
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also promotes the contact quality more than twice, lead-ing to an excellent contact resistance. At device per-formance level of gate length 7, 5, and 3 nm, InSe FETswith sandwiched ohmic contact present universal per-formance promotion as compared to conventional topcontacted devices. Under the requirement of HP fromITRS, on-state current and intrinsic delay are improvedwith 38.2~20.5% and 20.4~16.7%, respectively. A bench-mark of EDP against other 2D FETs also reveals thatInSe FETs with sandwiched ohmic contact have advan-tages over other 2D FETs. Our study offers a new routetoward high-performance InSe FETs.
Abbreviations2D: Two-dimensional; CMOS: Complementary metal-oxide semiconductor;TMDs: Transition metal dichalcogenides; BP: Black phosphorus; InSe: Indiumselenide; FET: Field-effect transistors; SB: Schottky barrier; 2D FET: 2Dmaterials-based FET; ITRS: International Technology Roadmap forSemiconductors; vdW: van der Waals; UL: Underlap; NEGF: Non-equilibriumGreen’s function; DOS: The density of states; SS: Subthreshold swing;HP: High performance; τ: Intrinsic delay; PDP: Power-delay product;EDP: Energy-delay product
AcknowledgementsThe authors are grateful for the computational resource provided by HPCsystem of Xidian University.
Authors’ contributionsJZ designed and performed the calculations and wrote the manuscript. JNand DW participated in this work and analyzed the data. JZ proposed theinitial idea and provided the software. LG and YH revised the manuscript. Allauthors read and approved the final manuscript.
Authors’ informationNot applicable.
FundingThis work was supported by 111 project (Grant No. B12026), National NaturalScience Foundation of China (No. 61604115, 11435010, 61474086, and61334002), the Fundamental Research Funds for the Central Universities(JB191109), and the Natural Science Basic Research Plan in Shaanxi Provinceof China (program No. 2019ZDLGY16-03).
Availability of data and materialsThe datasets used and/or analysed during the current study are availablefrom the corresponding author on reasonable request.
Competing interestsThe authors declare that they have no competing interests.
Author details1Wide Bandgap Semiconductor Technology Disciplines State Key Laboratory,School of Microelectronics, Xidian University, Xi’an 710071, China. 2ShaanxiJoint Laboratory of Graphene, Xidian University, Xi’an 710071, China. 3Schoolof Physics and Optoelectronic Engineering, Xidian University, Xi’an 710071,China.
Received: 22 April 2019 Accepted: 28 July 2019
References1. Robinsona JA (2018) Perspective: 2D for beyond CMOS. Apl Materials 6:52. Gong CH, Hu K, Wang XP, Wangyang PH, Yan CY, Chu JW, Liao M, Dai LP,
Zhai TY, Wang C, Li L, Xiong J (2018) 2D Nanomaterial Arrays for Electronicsand Optoelectronics. Adv Funct Mater 28:16
3. Liu F, Wang YJ, Liu XY, Wang J, Guo H (2015) A theoretical investigation oforientation-dependent transport in monolayer MoS2 transistors at theballistic limit. IEEE Electron Device Lett 36:10
4. Chhowalla M, Jena D, Zhang H (2016) Two-dimensional semiconductors fortransistors. Nature Reviews Materials 1:11
5. Radisavljevic B, Radenovic A, Brivio J, Giacometti V, Kis A (2011) Single-layerMoS2 transistors. Nat Nanotechnol 6:3
6. Li L, Yu Y, Ye GJ, Ge Q, Ou X, Wu H, Feng D, Chen XH, Zhang Y (2014) Blackphosphorus field-effect transistors. Nat Nano 9:5
7. Ameen TA, Ilatikhameneh H, Klimeck G, Rahman R (2016) Few-layer phosphorene:an ideal 2D material for tunnel transistors. Scientific Reports 6:28515
8. Bandurin DA, Tyurnina AV, Yu GL, Mishchenko A, Zólyomi V, Morozov SV,Kumar RK, Gorbachev RV, Kudrynskyi ZR, Pezzini S, Kovalyuk ZD, Zeitler U,
Fig. 7 Power-delay product versus intrinsic delay comprised of InSe and other 2D FETs. The gray dashed guidelines correspond to specific EDP
Zhu et al. Nanoscale Research Letters (2019) 14:277 Page 7 of 8
Novoselov KS, Patanè A, Eaves L, Grigorieva IV, Fal'ko VI, Geim AK, Cao Y(2016) High electron mobility, quantum Hall effect and anomalous opticalresponse in atomically thin InSe. Nat Nanotechnol 12:223
10. Feng W, Zheng W, Cao W, Hu P (2014) Back gated multilayer InSetransistors with enhanced carrier mobilities via the suppression of carrierscattering from a dielectric interface. Adv Mater 26:38
11. Wang Y, Fei R, Quhe R, Li J, Zhang H, Zhang X, Shi B, Xiao L, Song Z, Yang J,Shi J, Pan F, Lu J (2018) Many-body effect and device performance limit ofmonolayer InSe. ACS Appl Mater Interfaces 10:27
12. Marin EG, Marian D, Iannaccone G, Fiori G (2018) First-principles simulationsof FETs based on two-dimensional InSe. IEEE Electron Device Lett 39:4
13. Hao J, Jianwei L, Langhui W, Ying D, Yadong W, Hong G (2017) Ohmiccontact in monolayer InSe-metal interface. 2D Materials 4: 2
14. Wang J, Yao Q, Huang C-W, Zou X, Liao L, Chen S, Fan Z, Zhang K, WuW, Xiao X, Jiang C, Wu W-W (2016) High mobility MoS2 transistor withlow Schottky barrier contact by using atomic thick h-BN as a tunnelinglayer. Adv Mater 28:37
15. Penumatcha AV, Salazar RB, Appenzeller J (2015) Analysing blackphosphorus transistors using an analytic Schottky barrier MOSFET model.Nat Commun 6:8948
16. Das S, Chen H-Y, Penumatcha AV, Appenzeller J (2013) High performancemultilayer MoS2 transistors with scandium contacts. Nano Lett 13:1
17. Marin EG, Perucchini M, Marian D, Iannaccone G, Fiori G (2018) Modeling ofelectron devices based on 2-D materials. IEEE Trans Electron Devices 65:10
18. Kang J, Liu W, Sarkar D, Jena D, Banerjee K (2014) Computational study ofmetal contacts to monolayer transition-metal dichalcogenidesemiconductors. Physical Review X 4:3
19. Guo Y, Han Y, Li J, Xiang A, Wei X, Gao S, Chen Q (2014) Study on theresistance distribution at the contact between molybdenum disulfide andmetals. ACS Nano 8:8
20. Shi B, Wang Y, Li J, Zhang X, Yan J, Liu S, Yang J, Pan Y, Zhang H, Yang J,Pan F, Lu J (2018) n-Type Ohmic contact and p-type Schottky contact ofmonolayer InSe transistors. Phys Chem Chem Phys 20:–38
21. Huang Y-T, Chen Y-H, Ho Y-J, Huang S-W, Chang Y-R, Watanabe K, Taniguchi T,Chiu H-C, Liang C-T, Sankar R, Chou F-C, Chen C-W, Wang W-H (2018) High-performance InSe transistors with ohmic contact enabled by nonrectifyingbarrier-type indium electrodes. ACS Appl Mater Interfaces 10:39
22. Feng W, Zhou X, Tian WQ, Zheng W, Hu P (2015) Performanceimprovement of multilayer InSe transistors with optimized metal contacts.Phys Chem Chem Phys 17:5
23. International Technology Roadmaps of Semiconductor (ITRS-2013) [Online].Available: http://www.itrs2.net/
24. International Roadmap for Devices and Systems (IRDS-2017) [Online].Available: https://irds.ieee.org/
25. Thiele S, Kinberger W, Granzner R, Fiori G, Schwierz F (2018) The prospectsof transition metal dichalcogenides for ultimately scaled CMOS. Solid-StateElectron 143:2
26. Chen J, Yang Z, Zhou W, Zou H, Li M, Ouyang F (2018) Monolayer–trilayerlateral heterostructure based antimonene field effect transistor: better contactand high on/off ratios. physica status solidi (RRL)—Rapid Research Letters 12: 5
27. Kresse G, Furthmüller J (1996) Efficient iterative schemes for ab initio total-energy calculations using a plane-wave basis set. Physical Review B 54:16
28. Sun J, Ruzsinszky A, Perdew JP (2015) Strongly constrained andappropriately normed semilocal density functional. Phys Rev Lett 115:3
29. David R. Lide, ed., CRC Handbook of Chemistry and Physics. 83rdedition. CRC Press. 2002
30. Schlaf R, Louder D, Lang O, Pettenkofer C, Jaegermann W, Nebesny KW, LeePA, Parkinson BA, Armstrong NR (1995) Molecular beam epitaxy growth ofthin films of SnS2 and SnSe2 on cleaved mica and the basal planes ofsingle-crystal layered semiconductors: reflection high-energy electrondiffraction, low-energy electron diffraction, photoemission, and scanningtunneling microscopy/atomic force microscopy characterization. Journal ofVacuum Science & Technology A 13:3
31. Lauth J, Gorris FES, Samadi Khoshkhoo M, Chassé T, Friedrich W, LebedevaV, Meyer A, Klinke C, Kornowski A, Scheele M, Weller H (2016) Solution-processed two-dimensional ultrathin InSe nanosheets. Chem Mater 28:6
32. Klimeš J, Bowler DR, Michaelides A (2011) Van der Waals density functionalsapplied to solids. Physical Review B 83:19
33. Thonhauser T, Cooper VR, Li S, Puzder A, Hyldgaard P, Langreth DC (2007)Van der Waals density functional: self-consistent potential and the nature ofthe van der Waals bond. Physical Review B 76:12
34. Lu AKA, Pourtois G, Agarwal T, Afzalian A, Radu IP, Houssa M (2016) Originof the performances degradation of two-dimensional-based metal-oxide-semiconductor field effect transistors in the sub-10 nm regime: a first-principles study. Appl Phys Lett 108:4
35. Brandbyge M, Mozos J-L, Ordejón P, Taylor J, Stokbro K (2002) Density-functionalmethod for nonequilibrium electron transport. Physical Review B 65:16
36. Atomistix ToolKit version 2018 [Online]. Synopsys QuantumWise A/S(https://www.synopsys.com/silicon/quantumatk.html)
37. Zhang W, Ragab T, Basaran C (2019) Electrostatic doping-based All GNRtunnel FET: an energy-efficient design for power electronics. IEEE TransElectron Devices 66:4
38. Quhe R, Li Q, Zhang Q, Wang Y, Zhang H, Li J, Zhang X, Chen D, Liu K, Ye Y,Dai L, Pan F, Lei M, Lu J (2018) Simulations of quantum transport in sub-5-nm monolayer phosphorene transistors. Physical Review Applied 10:2
39. Ma X, Fan Z, Wu J, Jiang X, Chen J (2018) Computational design of siliconcontacts on 2D transition-metal dichalcogenides: the roles of crystallineorientation, doping level, passivation and interfacial layer, In 2018 IEEEInternational Electron Devices Meeting (IEDM), 2018, pp. 24.2.1-24.2.4
40. Taylor J, Guo H, Wang J (2001) Ab initio modeling of quantum transportproperties of molecular electronic devices. Physical Review B 63:24
41. Zhao Y, AlMutairi A, Yoon Y (2017) Assessment of Germanane field-effecttransistors for CMOS technology. IEEE Electron Device Lett 38:12
42. Marian D, Dib E, Cusati T, Fortunelli A, Iannaccone G, Fiori G Two-dimensional transistors based on MoS2 lateral heterostructures. In 2016 IEEEInternational Electron Devices Meeting (IEDM), 2016, pp 14.11.11-14.11.14
43. AlMutairi A, Yoon Y (2018) Device performance assessment of monolayerHfSe2: a new layered material compatible with high-k HfO2. IEEE ElectronDevice Lett 39:11
44. Liu F, Wang Y, Liu X, Wang J, Guo H (2014) Ballistic transport in monolayerblack phosphorus transistors. IEEE Trans Electron Devices 61:11
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Zhu et al. Nanoscale Research Letters (2019) 14:277 Page 8 of 8
