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USB Test Report
Overall Results:0 of 18 Tests Failed
Test Configuration Details
Device Description
Test Point Device
Use Pulse Generator No
Test Connection Differential
Test Method Matlab
Test Session Details
Infiniium SW Version 04.20.0001
Infiniium Model Number DSO90804A
Infiniium Serial Number MY50524048
Application SW Version 3.73
Debug Mode Used No
Last Test Date 9/18/2013 11:32:16 AM
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Summary of Results
Margin Thresholds
Warning < 2 %
Critical < 0 %
Pass# Failed
# Trials
Test NameActual Value
Margin Spec Range
0 1 EL_2 EL_4 EL_5 Data Eye and Mask Test Pass100.0 %
Pass/Fail
0 1 EL_6 Device Rise Time Pass100.0 %
Pass/Fail
0 1 EL_6 Device Fall Time Pass100.0 %
Pass/Fail
0 1 EL_7 Device Non-Monotonic Edge Test Pass100.0 %
Pass/Fail
0 1 EL_21 Device Sync Field Length Test 64.624ns 49.4 % 63.610ns <= VALUE <= 65.610ns
0 1 EL_25 Device EOP Length Test 17.122ns 27.5 % 15.600ns <= VALUE <= 17.700ns
0 1EL_22 Measure Interpacket Gap Between Second and Third Packets
319.851ns 20.8 % 16.640ns <= VALUE <= 399.400ns
0 1EL_22 Measure Interpacket Gap Between First and Second Packets
309.680ns 23.4 % 16.640ns <= VALUE <= 399.400ns
0 1 EL_28 Measure Device CHIRP-K Latency 1.503746ms 25.0 % 2.500µs <= VALUE <= 6.000000ms
0 1 EL_29 Measure Device CHIRP-K Duration 2.000ms 16.7 % 1.000ms <= VALUE <= 7.000ms
0 1 EL_40 Device Resume Timing Response Pass100.0 %
Pass/Fail
0 1EL_27 Device CHIRP Response to Reset from Hi-Speed Operation
3.503ms 13.9 % 3.100ms <= VALUE <= 6.000ms
0 1 EL_28 Device CHIRP Response to Reset from Suspend 1.503726ms 25.0 % 2.500µs <= VALUE <= 6.000000ms
0 1 EL_8 Device J Test (Informative) Pass100.0 %
Pass/Fail
0 1 EL_8 Device K Test (Informative) Pass100.0 %
Pass/Fail
0 1 EL_9 Device SE0_NAK Test (Informative) Pass100.0 %
Pass/Fail
0 1EL_31 Device Hi-Speed Terminations Enable and D+ Disconnect Time
3.723µs 0.7 % 10ns <= VALUE <= 500.000µs
0 1 EL_38 EL_39 Device Suspend Timing Response 3.002ms 1.6 % 3.000ms <= VALUE <= 3.125ms
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Report Detail
EL_2 EL_4 EL_5 Data Eye and Mask Test
Result Details
Trial 1
Reference: USB 2.0 Specification, Section 7.1.11., Section 7.1.2.2.
Test Description: EL_2: A USB 2.0 hi-Speed transmitter data rate must be 480Mb/s +/- 0.05%. EL_4: A USB 2.0 upstream
facing port on a device without a captive cable must meet Template 1 transform waveform requirements measured at TP3. EL_5: A USB 2.0 upstream
facing port on a device with a captive cable must meet Template 2 transform waveform requirements measured at TP2.
Test Summary: Pass
Test Limits: Pass/Fail Device Data Eye Test Pass
Test Packet (See image) Eye Diagram (See image) Signal Eye eye passes Signal Eye Failure N/A
EOP Width Test Pass EOP Width 8.11 Receivers N/A Signal Rate 479.9999 MHz Signal Rate Test Pass
Signal Rate Failure N/A Consecutive Jitter Range -25.252 ps to 55.999 ps Consecutive RMS Jitter 17.996 ps
Paired JK Jitter Range -52.393 ps to 41.326 ps Paired JK RMS Jitter 10.856 ps
Paired KJ Jitter Range -24.239 ps to 32.117 ps Paired KJ RMS Jitter 9.359 ps RisngEdge 940.76
FallingEdge 916.62 EL_5:Port Under Test Port1
Trial 1: Test Packet
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EL_6 Device Rise Time
Result Details
EL_6 Device Fall Time
Result Details
EL_7 Device Non-Monotonic Edge Test
Result DetailsTrial 1
Trial 1: Eye Diagram
Reference: USB 2.0 Specification, Section 7.1.2.2.
Test Description: EL_6: A USB 2.0 HS driver must a differential rise and fall times of greater than 500ps. However, slew
rate measurement will be made and expressed in terms of (V/us) to ensure waveform with slow corners will not result in a measured rise/fall time that is
slower than the actual edge rate. The conversion from rise time to edge rate uses the specified rise time over 80% of the nominal peak to peak signal
amplitude.
Test Summary: Pass
Test Limits: Pass/Fail Device Packet Rise Time Pass
Test Condition Pass Rise Time 680.300ps
Reference: USB 2.0 Specification, Section 7.1.2.2.
Test Description: EL_6: A USB 2.0 HS driver must a differential rise and fall times of greater than 500ps. However, slew
rate measurement will be made and expressed in terms of (V/us) to ensure waveform with slow corners will not result in a measured rise/fall time that is
slower than the actual edge rate. The conversion from rise time to edge rate uses the specified rise time over 80% of the nominal peak to peak signal
amplitude.
Test Summary: Pass
Test Limits: Pass/Fail Device Packet Fall Time Pass
Test Condition Pass Fall Time 698.220ps
Reference: USB 2.0 Specification, Section 7.1.2.2.
Test Description: EL_7: A USB 2.0 HS driver must have monotonic data transitions over the vertical openings specified in
the appropriate eye pattern template.
Test Summary: Pass
Test Limits: Pass/Fail Non-Monotonic Edge Pass
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EL_21 Device Sync Field Length Test
Result Details
Trial 1
EL_25 Device EOP Length Test
Trial 1: Non-Monotonic Edge
Reference: USB 2.0 Specification, Section 8.2.
Test Description: EL_21: The SYNC field for all transmitted packets (not repeated packets) must begin with a 32 bits
SYNC field. However since the first K bit is allowed to be distorted, the test will measure the SYNC field from the first J bit onwards (31 bits).
Test Summary: Pass
Test Limits: [63.610ns to 65.610ns] Device Sync Field Length 64.624ns
First K Bit length 2.005ns Test Message Correct waveform measured EL_21:Port Under Test Port1
Trial 1: Device Sync Field Length
Reference: USB 2.0 Specification, Section 7.1.13.2.
Test Description: EL_25: The EOP for all transmitted packets (except SOFs) must be an 8-bit NRZ byte of 01111111
without bit stuffing.
Test Summary: Pass
Test Limits: [15.600ns to 17.700ns] Device EOP Length 17.122ns
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Result Details
Trial 1
EL_22 Measure Interpacket Gap Between Second and Third Packets
Result Details
EL_22 Measure Interpacket Gap Between First and Second Packets
Result Details
Trial 1
Test Msg None. EOP bits 8.000000e+000 EL_25:Port Under Test Port1
Trial 1: Device EOP Length
Reference: USB 2.0 Specification, Section 7.1.18.2.
Test Description: EL_22: When transmitting after receiving a packet, hosts and devices must provide an inter-packet gap
of at least 8 bits times and not more than 192 bit times.
Test Summary: Pass
Test Limits: [16.640ns to 399.400ns] Inter-packet gap_23 319.851ns
EL_22:Port Under Test Port1
Reference: USB 2.0 Specification, Section 7.1.18.2.
Test Description: EL_22: When transmitting after receiving a packet, hosts and devices must provide an inter-packet gap
of at least 8 bits times and not more than 192 bit times.
Test Summary: Pass
Test Limits: [16.640ns to 399.400ns] Inter-packet gap_12 309.680ns
Interpacket Gap ScreenShot (See image) EL_22:Port Under Test Port1
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EL_28 Measure Device CHIRP-K Latency
Result Details
Trial 1
EL_29 Measure Device CHIRP-K Duration
Trial 1: Interpacket Gap ScreenShot
Reference: USB 2.0 Specification, Section 7.1.7.5.
Test Description: EL_28: Devices must transmit a chirp handshake no sooner than 2.5us and no later than 6ms when
being reset from a suspend state. Devices must transmit a chirp handshake no sooner than 2.5us and no later than 3ms when being reset from a full-
speed state.
Test Summary: Pass
Test Limits: [2.500µs to 6.000000ms] Device CHIRP-K Latency 1.503746ms
EL_28:Port Under Test Port1
Trial 1: Device CHIRP-K Latency
Reference: USB 2.0 Specification, Section 7.1.7.5.
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Result Details
EL_40 Device Resume Timing Response
Result Details
Trial 1
EL_27 Device CHIRP Response to Reset from Hi-Speed Operation
Result Details
Trial 1
Test Description: EL_29: The CHIRP handshake generated by a device must be at least 1ms and not more than 7ms in
duration.
Test Summary: Pass
Test Limits: [1.000ms to 7.000ms] Device CHIRP K Duration 2.000ms
EL_29:Port Under Test Port1
Reference: USB 2.0 Specification, Section 7.1.7.7.
Test Description: EL_40: If a device is in the suspend state, and was operating in hi-speed before being suspended, then
device must transition back to hi-speed operation within 2 bit times from the end of resume signaling. Note: It is not feasible to measure the device
transition back to hi-speed operation within 2 bit times from the end of the resume signaling. The presence of SOF at nominal 400mV amplitude
following the resume signaling is sufficient for this test.
Test Summary: Pass
Test Limits: Pass/Fail Device Resume Test Pass
Resume SOF screenshot (See image) Time first SOF detected 126.169µs Amplitude of detected SOF 427.420mV
EL_40:Port Under Test Port1
Trial 1: Resume SOF screenshot
Reference: USB 2.0 Specification, Section 7.1.7.5.
Test Description: EL_27: Devices must transmit a CHIRP handshake no sooner than 3.1ms and no later than 6ms when
being reset from a non-suspended hi-speed mode. The timing is measured from the beginning of the last SOF transmitted before the reset begins.
Test Summary: Pass
Test Limits: [3.100ms to 6.000ms] Device Reset from High-speed 3.503ms
EL_27:Port Under Test Port1
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EL_28 Device CHIRP Response to Reset from Suspend
Result Details
Trial 1
EL_8 Device J Test (Informative)
Trial 1: Device Reset from High-speed
Reference: USB 2.0 Specification, Section 7.1.7.5.
Test Description: EL_28: Devices must transmit a chirp handshake no sooner than 2.5us and no later than 6ms when
being reset from a suspend state. Devices must transmit a chirp handshake no sooner than 2.5us and no later than 3ms when being reset from a full-
speed state.
Test Summary: Pass
Test Limits: [2.500µs to 6.000000ms] Device Reset from Suspend 1.503726ms
D+ Voltage 2.937050e+000 D- Voltage -2.366770e-002 EL_28:Port Under Test Port1
Trial 1: Device Reset from Suspend
Reference: USB 2.0 Specification, Section 7.1.1.3.
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Result Details
EL_8 Device K Test (Informative)
Result Details
EL_9 Device SE0_NAK Test (Informative)
Result Details
EL_31 Device Hi-Speed Terminations Enable and D+ Disconnect Time
Result Details
Trial 1
Test Description: EL_8: When either D+ or D- are driven high, the output voltage must be 400mV +/- 10% when
terminated with precision 45 ohm resistors to ground. This test is informative only and is no longer required for certification.
Test Summary: Pass
Test Limits: Pass/Fail J Test Pass
JTest - DC Voltage on D+ line 455mV JTest - DC Voltage on D- line 8mV EL_8:Port Under Test Port1
Test Condition Waiver
Reference: USB 2.0 Specification, Section 7.1.1.3.
Test Description: EL_8: When either D+ or D- are driven high, the output voltage must be 400mV +/- 10% when
terminated with precision 45 ohm resistors to ground. This test is informative only and is no longer required for certification.
Test Summary: Pass
Test Limits: Pass/Fail K Test Pass
KTest - DC Voltage on D- line 455mV KTest - DC Voltage on D+ line 8mV EL_8:Port Under Test Port1
Test Condition Waiver
Reference: USB 2.0 Specification, Section 7.1.1.3.
Test Description: EL_9: When either D+ or D- are not being driven, the output voltage must be 0V +/- 10mV when
terminated with precision 45 ohm resistors to ground. This test is informative only and is no longer required for certification.
Test Summary: Pass
Test Limits: Pass/Fail SE0NAK Test Pass
SE0NAKTest - DC Voltage on D+ line 8mV SE0NAKTest - DC Voltage on D- line 8mV EL_9:Port Under Test Port1
Reference: USB 2.0 Specification, Section 7.1.7.5.
Test Description: EL_31: During device speed detection, when a device detects a valid CHIRP K-J-K-J-K-J sequence, the
device must disconnect its 1.5K pull-up resistor and enable its hi-speed terminations within 500us.
Test Summary: Pass
Test Limits: [10ns to 500.000µs] Device Enable HS termination time 3.723µs
EL_31:Port Under Test Port1
Trial 1: Device Enable HS termination time
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EL_38 EL_39 Device Suspend Timing Response
Result Details
Trial 1
Reference: USB 2.0 Specification, Section 7.1.7.6.
Test Description: EL_38: A device must revert to full-speed termination no later than 125us after there is a 3ms idle period
on the bus. EL_39: A device must support the Suspend state.
Test Summary: Pass
Test Limits: [3.000ms to 3.125ms] Device Suspend Timing Response 3.002ms
Suspend Timing Response Screenshot (See image) D + voltage 2.923 D - voltage 7m
EL_39:Device Support Suspend State Pass EL_38:Port Under Test Port1
Trial 1: Suspend Timing Response Screenshot
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