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A presentation on

HIGH VOLTAGE MOSFETs

Department of Electronics Engineering

Indian Institute of Technology(Banaras Hindu University)

Shivanshi Gupta

oll !o" #$%&'E!&%

!)" )* S+IDES,$-

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High voltage /)S*ETs structure0, %

The presence of a lo3,doped drift region in addition helps to sustain

high,voltages"

The charge carriers flo3 from source to drain through the channeland the drift region"

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4

H./)S structure

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Types of H./)S0, '

#" +D/)S (The +aterally Diffused /)S*ET 4

$" ., Groove /)S (./)S4

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7

LDMOS structur

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/)DE++I!G STATEG< -

DRIFT RESISTA!"E MODEL0,

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=

DRIFT RESISTA!"E MODEL

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D" #EHAVIO$R OF LDMOS

%&

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A!A/A+)US E**E2TS ##

>UASI ? SATUATI)!

SE+* HEATI!G

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'uasi saturation ct

+o3 doping concentration in the drift region of high,voltage +D/)S

produces a :uasi saturation region"

T *uasi+saturation stat a,,ars at t ,oint -n t inco.in/

carrir 0nsit1 c0s t 0o,in/ 343 o t 0rit5

i t 43ocit1 saturation occurs irst in t 0rit r/ion

insta0 o t cann3 r/ion t *uasi+saturation ct a,,ars in

t 04ic caractristics"The reason for the occurrence of :uasi,saturation

at high,gate voltages is that the conductivity of the channel

region is high7 3hereas that of the thin,gate,o8ide drift region

is lo3 due to depletion in the drift region" *or further increasing

drain voltages7 the depletion layer 3idens7 and the currentthrough the drift region 5ecomes con@ned to a limited effective

cross section 73hich leads to velocity saturation in the

drift region

#$

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>UASI ? SATUATI)! #% )utput

2haracteristics

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SE+* HEATI!G 15

P = IDS VDS

IDS= nCoxW/L (VGS-VT)

2

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S3 +atin/ ct %6

ith the device scaling and increasing integration density self heating

5ecomes one of the maor issues in device design"

Due to the internal resistance (on,resistance4"

In high,voltage devices the self,heating effect no longer remains Insignificant

ith the increase of the internal device temperature due to self,

heating the charge carriers mo5ility decreases 5ecause of increased

lattice scattering" This causes a negative resistance effect in the

characteristic output curves 3here the current starts falling 3ithincreasing drain voltage

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IDS vs" .DS of &. +D/)S transistor 17

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Applications #=

+D/)S devices7 3ith their high 5rea6do3n voltage7provide

e8cellent po3er7

linearity and efficiency performance up to % GH9 5 For ts

rasons LDMOS is no-a0a1s t 3a0in/ tcno3o/1 orco..rcia3 bas station ,o-r a.,3iirs 5

T LDMOS structur co.bins a sort cann3 3n/t

-it i/ bra70o-n 4o3ta/ as 0sir0 or high po3er

* amplifiers in 5ase stations of 3ireless communications

systems

UH* and +,5and po3er amplifiers

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Problem with normal MOS structure20

In low-power applications there is no reason why MOSFETs

can't be used anywhere a bipolar transistor can they are! in"act! more #ersatile than bipolars $ in low-powerapplications%& ut! therein lies the rub $ power" It is 4r1 0iicu3t(an0 ,nsi4) to .a7 a MOSFET -ic can ,ass 3ar/ currnts8 t .ain

rason bin/ t ori9onta3 .a7+u, o or0inar1 MOSFETs5 #i,o3ar transistors

a4 4rtica3 currnt 3o- an0 can ,ass 3ar/r currnts bcaus o it5 Fi/ur so-s

t tortica3 cross+sction o a bi,o3ar transistor an0 a si.i3ar cross+sction o aMOSFET is so-n in5 2urrent flo3 in the 5ipolar is vertically up3ards from collector

to emitter

an0 t 3ar/ ara trou/ -ic t currnt ,asss a33o-s 3ar/ currnts5

/)S*ET current flo3 is from left to right (drain to source4 and the small area of

current flo3 means smaller currents than in a similar,si9ed 5ipolar transistor"

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SOL$TIO!+ V+MOS TRA!SISTORS

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25 VMOS Transistors 2%

The ./)S transistor7 named after the .,shaped groove7 is a vertical /)S*ET3ith high current handling capa5ility as 3ell as high 5loc6ing voltage"

It consists of a dou5le diffused n;Cplayer7 3hich is cut 5y a .,shaped groove

" The su5strate acts as a drift region"The vertical structure allo3s the use of a lo3,doped drain region7 3hich results

in a high 5loc6ing voltage"

The .,groove is easily fa5ricated 5y anisotropically etching a (#&&4 siliconsurface using a concentrated )H solution"

The .,groove is then coated 3ith a gate o8ide7 follo3ed 5y the gate electrode"

As t V+/roo4 cuts trou/ t 0oub3 0ius0 3a1r it crats t-o

4rtica3 MOSFETs on on ac si0 o t /roo4"

The com5ination of the .,groove 3ith the dou5le diffused layers results in a

short channel length7 3hich is determined 5y the thic6ness of the p,type layer"

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$$

.,/)S structure

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$%

$

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*or lo3 drain voltage7 channel and drift regions 5oth contri5ute to the on,resistance" *or

large gate 5iases7 the channel resistance and7 hence7 the total on,resistance reduces until

a point 3here the on,resistance 5ecomes independent of further change in gate 5ias" At

this stage7 the on,resistance 5ecomes almost e:ual to the drift resistance" A small value

of on,resistance is al3ays desira5le to achieve lo3 po3er dissipation (P dissipation47 given

$

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A,,3ications8+

./)S *ETs overcome the po3er pro5lems normally associated 3ith *ETs"

2urrent flo3 is no3 vertically up3ards7 from drain to source7 in much the same

3ay as in 5ipolar transistors" The larger chip area means large current" Hence 3e

have transistors e8hi5iting all the advantages of /)S*ETs 3ithout the usual

po3er limits" ./)S *ETs also have some other very interesting advantages0

lo3 )! resistance F good for audio s3itching purposes" Lo- O! rsistancs

an0 i/ OFF rsistancs .a7 VMOS FETs i0a3 or us in au0io s-itcin/

nt-or7s5 Fi/ur so-s a si.,3 on:o au0io s-itc contro330 b1 t 4o3ta/on t transistor /at8 ; %

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$

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2onclusion 1 *uture Trends

+D/)S and ./)S devices7 3ith their high 5rea6do3n voltage7provide e8cellent po3er7 linearity and efficiency performance up to %

GH9" *or these reasons7 these are no3adays the leading technology

for commercial 5ase station po3er amplifiers

These device are currently the device of choice for numerous UH*

and +,5and po3er amplifiers in 5roadcast7 communication and radar

systems"

Their capa5ility to go 5eyond % GH9 Is recently investigated.

$

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'uris ??

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Than6 you