EE 147/247A Prof. Pister Fall 2016

Homework Assignment #10 SOLUTIONS

CoventorWare and SEMulator 3D are installed on computers in Cory 125 (c125m-{1…24}). To run the tools, open a terminal and run the command: /share/instsww/Coventor/<program> where <program> is the program you are running. A helpful tutorial on CoventorWare can be found at: https://inst.eecs.berkeley.edu/~ee247b/sp16/homework/CoventorWare_Tutorial.pdf The SEMulator3D tutorial can be found at: https://berkeley.box.com/s/3ak490bmb68yqw7z7yicv9nz7q4t2f8a Necessary files for this assignment can be found at: https://berkeley.box.com/s/erkg9lw39g4vhdgkmjegbxa88u2zgork

1. The following layout is made in polyMUMPs. a. Draw cross-section AA by hand

Solution: 5 pts. for final cross-section Compare your cross-section to the cross-section in part d. Your hand drawn one and the SEMulator3D one should match.

b. Layout the cross-section in SEMulator3D. Use the process files polyMUMPs.vmpd polyMUMPs.vproc and the starter layout file polyMUMPs_starter.cat found under the piazza resources tab. Use the labeled dimensions. Submit your layout file. Solution: 1 pt. for layout file Sample layout shown below:

c. Build the model with 0.1 resolution. Take a screenshot of your device. Solution: 1 pt. for screenshot of device Sample screenshot of device shown below:

d. Look at cross-section AA of the device (Under the menu go under “View>Enable Cross Sections” and press ctrl+shift+f). Take a screenshot of the cross-section. Solution: 1 pt. for cross-section Sample cross-section screenshot shown below:

2. The polyMUMPs design guide suggests a combination of the DIMPLE, P1P2VIA, and ANCHOR2 masks to breach the nitride layer for contact to the substrate. In a layout editor working with the polyMUMPS process, you create a new layer called “PIT”. The minimum size of a PIT feature is 30um. When you draw a features on layer PIT, what you get is features on three masks in the final layout: DIMPLE is the same size as PIT. P1P2VIA is 7um smaller than PIT in every direction. ANCHOR2 is 5um smaller in every direction than P1P2VIA (these recommendations are very conservative). Assuming a 40um square on PIT is the only feature in your layout. In the polyMUMPs.vproc process file, add a 6:1 selectivity for the nitride layer to the POLY2 etch step. Draw a 40um square of PIT and look at the resulting 3D model cross-section. Why would you want to have access to the substrate?

Solution: 3 pts. total; 1 pt. for layout, 1 pt. for cross section, 1 pt. for correct answer to question A sample layout is shown below:

The resulting device from the layout is shown below (use it as reference to confirm your answer). Notice that the substrate is no longer covered by any layers, therefore creating access to it.

The resulting and expected cross section is shown below:

Answer to question: When dealing with microelectronics, being able to make electrical contact to the substrate is the main reason to gain access to it.

3. You could potentially remove both polysilicon layers using the POLY2 etch by a combination of POLY1 and P1P2VIA. Using the modified process file from problem 2 and a combination of ANCHOR1, POLY1, and P1P2VIA, what is the issue with doing this if your sole intention is to remove the polysilicon? Solution: 2 pts. for the right answer In page 31 of the PolyMUMPs Design Handbook [1], the handbook explains the following:

By using this new combination of masks, the substrate could be breached, when the only goal is to remove all the polysilicon. Shown below is an example of what a device would look like using this mask combination:

Also shown below is an example of the cross section of this device:

Notice another problem: even if breaching the substrate was not a problem, the device is left with stringers, which are undesirable in almost every case.

4. You could potentially use a combination of ANCHOR1 and P1P2VIA to form a hole to anchor a POLY2 structure instead of using ANCHOR2. Simulate this in SEMulator3D by placing overlapping 3umx3um ANCHOR1 and P1P2VIA squares and a 5umx5um POLY2 square that encloses them. Why is this an inadvisable combination? What happens when there is a (very serious) 1um misalignment between the masks? What is advantageous about using only ANCHOR2 for the contact? Solution: 3 pts.: 1pt. for an approximately correct answer per question Below are the simulation results from using a combination of ANCHOR1 and P1P2VIA to form a hole to anchor POLY2 (left), and also simply using ANCHOR2 to form this contact (right). You obtain the following topography:

Zooming in, you can also observe the cross section of each anchoring method, where again the combination of ANCHOR1 and P1P2VIA to form a hole to anchor POLY2 is on the left, and using ANCHOR2 to form this contact is on the right:

Answers: a. Notice that the contact on the left is very small, about 1-1.5µm, while the ANCHOR2

contact on the right is much wider. This is an inadvisable combination because the POLY2 contact to the substrate is very small and may not be strong enough to maintain the connection.

b. If there were a 1µm misalignment between the masks, the poly2 contact to the substrate might not even form since it is only 1-1.5µm already.

c. Using only ANCHOR2 for the contact is advantageous because it forms a wider POLY2 contact with the substrate, therefore creating more strength in the connection. It is also easier to align one mask as opposed to two masks.

5. In SEMulator3D, create a (very) simplified process file for the SOIMUMPs process. You can use

Conformal Depositions of materials “SiO2_BOX” and “Si_Xtal” to form the SOI wafer. Use depositions and etches (define masks in etches) to pattern materials like the pad metal, silicon, and blanket metal. Finally use an isotropic etch to etch the silicon dioxide according to the SOIMUMPs design rules. Draw a sample structure using your process to make sure it is correct and take a screenshot. Upload your process file on bcourses along with your assignment. See reference [1] for specifics on the process.

Solution: 5 pts. total; 3 pts. for approximately correct process file, 2 pts. for screenshot confirming correct process The process file can be as simple as the process shown below:

To confirm that the process worked correctly, the layout below was used. It is an anchored cantilever beam device layer (red) whose free end hangs over a trench (green) in the substrate. Metal (blue) is also deposited on top of the anchor and the beam.

Below is the layer list for the layout above:

To confirm the correct process, the device can be seen in the images below. Silicon dioxide is seen as a light blue, single crystal Silicon is seen as red, and metal is seen as a yellow/gold color. Zoomed out:

Zoomed in (notice the metal layer (yellow) and the trench hole:

A zoomed in cross section can also be observed to confirm the isotropic SiO2 etch.

6. We will analyze a prebuilt cantilever using CoventorWare. Start a new CoventorWare project and open the Build Solid Model interface. Load MUMPs.mpd, PolyMUMPs.proc, and cantilever.cat into the Materials, Process, and Layout fields respectively. First some hand analysis:

a. Calculate, by hand, the spring constant of the cantilever beam, the mass of the plate at the end of the beam, and the resonant frequency of the structure, and the capacitance between the plate and the poly0 pad. You can open the layout file for dimensions and layer names. Solution: 5 pts. total: 1 pt. for effort, 1 pt. for correct spring constant, 1 pt. for correct mass, 1 pt. for correct resonant frequency, 1 pt. for correct capacitance Beam dimensions: Lb= 85µm wb= 2µm tb= 2µm

Plate dimensions: Lp= 25µm wp= 25µm tp= 2µm Poly0 pad dimensions: Lpoly0= 17µm wpoly0= 17µm Young’s modulus E= 158GPa (from design handbook) Beam spring constant:

𝒌𝒃𝒆𝒂𝒎 =𝑬𝒕𝟑𝒘𝟒𝑳𝟑

𝒌𝒃𝒆𝒂𝒎 =(𝟏𝟓𝟖𝑮𝑷𝒂) 𝟐µμ𝒎 𝟑(𝟐µμ𝒎)

𝟒(𝟖𝟓µμ𝒎)𝟑

Isotropic SiO2 etch

𝒌𝒃𝒆𝒂𝒎 = 𝟏.𝟎𝟒  𝑵𝒎

Mass of plate (ignore mass of beam):

𝒎𝒑𝒍𝒂𝒕𝒆 = 𝑽𝝆

𝒎𝒑𝒍𝒂𝒕𝒆 = 𝟐𝟓µμ𝒎 𝟐𝟓µμ𝒎 𝟐µμ𝒎 𝟐𝟑𝟎𝟎  𝒌𝒈𝒎𝟑

𝒎𝒑𝒍𝒂𝒕𝒆 = 𝟐.𝟖𝟕𝟓  [𝒏𝒈]

Resonant frequency:

𝝎 =𝒌𝒃𝒆𝒂𝒎𝒎𝒑𝒍𝒂𝒕𝒆

𝝎 =𝟏.𝟎𝟒   𝑵𝒎𝟐.𝟖𝟖   𝒏𝒈

𝝎 = 𝟔𝟎𝟐.𝟎𝟓 ∗ 𝟏𝟎𝟑  𝒓𝒂𝒅𝒔

𝝎 = 𝟔𝟎𝟐.𝟎𝟓  𝒌𝒓𝒂𝒅𝒔

Capacitance between the plate and the poly0 pad:

𝑪 = 𝜺𝟎𝑨𝒅

where A is the overlap area (area of the poly0 pad).

𝑪 =𝟖.𝟖𝟓 ∗ 𝟏𝟎!𝟏𝟐   𝑭𝒎 𝟏𝟕µμ𝒎 𝟏𝟕µμ𝒎

𝟐µμ𝒎

𝑪 = 𝟏.𝟐𝟖 ∗ 𝟏𝟎!𝟏𝟓  [𝑭]

𝑪 = 𝟏.𝟐𝟖  𝒇[𝑭]

b. How much will the end of the plate deflect with a 1uN load at the tip of the plate? Solution: 1 pt. for approximately correct answer F=1µN

𝒚𝒑𝒍𝒂𝒕𝒆 𝑳 =𝑳𝟑

𝟑𝑬𝑰 𝑭  +  𝑳𝟐

𝟐𝑬𝑰 𝒓𝑭 + 𝒚! 𝑳 𝒓

𝒚𝒑𝒍𝒂𝒕𝒆 𝑳 =𝑳𝟑

𝟑𝑬𝑰 𝑭  +  𝑳𝟐

𝟐𝑬𝑰 𝒓𝑭 + 𝒓𝑳𝟐

𝟐𝑬𝑰 𝑭  +  𝑳𝑬𝑰 𝒓𝑭

𝒚𝒑𝒍𝒂𝒕𝒆 𝑳 = 𝟐.𝟎𝟖µμ𝒎  𝒘𝒊𝒕𝒉  𝟏µμ𝑵  𝒐𝒇  𝒇𝒐𝒓𝒄𝒆

c. How much will the tip of the plate deflect with 10V between the cantilever structure and the poly0 pad underneath the plate? You can assume the electrostatic force is a point load at the center of the plate. Solution: 2 pts. total; 1 pt. for approx.. correct electric force, 1 pt. for approx. correct deflection

𝑭𝒆𝒍 =𝟏𝟐 𝜺𝟎𝑽

𝟐 𝑨𝒈𝟐

𝑭𝒆𝒍 =𝟏𝟐 𝟖.𝟖𝟓 ∗ 𝟏𝟎!𝟏𝟐

𝑭𝒎 𝟏𝟎𝑽 𝟐  

𝟏𝟕 ∗ 𝟏𝟎!𝟔 𝟏𝟕 ∗ 𝟏𝟎!𝟔

𝟐 ∗ 𝟏𝟎!𝟔 𝟐

𝑭𝒆𝒍 = 𝟑𝟏.𝟗𝒏𝑵

𝒚 =𝑭𝒌

𝒚 = 𝟑𝟏.𝟗𝒏𝒎

Now we will analyze the structure using CoventorWare: d. Build the solid model of the layout in CoventorWare. Take a screenshot of your solid

model. Hide the substrate and the nitride layers and add the poly0 and the poly1 layers to the mesh model. Mesh the model using 1x1x1 Manhattan brick elements. Take a screenshot of the meshed model. Solution: 1 pt. for screenshot of meshed model, as seen below

Select and name the bottom face of the each poly0 part as Anchor and name the end face of the cantilever plate Tip. Name the cantilever conductor (expand the Conductors/Dielectrics tab

to see the different conductors available) ActuatorElectrode and name the poly0 pad under the plate GroundElectrode. Image examples are shown below.

Anchor

Tip

ActuatorElectrode

GroundElectrode Begin a new MemElectro analysis. Put 1V between ActuatorElectrode and GroundElectrode to simulate charging the plate. Run the analysis and view the results. e. Open the capacitance matrix. Why is the capacitance different from your analytically

calculated capacitance? Solution: 2 pts. total; 1 pt. for approx. capacitance value, 1 pt. for answer to question The capacitance value we found in the matrix is: C=2.2fF. The calculated capacitance value is 1.28fF. The calculated capacitance is different from the analytical capacitance because Coventor takes into account the fringing fields of the plate, which almost double the capacitance.

f. View the 3D results of the charge density. Zoom into the corners of the structure and take a screenshot. Why is the charge density greatest at the edges and corners?

Solution: 1 pt. for correct answer to question A screenshot of the 3D results of the charge density can be seen below.

Zooming into the corners, we observe the image below:

Notice that the corners are a darker color, closer to red than the rest of the plate, indicating a greater charge density in these areas. This higher charge density is due to the higher concentration of field lines at the corners.

Begin a new MemMech analysis. Under SurfaceBCs, put the fixall condition on patch Anchor and put a LoadPatchNodes condition on patch Tip. Define LoadPatchNodes with a vector LoadValue and -1 in Z. Units for this boundary condition are in uN and act on the entire face. Run the analysis. g. How much did the end of the plate deflect? Is there good agreement with your hand

calculation? Solution: 2 pts.; 1 pt. for plate deflection value, 1 pt. for answering question The resulting displacement matrix from this simulation can be seen below:

* Keep in mind that the displacements shown in the Coventor matrix results are already in microns. The relevant displacement in this case is the minimum Node Z Displacement, which is about 2.17µm in the negative ‘z’ direction. The hand calculations resulted in a displacement of 2.08µm, which is in close agreement to the simulated displacement.

h. Open the deflected structure in the visualizer. Use the “Deform using displacements” option under the CoventorWare menu. Take a screenshot. Solution: 1 pt. for screenshot Below is the structure without deformation on the left, and the deformed structure on the right.

Begin a new MemMech analysis, this time change the physics in the first drop menu of the MemMech Settings window to “Modal (non-equilibrium).” Under SurfaceBCs place the fixall condition on Anchor. Calculate the first 5 mode shapes. i. Open the results and look at the modeDomain table. Record the frequency of each mode

shape. How does your calculated resonant frequency compare to the first mode? Why would it be different from your simple analysis? Solution: 2 pts.; 1 pt. for frequency of first 5 mode shapes, 1 pt. for answering why they are different from the hand analysis Below is the frequency of the first five mode shapes:

The calculate hand analysis resulted in a frequency of 602k rad/s, which is in the same order of magnitude as the simulated results. The simulated resonant frequency is given in Hz, so it would be equal to 455k rad/s. It is different from the simple analysis because Coventor takes into account other parameters such as the mass of the plate, which we ignored for the hand calculations.

j. In the 3D visualizer you can see the mode shapes and animate them using the Coventor > Mode Shapes menu option. Animate the mode shapes to see what is happening to the beam.

Begin a new CoSolveEM analysis. Under the DC_ConductorsBCs place 10V on ActuatorElectrode and 0V on GroundElectrode. Under SurfaceBCs place the fixall condition on Anchor. Run the analysis. It may take a while. You can increase the amount of memory the MemMech solver uses under the advanced options of the solver settings tab. k. How much did the tip of the plate deflect? Why is it different from your hand calculation? Solution: 2 pts. total; 1 pt. for tip deflection, 1 pt. for explanation on difference in results In the z direction, the plate deflects about 70.7nm, which is about twice as much as the hand calculation. The difference between the calculated and the simulated displacements, results mostly from the fact that the hand calculations ignored fringing fields. Coventor also takes fringing fields into account, and so this almost doubles the electrostatic force, therefore doubling the deflection.

[1] SOIMUMPs design rules: http://www.memscapinc.com/__data/assets/pdf_file/0019/1774/SOIMUMPs.dr.v8.0.pdf