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HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to...

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Hezi Saar, Sr. Staff Product Marketing Manger Synopsys Enabling Higher Data Rates and Variety of Channels with MIPI D-PHY℠
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Page 1: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

Hezi Saar, Sr. Staff Product Marketing MangerSynopsys

Enabling Higher Data Rates and Variety of Channels with MIPI D-PHY℠

Page 2: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 2

Agenda• Designmotivation• MIPID-PHY evolution• SummaryofMIPID-PHYspecification• MIPIchannelevolution• ChannelmodelingresultsinADS• SpecificationrunthroughforD-PHYv2.1• MIPID-PHY3.0approvedroadmap

Synopsys

Page 3: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 3

DesignMotivation• Higherdatarate• Adaptiontonewertechnologies• Longerchannellength,channelevolution• Backwardcompatible• Reliablewithsufficientmargins• Augmentingexistingecosystem• Meetingcameraanddisplaypresentandfutureneeds• Growingmarketapplicationsandsegments• Thede-factostandardforcameraanddisplay• TargetautomotivesegmentforADASapplications

Synopsys

Page 4: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 4

MIPID-PHYEvolution• D-PHY1.0 1.0Gbps• D-PHY1.1 1.5Gbps• D-PHY1.2 2.5Gbps• D-PHY2.0/2.1 4.5Gbps• D-PHY3.0 10-14GbpsHigherdatarateenableshighpixelcountcamerasanddisplays

Synopsys

Page 5: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 5

BasicPHYArchitectureClock

MultiplierUnit

PHYAdapterLayer

PPI

PPI

PPI

D-PHYMasterClockLaneModule

D-PHYMasterDataLaneModule

D-PHYMasterDataLaneModule

D-PHYSlaveClockLaneModule

D-PHYSlaveDataLaneModule

D-PHYSlaveDataLaneModule

PPI

PPI

PPIPHY

AdapterLayer

APPI APPI

PHY PHY

RefClockControls IQ

MasterSide SlaveSide

APPI=AbstractedPHY-ProtocolInterface(completePHY,alllanes)PPI=PHYProtocolInterface(perlane,somesignalscanbesharedwithmultiplelanes)

Page 6: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 6

LaneModule

Page 7: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 7

SpecParameters D-PHY3.0 D-PHY2.0/2.1 D-PHY1.2 D-PHY1.1 D-PHY1.0

DataRate 10-14 Gbps 4.5Gbps 2.5Gbps 1.5Gbps 1Gbps

HS TxDifferentialVoltage

140-270mV 140-270mV 140-270mV 140-270mV 140-270mV

HSTxSingleEndedOutputImpedance

40-62.5ohms 40-62.5ohms 40-62.5ohms 40-62.5ohms 40-62.5ohms

HSTx CommonModeStaticVoltage

150-250mV 150-250mV 150-250mV 150-250mV 150-250mV

HSTxRise/FallTimes(20-80%)

TBD 30-100ps(4.5Gbps) 50ps-0.4UI 100ps-0.35UI 100ps-0.3UI

Tx Cpad Target(Drivenbyreturnlossinthespec)

TBD 3pF 3.3pF 3pF 3pF

HSTxDe-emphasis TBD -3.5dB(+/-1dB)-6dB(+/-1dB)

None None None

Spread SpectrumClocking

ModulationRate~30-33KhZSSCDeviation~-5000PPM

DownSpread

ModulationRate~30-33KhZSSCDeviation~-5000PPM

DownSpread

None None None

Scrambling YesNeedtobesupportedbytheController

YesNeedtobesupportedbytheController

None None None

Page 8: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 8

SpecParameters D-PHY3.0(In progress) D-PHY2.0 D- PHY1.2 D-PHY1.1 D- PHY1.0

HSTxTiming TBD TJ~0.3UIDJ~0.2UIRJ~0.1UIAllJitterrelativetoclockStaticSkew ClocktoData~-0.2to0.2UI

TJ~0.3UIAllJitterrelativetoclock.StaticSkew ClocktoData~-0.2to0.2UI

DatatoClockSkew~-0.2 to0.2UI

DatatoClockSkew~-0.15 to0.15UI

HSTxAC CMNoise 15mVrms(>450MhZ)25mVpk-pk(50-450MhZ)

15mVrms(>450MhZ)25mVpk-pk(50-450MhZ)

SameasDPHY2.0 Same Same

BER 1e-12 1e-12 1e-12 1e-12 1e-12

LPTxOutputHighLevel

TBD 0.95-1.05 0.95to1.3V 1.1-1.3 1.1-1.3V

LPTxMinSlewRate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns

LPTxMaxSlewRate TBD 500mV/ns(0pF Load)300mV/ns(5pF Load)250mV/ns(20pF Load)150mV/ns(70pF Load)

SameasDPHY2.0 Same Same

ChannelLoss MPHY SpecChannel2(7-14inch)

MPHY SpecChannel2(7-14inch)

MPHYSpecChannel2(7-14inch)

DPHYSpecChannel(5-11inch)

DPHYSpecChannel(5-11inch)

ChannelISI TBD 0.2UI 0.2UI +/-0.1UI +/-0.2UI

Channel ClktoDataStatix Skew

TBD +/-0.1UI +/0.1UI None(IncludedinChannelISI)

None(IncludedinChannelISI)

Page 9: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 9

SpecParameters D- PHY3.0 D- PHY2.0 D- PHY1.2 D- PHY1.1 D- PHY1.0

HSRxDeskew InternalClocktoDatausingTx CalibrationPattern

InternalClocktoDatausingTxCalibrationPattern

InternalClocktoDatausingTxCalibrationPattern

None None

HSRxDifferentialInputThreshold

TBD +40mVto-40mV +40mVto-40mV +70mVto-70mV +70mVto-70mV

HSRxCommon ModeDC

TBD 70-330mV 70-330mV 70-330mV 70-330mV

HSRxDifferentialInputImpedance

80-125ohms 80-125ohms 80-125ohms 80-125ohms 80-125ohms

HSRxCommonModeNoiseTolerance

TBD 100mV(pk-pk) 100mV(pk-pk) 200mV(pk-pk) 200mV(pk-pk)

HSRxJitterTolerance TBD Tjtol~0.5UIDJ~0.4UIRJ~0.1UI

Tjtol~0.5UI NoIndependentJitterSpec

NoIndependentJitterSpec

HSRxSkewTolerance TBC Static Skewof+/-0.3UIbetweenClockanddata

Static Skewof+/-0.3UIbetweenClockanddata

Setup/Hold~0.2UI

Setup/Hold~0.15UI

HSRxCommonModeVoltageDC

TBD 70-330mV 70-330mV 70-330mV 70-330mV

HSRxCommonModeTermination

TBD 14pF-60pF 14pF-60pF 2-60pF 2-60pF

Page 10: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 10

Synopsys

SpecParameters D-PHY3.0 D-PHY2.0 D-PHY1.2 D- PHY1.1 D- PHY1.0

LPRx MinInputVoltage

TBD 740mV 740mV 880mV 880mV

LPRxMinPulseWidth TBD 20ns 20ns 20ns 20ns

PPIDataBusWidth TBD 8/16/32bit 8bit 8bit 8bit

COGChannelSupportforDisplays

YesWIPPlantosupporthigherchannellossfordisplays.

YesWIPPlantosupporthigherchannellossfordisplays.

None Not Known -

Page 11: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 11

Synopsys

Page 12: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 12

Tx+ShortChannel+Termination(Tx EyeDiagram)

Synopsys

HexEyeWidth~0.16UIEyeWidth~0.54UI

TransmitSwing~+140to-140mVTxImpedance~62.5ohmsTxDeemp~NoneTxCpin~3pF

Page 13: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 13

Tx+SpecChannel +Termination

Synopsys

EyeHeight~86mVEyeWidth~0.577UI

EyeHeight~88mVEyeWidth~0.576UI

TransmitSwing~+140to-140mVTxImpedance~62.5ohmsTxDeemp~NoneTxCpin~3pF

Page 14: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 14

Tx+SpecChannel+Termination(9Gbps)• DataRate=9Gbps• PatternPRBS9• Tx de-emphasis=7dB• Tx outputimpedance125ohm• Cpad =1.5pf• ChannelReference2• Rxtermination80ohm• RxequalizationCTLEadaptable.• Zero1=840Mhz• Pole1=1.048Ghz• Pole2=9.586Ghz• DC_gain 1.98776• RxDFEAdaptive2tap

Synopsys

Page 15: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 15

OverallLeoniChannelPerformance

Page 16: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 16

RosenbergerRG174

Page 17: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 17

RosenbergerRG5811

Page 18: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 18

RosenbergerRTK031

Page18

Page 19: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 19

Fakra ConnectorModeling• TDRperformance:

– ADSgeneratedequivalentmodels– S-parametermodel/TDRprofile

Synopsys

SourceKeysight Technologies

Page 20: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 20

Modesofoperation

Page 21: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 21

Page 22: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 22

Summary• MIPID-PHY

– Isthede-factostandardforcameraanddisplayconnectivity– Operatesat4.5Gbps overmultiplelanes– EnablesSoCs foremergingapplications:automotiveinfotainment

andadvanceddriverassistancesystems(ADAS),allowinghigherdatatransmissionoverlongerchannels

– Providesflexibility,speed,powerandcostbenefits– Useslow-latencytransitionsbetweenhigh-speedandlow-power

modeswithhighnoiseimmunityandhighjittertoleranceSynopsys

Page 23: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 23

MIPID-PHY3.0• Datarate10to14Gbps• SupportforautomotivegradePHYrequirementswithlong

channels• Transitionstoembeddedclockaboveadefineddatarates• RemainsbackwardcompatibletoMIPID-PHY2.1

Synopsys

Page 24: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

©2017MIPIAlliance,Inc. 24

Synopsys®DesignWare®MIPIIPPortfolio

Synopsys

Page 25: HS T3A 16-15 Synopsys Enabling Higher Data Rates...LP Tx Output High Level TBD 0.95-1.05 0.95 to 1.3V 1.1-1.3 1.1-1.3V LP Tx Min Slew Rate TBD 25mV/ns 25mV/ns 30mV/ns 30mV/ns LP Tx

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