474 • 2008 IEEE International Solid-State Circuits Conference

ISSCC 2008 / SESSION 26 / WIRELESS FREQUENCY GENERATION / 26.2

26.2 A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz

Andrea Mazzanti1, Pietro Andreani2

1University of Modena and Reggio Emilia, Modena, Italy2Lund University, Lund, Sweden

Colpitts oscillators have long been known for their excellent phase-noise properties; yet, a differential CMOS Colpitts oscillator,directly derived from a singled-ended topology, did not show a bet-ter phase noise performance than the conventional CMOS differ-ential-pair LC-tank oscillator, not even theoretically [1].

Fortunately, we can greatly improve the phase-noise performanceof a differential Colpitts oscillator by cross-coupling the MOS tran-sistors as shown in Fig. 26.2.1, where k is a positive constant; inthis case, one can prove (making use of the same analysis followedin [1]) that the phase-noise expression is given by (1) in Fig. 26.2.2,from which it can be immediately verified that the phase noise isminimum for n=0, where n=C1/(C1+C2). If we assume k=1, which isthe simplest choice, it can be shown that the ratio of the effectivenoise of the tank resistance to that of the MOS channel is 1:γ,which is the same ratio found for the conventional differential-pairLC-tank oscillator [1]. This shows that, contrary to what is oftenreasonably (and intuitively) assumed [2, 3], no “noise-shifting”capability is inherent to the Colpitts topology. Nevertheless, it istrue that, if n=0, the Colpitts topology is capable of delivering thehighest oscillation amplitude for a given bias current. This isbecause the amplitude of the fundamental current harmonic ismaximized by the typical Class-C nature of the Colpitts currentwaveforms (see Fig. 26.2.3), while the loaded tank resistance atresonance is maximized by n=0 (of course, n cannot be zero in asingle-ended Colpitts design). Because of this favorable property,the phase noise in a Colpitts oscillator with n=0 and k=1 is almost4dB lower than in the (ideal) differential-pair LC-tank oscillatorfor the same power consumption, which is indeed a large improve-ment.

While the condition n=0 is trivially enforced by removing C1, theoscillation frequency is no longer determined by the series combi-nation of C1 and C2, and an additional capacitor Ctank is now need-ed in the tanks. Moreover, C2 must be sized as large as possible tominimize its loading effect, thereby maximizing the oscillationamplitude.

One key problem found in this oscillator is that the oscillationamplitude must be very low for it to work properly, i.e., for thetransistors to be kept out of the triode region (as Fig. 26.2.3 shows,the fundamental current harmonic drops quickly when transistorsenter the triode region). In fact, it can be shown that the oscilla-tion amplitude is not allowed to increase beyond Vth/2, where Vth isthe MOS threshold voltage. In order to make this circuit useful inpractice, though, it is enough to bias the MOS gates at a voltageVbias suitably lower than Vdd, either through an RC filter that neg-ligibly loads the tanks, or by using the center-tapped secondarywinding of a transformer, whose primary replaces the tank induc-tance. In the latter case, if we use a transformer ratio larger thanunity, we can obtain a value of k larger than one, further decreas-ing the phase noise, according to (1).

Considering now that the current waveforms in the two C2 do notoverlap in time, and that the voltage over each C2 is almost con-stant, the oscillator behavior does not change if we connect the twocapacitors in parallel; the final topology is therefore given in Fig.26.2.4. Because of the shape of the current waveforms, independ-ently of how Vbias is delivered, we refer to this topology (i.e.,Vbias<Vdd, C1=0, C2 large) as the Class-C LC-tank oscillator.

Obviously, the Class-C and the conventional LC-tank oscillator aresuperficially very similar, the two key differences being theadjustable Vbias and the large Ctail (=2C2). At the functional level,however, a more fundamental difference is that the MOS devices

work basically as switches in the differential-pair LC-tank oscilla-tor, and as active-region transistors in the Class-C oscillator.

It is noteworthy that in the past the presence of a large Ctail in adifferential-pair LC-tank oscillator has been sometimes considereda positive feature [3, 4], and sometimes a negative [5], while theenhancement on the oscillation amplitude has been recognized in[3]. In fact, it is possible to show that a large Ctail is detrimental ifthe MOS devices enter the (deep) triode region, while it becomeshighly beneficial (and indeed, a crucial component of the design) ifthe MOS devices work as active-region transistors.

A large Ctail has the additional advantage of filtering the high-fre-quency noise from the tail MOS transistor implementing the biascurrent source; since the drain capacitance of the tail MOS can beeasily absorbed into Ctail, the tail MOS can be made wide, minimiz-ing its overdrive voltage and thereby maximizing the availableoscillation amplitude; furthermore, the tail MOS can be designedlong as well, which makes its 1/f noise small, and the resultingupconverted 1/f noise negligible.

The issue of the size of Ctail is actually rather less trivial than whatwas discussed above. While it is true that, as far as oscillationamplitude and phase noise are concerned, Ctail should be as largeas possible, a limit to its size is set by the need of avoiding theinstability of the oscillation amplitude (“squegging”). A generalanalysis of this phenomenon, carried out on the time-variantsmall-signal circuit of the oscillator, assuming a pure amplitudemodulation of the carrier and using the long-channel expressionfor the MOS current, shows that the upper limit of Ctail is given by(2) in Fig. 26.2.2, where Φ is half of the so-called conduction angleof the oscillator. In the limit case of Φ=0, the highest allowed valuefor Ctail is equal to 2Ctank, and increases for higher values of Φ.Even for the very pessimistic case of Φ=0, Ctail is still large enoughto make its loading effect negligible. For a typical value of Φ=1.0,Ctail is allowed to be 3Ctank. It should be mentioned that this limitvalue of Ctail is conservative, since simulations show that squeg-ging sets in later when real-life (i.e., less ideal) MOS transistorsare used.

A prototype Class-C VCO is implemented in a 6M 0.13μm CMOSprocess with no extra thick metal layers. It exhibits a 14% tuningrange (TR), from 4.90 to 5.65GHz, covered with four widely over-lapping bands. Coarse tuning is obtained by switching the biasvoltage of the two independent A-MOS varactors, which results inlower losses than switching MIM capacitors with nMOS switches.Fine tuning is also implemented with A-MOS varactors. The phasenoise is measured with a VDD of 1V and a bias current of 1.4mA.Figure 26.2.5 shows the plots of minimum and maximum phasenoise, measured at 4.90GHz and 5.52GHz, respectively. The 1/f3-noise corner varies between 200 to 500kHz. Figure 26.2.6 showsthe phase noise at 3MHz offset frequency across the TR, togetherwith the corresponding FoM. The maximum FoM is as high as195.5dBc/Hz, and varies less than 2dB over the TR. Figure 26.2.7shows a die micrograph. A transformer-based Class-C VCO hasalso also been implemented, displaying a similar behavior.

Acknowledgement:This work has been made possible by the invaluable help from AllanJørgensen, M.Sc.E.E., at the Center for Physical Electronics, TechnicalUniversity of Denmark.

References:[1] P. Andreani, X. Wang, L. Vandi and A. Fard,“A Study of Phase Noise inColpitts and LC-Tank CMOS Oscillators,” IEEE J. Solid-State Circuits, vol.40, no. 5, pp. 1107-1118, May 2005.[2] R. Aparicio and A. Hajimiri. “A Noise-Shifting Differential Colpitts VCO,”IEEE J. Solid-State Circuits, vol. 37, no. 12, pp. 1728-1736, Dec. 2001.[3] B. Soltanian and P. Kinget, “Tail Current-Shaping to Improve PhaseNoise in LC Voltage-Controlled Oscillators,” IEEE J. Solid-State Circuits,vol. 41, no. 8, pp. 1792-1802, Aug. 2006.[4] A. Hajimiri and T. H. Lee. “Design issues in CMOS differential LC oscil-lators,” IEEE J. Solid-State Circuits, vol. 34, no. 5, pp. 717-724, May 1999.[5] E. Hegazi, H. Sjöland and A. A. Abidi. “A Filtering Technique to LowerLC Oscillator Phase Noise,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp.1921-1930, Dec. 2001.

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Figure 26.2.1: Schematic of a cross-coupled differential Colpitts oscillator.Figure 26.2.2: Phase noise for the cross-coupled Colpitts oscillator (top) and upperbound for Ctail (Figure 26.2.4) to avoid squegging (bottom) .

Figure 26.2.3: MOS current waveforms and fundamental harmonics Iω0 in a cross-cou-pled LC-tank oscillator (top), a Class-C oscillator with n=0 (middle), and a Class-Coscillator if transistors enter the deep triode region (bottom).

Figure 26.2.5: Minimum and maximum phase noise for the Class-C VCO versus offsetfrequency.

Figure 26.2.6: Phase noise at 3MHz offset and FoM for minimum, center, and maxi-mum frequency in each sub-band.

Figure 26.2.4: Final schematic view of the Class-C VCO.

( )( ) ( )( ) ( )

( )2 22 2 3

110log 112 1

B

bias

k TLk n nI C R n

γωω

⎛ ⎞⎛ ⎞⎜ ⎟⎜ ⎟Δ ≈ × +

⎜ ⎟⎜ ⎟+ −Δ −⎝ ⎠⎝ ⎠

( ) ( )( )( ) ( )2 3

3 sin cos 2

sintankC CΦ −Φ Φ

< ×Φ

( ) is the phase noise at the offset angular frequency ; is Boltzmann's constant;

C C1 2 is the absolute temperature; + ; is the parallel tank resistance; C +C1 2

is the nMOS channel nois

L kB

T C C Rtank

ω ω

γ

Δ Δ

=

C1e factor; . , , are defined in Figure 26.2.1. , 1, 2C +C1 2n I k C C Cbias tank=

is half the conduction angle, shown in Figure 26.2.3.Φ

26

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ISSCC 2008 PAPER CONTINUATIONS

Figure 26.2.7: Die micrograph of the Class-C VCO (dimensions: 0.75×0.67mm2).

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