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The Research of ZVS DC/DC Converter based on TMS320F2812 Hu Xuezhi Huangshi Institute of Technology Huangshi Hubei,China [email protected] Wu Hongxia Huangshi Institute of Technology Huangshi Hubei, China [email protected] Abstract—In this paper, the problems about work principle of the phase-shifted full-bridge ZVS DC / DC converter, the realization of soft-switching, the control of voltage-type single- loop are theoretically analyzed. It heavily analyzes the realization process of their soft-switching and the reason of related issues and solution, we establishes simulation model and simulates using matlab. Then the experiment circuit in that TMS320F2812 is the core controlled chip has been set up, the parameters of the main circuit and experimental results are given by doing experiment. Keywords-Phase-shifted full-bridge, Zero-Voltage-Switching, Single-loop control, TMS320F2812 I. INTRODUCTION Phase-shifted full-bridge ZVS DC / DC converter has been widely applied in the middle and high-power circuit, by way of phase-shifted control, the power switch can achieve soft-switching turning on and turning off, reduce the switching losses and the current and voltage stress of switching tube. Moreover, it has peculiarity of high efficiency and simple structure, conforming to development trend the miniaturization and high-frequency of the DC power supply[1]. In this paper, the principle of phase-shifted full-bridge ZVS DC / DC converter is researched. then the topology and detailed working process of phase-shifted full- bridge ZVS PWM DC / DC converter is analyzed, and main circuit devices have been chosen, rectifier circuits, LC filter circuits, magnetic devices are analyzed, calculated and designed, Then the experiment circuit in that TMS320F2812 is the main controlled chip has been set up, the parameters of the core circuit and experimental results are given by doing experiment. II. THE BASIC ON WORKING PRINCIPLE OF CONVERTER The main circuit structure of phase-shifted full-bridge ZVS PWM DC / DC full-bridge converter is shown in Figure 1, in which the leading-Bridge is composed of VT1 and VT4 ,the lag-Bridge is composed of VT2 and VT3. C 1 C 4 are respectively resonant capacitor of VT1 D1~VT4 D4, D4s that include the parasitic capacitor and the external capacitor, and C1 = C2 = C3 = C4 = C. Lr is the resonant inductance, including the transformer leakage inductance. TR Vice-side DR1 and DR2 composes of full-wave rectifier circuit, Lf and C f composes of output filter in which Lf is larger. In a short period, the current is not changed. VT1 and VT3 are respectively, ahead of a phase of VT2 and VT4, that is the phase-shifting angle, the output voltage is adjusted by adjusting the size of the phase angle shift[2]. Uin 2 D 4 D 2 C 4 C 1 D 3 D 1 C 3 C f L f C L R DR1 DR2 TR r L 4 VT 1 VT 3 VT 2 VT A B Uo ip * * * Fig1. the main circuit topology of ZVS full-bridge converter In a cycle of switch, the phase-shifted full-bridge ZVS PWM DC / DC converters has twelve kinds of switch mode shape, Firstly half of the work period is analyzed [3][6]. Circuit working wave is shown in figure 2. The first phase [t 0 ,t 1 ]: VT1 is taken off at At the time of t 0 , the original current i p is transferred to the circuit branch of C3 and C1from VT1, C1 is charged ,while C3 is discharged. During this time, the resonant inductor L r and filter inductor L f are connected in series, moreover L f is very large, i p can be considered as a constant current that is changeless. The voltage of Capacitor C1 is linearly increasing with Time from zero and capacitor C3 is linearly declining with Time linear decline from Uin. So VT1 is Soft Switching. At the time of t1, the voltage of C3 drops to zero, the anti-diode D3 of the VT3 naturally break over, the first phase is finished .Time of the first phase is shown in equation 1: 1 1 ~ 0 2 I CU t in = 1 The second phase [t 1 ,t 2 ]: the both ends voltage of VT3 is clamped at zero, when VT3 is taken on, after D3 breaks over, the zero-voltage VT3 is dredged at the same time. Although VT3 is dredged, the current does not flow in VT3, the original side of current flows through the D3. t d >t 0~1 is the dead time of driven signal of VT1 and VT3, during in this time, the original current equals to the filter inductor current of conversion to the original edge, That is shown in equation 2: N t i t i Lf p / ) ( ) ( = 2 N is the ratio of winding turns of the original side and the secondary n equation 2, at the time of t 1 ,the original side of the current is declined to I 2 . 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 147 2009 Second International Conference on Intelligent Computation Technology and Automation 978-0-7695-3804-4/09 $26.00 © 2009 IEEE DOI 10.1109/ICICTA.2009.504 149
Transcript
Page 1: [IEEE 2009 Second International Conference on Intelligent Computation Technology and Automation - Changsha, Hunan, China (2009.10.10-2009.10.11)] 2009 Second International Conference

The Research of ZVS DC/DC Converter based on TMS320F2812

Hu Xuezhi Huangshi Institute of Technology

Huangshi Hubei,China [email protected]

Wu Hongxia Huangshi Institute of Technology

Huangshi Hubei, China [email protected]

Abstract—In this paper, the problems about work principle of the phase-shifted full-bridge ZVS DC / DC converter, the realization of soft-switching, the control of voltage-type single-loop are theoretically analyzed. It heavily analyzes the realization process of their soft-switching and the reason of related issues and solution, we establishes simulation model and simulates using matlab. Then the experiment circuit in that TMS320F2812 is the core controlled chip has been set up, the parameters of the main circuit and experimental results are given by doing experiment.

Keywords-Phase-shifted full-bridge, Zero-Voltage-Switching, Single-loop control, TMS320F2812

I. INTRODUCTION Phase-shifted full-bridge ZVS DC / DC converter has

been widely applied in the middle and high-power circuit, by way of phase-shifted control, the power switch can achieve soft-switching turning on and turning off, reduce the switching losses and the current and voltage stress of switching tube. Moreover, it has peculiarity of high efficiency and simple structure, conforming to development trend the miniaturization and high-frequency of the DC power supply[1]. In this paper, the principle of phase-shifted full-bridge ZVS DC / DC converter is researched. then the topology and detailed working process of phase-shifted full-bridge ZVS PWM DC / DC converter is analyzed, and main circuit devices have been chosen, rectifier circuits, LC filter circuits, magnetic devices are analyzed, calculated and designed, Then the experiment circuit in that TMS320F2812 is the main controlled chip has been set up, the parameters of the core circuit and experimental results are given by doing experiment.

II. THE BASIC ON WORKING PRINCIPLE OF CONVERTER The main circuit structure of phase-shifted full-bridge

ZVS PWM DC / DC full-bridge converter is shown in Figure 1, in which the leading-Bridge is composed of VT1 and VT4 ,the lag-Bridge is composed of VT2 and VT3. C1 C4

are respectively resonant capacitor of VT1 D1~VT4 D4, D4s that include the parasitic capacitor and the external capacitor, and C1 = C2 = C3 = C4 = C. Lr is the resonant inductance, including the transformer leakage inductance. TR Vice-side DR1 and DR2 composes of full-wave rectifier circuit, Lf and Cf composes of output filter in which Lf is larger. In a short period, the current is not changed. VT1 and VT3 are respectively, ahead of a phase of VT2 and

VT4, that is the phase-shifting angle, the output voltage is adjusted by adjusting the size of the phase angle shift[2].

Uin

2D

4D

2C

4C

1D

3D

1C

3C

fL

fC LRDR1

DR2

TR

rL

4VT

1VT

3VT

2VTA B

Uo

ip

*

*

*

Fig1. the main circuit topology of ZVS full-bridge converter

In a cycle of switch, the phase-shifted full-bridge ZVS PWM DC / DC converters has twelve kinds of switch mode shape, Firstly half of the work period is analyzed [3][6]. Circuit working wave is shown in figure 2.

The first phase [t0,t1]: VT1 is taken off at At the time of t0, the original current ip is transferred to the circuit branch of C3 and C1from VT1, C1 is charged ,while C3 is discharged. During this time, the resonant inductor Lr and filter inductor Lf are connected in series, moreover Lf is very large, ip can be considered as a constant current that is changeless. The voltage of Capacitor C1 is linearly increasing with Time from zero and capacitor C3 is linearly declining with Time linear decline from Uin. So VT1 is Soft Switching. At the time of t1, the voltage of C3 drops to zero, the anti-diode D3 of the VT3 naturally break over, the first phase is finished .Time of the first phase is shown in equation 1:

1

1~02

ICU

t in= 1

The second phase [t1,t2]: the both ends voltage of VT3 is clamped at zero, when VT3 is taken on, after D3 breaks over, the zero-voltage VT3 is dredged at the same time. Although VT3 is dredged, the current does not flow in VT3, the original side of current flows through the D3. td>t0~1 is the dead time of driven signal of VT1 and VT3, during in this time, the original current equals to the filter inductor current of conversion to the original edge, That is shown in equation 2:

Ntiti Lfp /)()( = 2 N is the ratio of winding turns of the original side and

the secondary n equation 2, at the time of t1,the original side of the current is declined to I2.

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

147

2009 Second International Conference on Intelligent Computation Technology and Automation

978-0-7695-3804-4/09 $26.00 © 2009 IEEE

DOI 10.1109/ICICTA.2009.504

149

Page 2: [IEEE 2009 Second International Conference on Intelligent Computation Technology and Automation - Changsha, Hunan, China (2009.10.10-2009.10.11)] 2009 Second International Conference

The third stage [t2,t3]: At the time of t2, VT4 is taken off, then the original side current ip transferred to the C2 and C4, on the one hand, C2 is taken away the charge, on the other hand , C4 is charged at the same time. Due to the C2 and C4, VT4 voltage is gradually decline to zero, so VT4 is the soft turn-off. At this time, UAB=-UC4, UAB polarity transform from zero into negative. The negative side of the transformer windings deputy under-potential is negative, diode rectifier DR2 has taken over, but current of DR1 will not be immediately become zero in this time. If DR1 and DR2 is take over at the same time, the Vice-side winding voltage turns to zero; the original side-winding voltage is also zero, UAB directly add to the resonant inductor Lr, so during this time the resonant inductor Lr and the C2, C4 work in the resonance state. At the time of t3, the voltage of C4 increases to the Vin, D2 naturally conduct, this phase is finished. Its Continuous time is equation 3:

2

13~2 sin1

IzU

tp

in−=ω

3

equation 3C

Lz r

p 2=

CLr21=ω

The fourth stage [t3,t4]: At the time of t3, D2 naturally conducts, the both ends voltage of VT3 is clamped at zero, at this time, VT2 is to be opened, and takeover voltage is zero. td>t2~3 is the dead time of driven signal of VT2 and VT4. Although VT2 is dredged, the current does not flow in VT2, ip flow from D2, the resonant inductor energy Feedback to the input power. Since the DR1 and DR2 conduct at the same time, both sides of the winding voltage transformer is zero, so the original side-winding voltage is also zero, the supply voltage Vin add to both ends of the resonant inductor Lr, the original side of the current ip rapidly declines. At the time of t4, the original edges of the current ip dropped to zero, diode D2and D3 naturally are taken off, VT2 and VT3 current will take over. The duration time of this phase are equation 4:

inrp ULtIt /)( 34~3 = 4 The fifth stage [t4, t5]: At the time of t4, the current of

original edge increases from the positive direction to negative direction through the VT2 and VT3. As the current of original side is still insufficient to provide the load current, load current is provided by the two rectifier diodes continued flow loop, so the original side-winding voltage is still zero, the voltage adding to the both ends of resonant inductor is supply voltage Vin, while the original current reversely and linearly increase. At the time of t5, the original edge current gets to achieve conversion to the load current of the original edge, this stage is finished. At this time, the rectifier DR1 is taken off, load current full flow in DR2. The duration time of this phase are equation 5:

inLfr UKtILt //)( 55~4 = 5 The Sixth stage [t5, t6]: During this period, the power

supply to the load. At the time of t6, VT3 is taken off, then the converter work at the beginning half a cycle. At this time, the end of half-cycle is over, the work of the second half of

the cycle process is similar to the first half cycle, so it will no longer be described here.

Figure 2 the working waveform ZVS full-bridge converter

III. THE REALIZATION OF THE SYSTEM CONTROL STRATEGY

A. The control mode of phase-shifted full-bridge converter a major role of Phase-shifted ZVS full-bridge converter

is that control the phase-shifting angle of the leading-Bridge and the lag-Bridge ,so output voltage value is controlled. Secondly, some basic protection circuit are to provided, such as short-circuit protection, over-voltage protection , current-limiting circuit determine safe working converter. The system uses a single-loop control mode, which is the closed-loop system in order to output a value of voltage regulation, and the delay of feedback loop is ignored ,the system block diagram can be expressed as shown in figure 3.In the picture, Uref Uf is respectively the output voltage value and the given feedback value, after error value go through the PI regulator, its output will be the duty cycle (0 <d <1) of actual circuit, in which Proportion coefficient is determine by Equivalent of phase-shifted PWM generator that the Modulated signal take into a duty cycle output by the ratio of links KPWM; pulse width modulator (PWM) and PWM DC / DC converter circuit, According to the principle of its work, when the control voltage changed, PWM DC / DC conversion circuit do not export voltage untill the next cycle to be changed. Therefore, the pulse width modulators and PWM DC / DC conversion circuit can be combined as part of a lag, and its maximum delay do not surpass one switching cycle T. Part of this lag can be deemed as a first order approximation inertia link, pulse width modulators and PWM DC / DC circuit transfer function can be approximated as equation 6:

1/

)(+

⋅=

Ts

NUKsW inpwm

pwm 6

The Output filtering links is the Second-order filter composed by the inductance L and capacitor C, the filter inductance effectively eliminates of the current peak in

148148148148148148150

Page 3: [IEEE 2009 Second International Conference on Intelligent Computation Technology and Automation - Changsha, Hunan, China (2009.10.10-2009.10.11)] 2009 Second International Conference

circuit, but the system dynamic response speed is inevitably limited[4].

Figure 3 the system block diagram of DC / DC converter

open loop transfer function acquired to design parameters of the system is equation 7:

ssssG

211.1014.0102.1601896.1)( 237 ++×

+= − 7

Fig4 system Bode plots

the System Bode plots is shown in Figure 4, it can be seen that the system traversing the frequency is 253rad / s, the phase margin is the 48.5o, the amplitude margin is greater than 90dB, low-frequency band is a larger, the system suit the bandwidth and it have a good dynamic performance.

B. The design of digital control system The pattern of the number control has the advantages of

flexibility, anti-interference ability and strong control. Figure 5 is hardware structure of the converter system, which use TMS320F2812 as the Control chip to complete the signal sampling, data processing, digital PI regulator and the output control and monitoring functions, so closed-loop digital voltage control of the system is realized[5].

he resources of program and data space TMS320F2812 are very rich whose the instruction cycle is only 6.67ns, which can content the needs of complex control algorithms. The software of the system is divided into the main program and interrupt service routine, the main program mostly complete the system initialization, switch machine testing ,machine initialization switch, then wait to enter the main program cycle interruption. the main program flow chart is 5

Fig. Interrupt service routine is including the completion of drive signals, data processing and digital sampling PI control. In the digital PI control, the high-quality and stable DC voltage is output by converter through real time calculation of the current duty cycle of PWM signal, The Design Applies PI algorithm of combination the integral separation with changed parameters, called different PI parameters in different ranges in order to achieve the best PI regulator. On this basis, PI control algorithm for the separation points has been brought in, which has managed to maintain the integral role and reduces the amount of overshoot, so that the control performance greatly improved.

Fig5 .Hardware structure diagram for the converter

IV. THE ANALYSIS OF EXPERIMENTAL RESULTS The main parameters of the experimental circuit: DC

input voltage: Uin 360V~640V;the DC output voltage:U0=220V;output power: 5.5kW; transformer winding turns while former deputy for N1=22 turns, N2=17turns; parallel capacitance : C1 C3 4.4nF C2 C4

8nF resonant inductor: Lr =28uH the output filter inductor: Lf=1.8mH output filter capacitor: Cf 6580uFswitching frequency: fs=20kHz the control system of using TMS320F2812 chip uses a single-loop voltage mode control. Figure 6 (a) shows the waveform of switch VT1, VT3 drive, which can find out the switching tube of leading-bridge has driven complementary relation, meanwhile both of the drivers has the 1.2us death area to make sure the safety of the switch. Figure 6 (b) shows the driver waveforms switching tube VT1, VT4, it is known from the figure that the phase-shifting is about 160 º and a phase-shifting function is achieved. Figure 7 shows the waveform of the system voltage output (channel 1) and current output (channel 2) as the input is 400V and the load of output is 10A. We can see that the output voltage is a smooth DC 220V and steady-state error is less than ± 2.5%. Figure 8 shows the ZVS switch leading-bridge when the output is 5A, we can be seen from the chart, which can achieve ZVS[7].

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Page 4: [IEEE 2009 Second International Conference on Intelligent Computation Technology and Automation - Changsha, Hunan, China (2009.10.10-2009.10.11)] 2009 Second International Conference

(Vertical axis:10V/div, Horizontal axis:10us) Fig6(a) . VT1, VT3 driving waveform

(Vertical axis:10V/div, Horizontal axis:10us) Fig6(b) . VT1, VT4 driving waveform

(Vertical axis:90V/div, Horizontal axis:10us) Fig7 . Output voltage and current waveforms

(Vertical axis: (1)200V/div, (2)10V/div ; Horizontal axis:10us) Fig8 . Dynamic adjustment of voltage waveform, the

opening waveform ZVS of ahead of bridge at 5A

V. CONCLUSION In this paper, the phase-shifted full-bridge ZVSDC / DC

converter and digital realization of the principle researched.

we can be seen from the experimental results, as the soft-switching DC / DC converter control circuit turn the TMS320F2812 chip to control, simplifying the circuit design, increase the stability of the output voltage and reduce the output voltage waveform distortion, Finally, get the voltage waveform of high-quality; In the other hand, this case are known by the implementation: digital control over analog control is more intelligent, more convenient regulator design.

ACKNOWLEDGMENT Sponsored by Hubei Provincial Department of Education

(B20083001). The authors would like to acknowledge support for the

project from Hubei Provincial Key Discipline on Machine Electron. The authors would like to acknowledge support for the

Key Discipline

REFERENCES [1] Xinbo Ruan, Fuxin Liu. An improved ZVS PWM full-bridge

converter with clamping diodes. Power Electronics Specialists Conference, 2004. PESC 04. 2004 IEEE 35th Annual Volume 2, 20-25 June 2004, pp:1476~1481

[2] A. J. Forsyth S. V. Mollov. Modelling and control of DC/DC converters. Power Engineering Journal October,1998:229~236.

[3] YUAN Jin-xing,MA Rui-qing,FAN Ping.Research on Phase-shifted Full-bridge ZVS DC/DC Converter with Auxiliary Branch.Power Eletronics,2008(5):23~25.

[4] Broeck H W .Analysis and Realization of a Pulsewidth Modulator Based on Voltage Space Vectors. IEEE Trans.on IA, 2002, 24(1): 142-150

[5] Liu Heping. Structure Principle and Application for TMS320LF24OX DSP .Beijing University of Aeronautics and Astronautics Press2002.

[6] Chenjian. Power Electronics—Power Electronics Transformation and Control Technology .Beijing :China Higher Education Press,2002..

[7] Seong-Jeub Jeon Gyu-Hyeong Cho. A Zero-Voltage and Zero-Current Switching Full Bridge DC–DC Converter with Transformer Isolation. IEEE Transactions on Power Electronics, 2001,16(5): 573~580

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