A Low-Power Receiver Down-Converter with HighDynamic Range Performance

Diptendu Ghosh and Ranjit GharpureyUniversity of Texas at Austin

Abstract — A low-power down-converter that uses a passivecurrent-commutating mixer for frequency translation, whilesharing the bias current between the RF and baseband stages ispresented. An active noise shaping network is implemented toreduce low-frequency noise at the output. Linearity is enhancedthrough the use of non-linear feedback. The design, implementedin a 0.18 µm CMOS technology, achieves conversion gain of 35dB, NF of 9.8 dB, in-channel OIP3 of 15.8 dBV while consuming2.1 mA from a 1.8 V supply.

Index Terms — Active noise reduction, bias current sharing,down-converter, linearization, non-linear feedback.

I. INTRODUCTION

Receiver front-ends that enhance the achievable dynamicrange per unit power are highly attractive for a wide rangeof wireless applications, including PAN, LAN and cellularsystems, as well as emerging applications related to medicaltelemetry and monitoring. In this work we describe a low-power, dynamic-range optimized down-converter topology forsuch applications. The design utilizes a current-commutatingpassive mixer for frequency translation. This topology wasemployed due to its high dynamic range ([1][2]). Typicalimplementations of current-commutating passive mixers usea distinct RF input transconductor stage and baseband tran-simpedance amplifier with independent bias currents. Thereported design, however, shares the bias current betweenthe RF and baseband stages, thereby reducing the powerdissipation.

Current-reuse techniques can significantly improve thepower efficiency of down-converters, e.g., [3], [4]. A keydifferentiating aspect of the bias sharing arrangement in thisdesign is that in principle the full voltage headroom allowedby the supply voltage is available for both the baseband andRF stages, even though the bias current is shared. This is incontrast to techniques that use a stacked bias current sharing,where the available supply voltage is split across multiplestages.

II. PRINCIPLE OF OPERATION

A. Overview

Passive CMOS current-mode mixers (Fig. 1) operate bycommutating the RF current provided by an input transcon-ductor using an AC-coupled switching mixer core. The RFtransconductor is typically implemented as a common-sourceor common-gate stage. A differential input is assumed in Fig.1. A low-impedance baseband termination is employed to

Figure 1: Conventional Passive Current-mode Mixer

minimize the voltage swing at the source and drain terminalsof the on-state switches which ensures higher linearity [2]than voltage-mode passive mixers. Since the switches operatewith no DC, their flicker noise contribution is minimal.The flicker noise at the output is dominated by that of thebaseband transimpedance stage which typically consists of anOPAMP, or transconductor, with resistive feedback. The RFtransconductors and the baseband transimpedance amplifiertypically use distinct bias paths in these designs.

B. The Basic Bias-current-shared Topology

The power dissipation in the conventional current-modepassive mixer can in principle be reduced by sharing thebias current between the RF transconductor and the basebandtransimpedance amplifier. One approach for implementingsuch a design is to vertically stack the baseband and RFstages, with an explicitly defined intermediate ground. Thisapproach however reduces the headroom available for eachof the stages. A different approach is demonstrated in thiswork. The design shares the bias current between the RFand baseband stages without increasing the voltage headroomrequirement. We describe the operating principle of a basicimplementation of this design below (Fig. 2). Techniques forenhancing performance of the basic topology and eliminatingsources of degradation that arise from bias current sharing aredescribed in the following section.

A differential common-gate RF transconductor stage con-sisting of NMOS transistors MN1and MN2 is employed. TheRF input signal is converted into a current by the transconduc-tance of these devices. Capacitors CM couple the RF currentinto a passive double-balanced switching mixer, implementedusing NMOS devices MNS1 −MNS4. The baseband stageconsists of PMOS devices MP1 and MP2 that also serve as theloads for the RF input devices. A resistance RFB is connectedfrom the gate to the drain of each PMOS device. A capacitorCRF is connected across the gates of MP1 and MP2.

The capacitor CRF plays a critical role in this design.

978-1-4244-6241-4/978-1-4244-6242-1/978-1-4244-6243-8/10/$26.00 © 2010 IEEE 2010 IEEE Radio Frequency Integrated Circuits Symposium

RMO1B-2

35

Figure 2: Basic bias-current-shared topology using a common-gate input

We first examine the effect of CRF on differential-modeoperation. At baseband, this capacitor is nearly an open.Therefore, looking into the gates of MP1 and MP2, a lowinput impedance is observed due to the shunt-shunt feedbackthrough RFB. Observed differentially, this impedance is of theorder of 2{Rbias||(1/gmp(1,2))}. The impedance observed look-ing into the drains of MP1 and MP2 is approximately 2(RFB +Rbias)/Rbias(1/gmp(1,2)), ignoring the impedance looking backinto the passive mixer from nodes MO1 and MO2 at baseband.At RF, on the other hand, this capacitor presents a lowimpedance, and therefore the gates of MP1 and MP2 (MO1and MO2) are shorted together. Consequently the feedbackthrough RFB is disabled at high frequencies. As such lookinginto the drains of MP1 and MP2, a high impedance of value2{RFB ‖ rop} is observed to the first order, where rop is thesmall-signal output resistance of the PMOS devices.

For common-mode operation, the capacitor CRF is floatingboth at RF and at baseband. Thus the feedback through RFB iseffective at both bands and the devices MP1 and MP2 presenta low common-mode impedance at both bands.

We now trace the signal path at RF. As mentioned above,the RF drain currents of MN1 and MN2 see a high differ-ential impedance of 2{RFB ‖ rop} looking into the drainsof MP1 and MP2. On the other hand, the passive mixeralong with the capacitors CM , presents an impedance of(8/π2)(Rbias||(1/gmp(1,2))) + 2/ jωRFCM . The first term (∝g−1

mp(1,2)) arises due to the frequency translation of the base-band impedance at its output to RF. Since the impedancepresented by the passive mixer is significantly smaller thanthat seen at the drains of MP1 and MP2, the RF currentpreferentially flows into the passive mixer.

The passive mixer downconverts the RF signal to a dif-

(a) (b)Figure 3: Differential signal flow in the basic bias-current-shared topology

at (a) RF (b) Baseband

ferential baseband current which sees a low impedance of2{Rbias||(1/gmp(1,2))} looking into the gates of MP1 and MP2.The low load impedance ensures current-mode operation ofthe passive mixer. The shunt-shunt feedback converts thisbaseband current to a baseband voltage at the drains ofMP1 and MP2 (vBBOM and vBBOP respectively), scaled by thetransimpedance of RFB.

The circuit operation at RF and baseband is illustratedin Fig. 3a and Fig. 3b respectively. The RF and basebandstages each perform dual tasks. The devices MP1 and MP2are used as baseband transimpedance amplifiers and alsooperate as high-impedance loads for the RF stage. The inputdevices MN1 and MN2 operate as RF transconductors whilesimultaneously providing a high-impedance load at baseband.As a consequence of this dual functionality, the RF andbaseband stages share the available voltage headroom, whilealso sharing the bias current. Unlike a stacked bias-sharingapproach, the supply voltage is not split across stages.

III. DESIGN IMPLEMENTATION

Three key design techniques are utilized in the the basictopology of Fig. 2 to enhance performance. The completedesign is shown in Fig. 4. These techniques are implementedsuch that there is no headroom penalty relative to the basictopology.

A. Network for Suppression of Baseband Noise

The RF devices MN(1,2) are seen to be directly coupled tothe baseband in Fig. 2. Thus low-frequency noise and offsetsin the RF transconductor appear at the output, unlike in thetopology of Fig. 1.

The input RF devices MN1 and MN2 need to be sized usinga fine channel length (L = 0.18µm in this design) in orderto ensure that the the required input transconductance can beachieved while maximizing fT . The small device size and highfT imply that the parasitic device capacitance is minimized,which helps to improve broadband noise performance as well.On the other hand, the short channel length of the RF devicesimplies that their low-frequency flicker noise contribution islarge.

To minimize this source of noise, the impedance of the biascurrent network needs to be maximized, since this impedanceprovides source degeneration to the input devices. AlthoughNMOS current mirror devices can be employed to achievethis, the noise of the bias devices would then appear atthe output. Large devices can be used to reduce bias noise,however the associated capacitive parasitics would severelyload the input.

Instead of NMOS current mirrors, resistors Rin are thusused to bias the input devices, since these do not exhibit sig-nificant flicker noise. Headroom constraints, however, imposean upper limit on the value of Rin which limits the attenuationof the flicker noise of the input devices.

The low-frequency differential-mode resistive degenerationis further increased without headroom penalty or significantnoise penalty, through the use of an active negative resistance

36

Figure 4: Schematic of Common-gate Down-conversion Mixer(“Noise Cancellation Network” in Fig. 4) in shunt withthe bias resistors Rin. This is implemented using a cross-coupled PMOS pair MP,sub(1,2) employing devices biased inweak inversion. To ensure that the cross-coupled pair doesnot impact the RF input impedance, a low-pass networkcomposed of resistors Rsub and Csub is employed. This LPFrenders the negative resistance ineffective at RF by providinga high-frequency short at the gates of MP,sub1 and MP,sub2.Additionally, since the cross-coupled devices are biased inweak inversion, they have a low fT and therefore cannotprovide significant gain at RF.

At baseband, the capacitor Csub is effectively an open,and the cross-coupled devices present an effective negativeresistance of −2/gmp,sub(1,2) looking into their drains. Theparallel combination of Rin and the cross-coupled pair resultsin a differential degeneration of 2Rin/(1− gmp,sub(1,2)Rin) atbaseband. This can be made large by an appropriate choice ofgmp,sub(1,2), thereby reducing noise contribution of MN1 andMN2. The cross-coupled pair itself sees a small low-frequencyload of 2{(1/gmn(1,2))||Rin}, set by the source impedance ofMN1 and MN2 and the resistors Rin, which ensures its stability.

The active cross-coupled network reduces only thedifferential-mode noise at the output. The common-modelow-frequency noise term is attenuated by the degenerationprovided by Rin itself. It is further attenuated since the outputsare observed differentially.

It should be noted that this network does not impact thelinearity performance of the circuit. The signal swing acrossthe gates of the cross-coupled devices is negligibly small atRF since Csub is almost a short. Additionally, the basebandsignal swing at the source nodes of MN1and MN2 is negligible.

B. Linearity EnhancementThe linearity limitation in a passive current-mode mixer

design typically arises from the RF transconductor and the

baseband sections, since the switching core itself is very lin-ear. Typically the linearity performance becomes increasinglychallenging at baseband prior to the channel select filter, asthe signal is progressively amplified along with the interferers.

Signal dependent feedback is utilized to enhance the linear-ity in the baseband transimpedance stage and is implementedby using Voltage Controlled Resistors (VCR) in the feedbackpath. The VCRs, denoted by RFB,NL (Fig. 4), each consistof a series combination of a linear resistor of value RF andan NMOS device MNRES biased in the triode-region. Thenon-linearity of the feedback is controlled by modulating thegate-bias of MNRES (vG,MNRES) using the output of a squarercircuit, which is implemented using two drain connectedcommon-source devices. This introduces a square law voltagedependent term in the feedback resistor RFB,NL such that itsresistance is increased as the amplitude increases. Modulationof the resistor provides gain expansion, which compensatesfor gain compression in the amplifier for large inputs. Asignificant aspect of this technique for linearization is thatit causes no degradation of noise, since the noise of the non-linear resistor MNRES is identical to that of a linear resistor ofthe same nominal value. Further the magnitude of the non-linear resistor is typically significantly smaller than the linearresistor. A voltage VBIAS fed through the resistors Rbias sets astable DC voltage at the drains of MP1 and MP2.

C. Gain Enhancement

The common-gate input stage provides inherent broadbandimpedance matching, but the resistive nature of the matchdegrades the voltage gain and noise figure since the sourceresistance is matched to the inverse of the device transcon-ductance. To mitigate this, cross-coupling capacitors CC areconnected across the gates of MN1 and MN2 which help toincrease the conversion gain and improve the noise figure[5]. The cross-coupling also ensures that the RF inputs areapplied differentially across the gate-to-source of each of theinput devices. The net differential input impedance seen by thesource is (1/gmn(1,2))||{2(Rin||Rsub)}, where Cin is assumed tobe a short at RF.

The cross-coupled devices MPsub1 and MPsub2 do not impactcircuit operation at RF. However, they help to increase thegain at baseband, since differential degeneration provided bythem at the source nodes of the RF devices significantlyincreases the low-frequency impedance looking into the drainsof MN1 and MN2.

IV. MEASUREMENTS

The design was implemented in a commercial 0.18-µmCMOS process. The ICs were housed in 48 pin TQFP pack-ages and measured on FR4 printed circuit boards. The designused an external balun for feeding RF and LO. The total loss(balun and connectors) was measured using a dedicated testfixture and was found to be 3.3 dB at the desired frequencies.The measured performance was corrected for this loss.

The measured conversion gain, was 35 dB at 1 GHz andvaried by approximately ±1.5 dB from 800 MHz – 1.1 GHz.The 3-dB bandwidth at baseband was approximately 2 MHz.

37

Figure 5: Measured IIP3 with and without non-linearity cancellation

Figure 6: Input-referred noise variation for cross-coupled degeneration ONand OFF

This bandwidth limitation arose from the loading by thecapacitance of the cables and the PCB trace. The in-channel1-dB compression point is fundamentally set by the availablevoltage swing at the output nodes. The compression point wasfound to be nearly 0 dBVp at the output, which implies aninput compression of approximately -25 dBm for 35 dB gain.The input P1dB can be increased by reducing RF to lowerthe gain. The in-band IIP3 (using tones at offset 400 kHz and500 kHz from the LO), was -9.2 dBm (Fig. 5). The outputIM3 demonstrated a 14 dB improvement with non-linearitycancellation. The inset of Fig. 5 shows the IM3 as a functionof bias applied to the MOS resistor MNRES. The DSBNF at1 MHz was 9.8 dB. The low-frequency noise decreased byabout 3-4 dB with the cross-coupled degeneration enabled(Fig. 6). The flicker noise corner frequency was approximately160 kHz, which can be reduced if longer channel lengthPMOS devices are used in the baseband transimpedancestage. The bias current requirement was 2.1 mA from a1.8 V supply. The calculated FOM [6] for the mixer is19.1 dB. The die microphotograph is shown in Fig. 7. Inthe practical implementation, high-linearity unity-gain PMOSbuffers were utilized in cascade with the above design to drivethe external signals on board. These buffers are expected to besignificantly smaller in an integrated receiver implementation,where the down-converter may be followed by an integratedfilter or analog-to-digital converter. The differential LO is

Figure 7: Die Photograph

buffered on-chip using a cascade of two inverting buffers. Thebias for the buffered LO signal was chosen to optimize thenoise and conversion gain performance. The mixer includingthe LO buffers had an area requirement of 0.2 mm2. ESDprotection was included in the design.

V. CONCLUSION

A passive current-mode mixer which reuses the currentbetween the RF transconductor and the baseband tran-simpedance amplifier to minimize power is described. Thetopology allows for current sharing, while merging the op-erating voltage domains of the RF and baseband stages,that is, without the requiring an explicit intermediate ACground between the stacked RF and baseband stages. Thisfeature is expected to make the design suitable for low-voltage applications. Circuit techniques are introduced forreducing the low-frequency noise of the input transconductorand for improving the IM3 performance with a low poweroverhead. It is anticipated that the down-converter designwill find application in systems where minimizing the powerrequirement is critical, such as those for sensor networks,or for ISM band portable systems. Given the high FOM ofthe design, with suitable optimization, it can be anticipatedthat the topology can be used in systems with even greaterdynamic range requirement such as cellular front-ends.

REFERENCES

[1] E. Sacchi, I. Bietti, S. Erba, L. Tee, P. Vilmercati, and R. Castello, “A15 mW, 70 kHz 1/f corner direct conversion CMOS receiver,” in Proc.CICC, Sept. 2003, pp. 459-462.

[2] Y. Feng, G. Takemura, S. Kawaguchi, and P. Kinget, “Design of a HighPerformance 2-GHz Direct-Conversion Front-End With a Single-EndedRF Input in 0.13 µm CMOS,” IEEE J. Solid-State Circuits, vol. 44, no.5, pp. 1380–1390, May 2009.

[3] A. Liscidini, A. Mazzanti, R. Tonietto, L. Vandi, P. Andreani, andR. Castello, “Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell,” IEEE J. Solid-State Circuits, vol. 41, no. 12,pp. 2832–2841, Dec. 2006.

[4] V. Vidojkovic, J. van der Tang, A. Leeuwenburgh, and A. van Roermund,“A low-voltage folded-switching mixer in 0.18-µm CMOS,” IEEE J.Solid-State Circuits, vol. 40, no. 6, pp. 1259–1264, June 2005.

[5] X. Li, S. Shekhar, and D. Allstot, “Gm-boosted common-gate LNA anddifferential colpitts VCO/QVCO in 0.18-µm CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 12, pp. 2609–2619, Dec. 2005.

[6] J. Deguchi, D. Miyashita, and M. Hamada, “A 0.6V 380µW -14dBmLO-input 2.4GHz double-balanced current-reusing single-gate CMOSmixer with cyclic passive combiner,” in IEEE ISSCC Dig., Feb. 2009,pp. 224-225.

38