Current-Mode Precision Full-Wave Rectifier UsingTwo WTA Cells

Jaroslav Koton, Abhirup Lahiri, Norbert Herencsar, and Kamil Vrba

Abstract—In this paper a fully CMOS implementation ofcurrent-mode full-wave precision rectifier is presented. Thestructure is generally based on the recently presented Lazzaro’swinner-takes-all (WTA) circuit. The rectifier has been imple-mented using the 0.35 µm CMOS technology and its behaviorverified by SPICE. The simulation results shown feasibility toprocess signals of frequencies up to 20 MHz.

Keywords—Analog signal processing, instrumentation, mea-surement, current-mode, precision full-wave rectifier, WTA cir-cuit.

I. INTRODUCTION

THE precise rectification is a very important operationon signals in instrumentation and measurements. Such

rectifiers are used in ac volt- and ampere-meters, signal po-larity detectors, frequency doubling, RMS to DC conversion,peak/valley detection and averaging circuit [1]. Based on this,a number of realizations of voltage-mode (VM) and current-mode (CM) precision rectifiers using different active blockscan be found. The most known solutions using operationalamplifiers [1] operate well only at low frequencies due tothe finite slew-rate and effects caused by diode commutation[2], [3]. Significant improvement in high-frequency signalprocessing has been achieved by using current-mode activeelements, when the diodes are connected to high-impedancecurrent outputs of the active elements. For this purposecurrent conveyors (CCs) [4]-[8], current-controlled currentdifferencing buffered amplifiers (CC-CDBAs) [9], operationaltransconductance amplifiers (OTAs) [10]–[12], current dif-ferencing transconductance amplifiers (CDTAs) [13], [14],voltage conveyors (VCs) [15] (and references cited therein)can be used. Most of these realizations, however, are non-optimal in terms of the number of transistors employed, sincefor the realization mostly two ro more active elements arerequired (often, with unused terminals). For example, the CMrectifier in [9] employs three CC-CDBAs. The resulting circuithas several unused terminals of the employed active elements,e.g. the w terminals of the second and third CC-CDBA areunused, that is, the voltage-buffers of the second and thirdCC-CDBA have no functionality and should be removed, since

Manuscript received May 4, 2011. The paper has been supported by scien-tific projects: GACR P102/10/P561, GACR P102/09/1681, MSM0021630513,FEKT-S-11-15. Part of this work was done while Abhirup Lahiri was withthe Div. of Electronics and Communications, Netaji Subhas Institute ofTechnology, Delhi, India.

J. Koton, N. Herencsar, and K. Vrba are with the Brno University ofTechnology, Dept. of Telecommunications, Purkynova 118, 612 00 Brno,Czech Republic (corresponding author: koton@feec.vutbr.cz).

A. Lahiri is with with STMicroeletronics, India, 36-B, J and K Pocket,Dilshad Garden, Delhi.

they unnecessarily consume the biasing current. Similarly, thecircuits in [15], employing current and voltage conveyor, alsohave several unused terminals and which are not required. Aninteresting all-CMOS rectifier has been proposed in [16] andwhich utilized the class B operation of the CMOS second-generation current conveyor (CCII). This circuit, however,requires the input current signal to be four times higher thanthe biasing current of the CCII, i.e. Iin > 4IB and thus offersreduced precision for very low input signal amplitudes. Thecircuit also requires differential current signals for full-waverectification. Other solutions of all-CMOS precision rectifierscan be found in [17]–[19]. In [18] and [19] the authors presenta high-frequency half-wave rectifier that however, requires anumber of different bias currents and is generally based onthe solution of an full-wave rectifier already discussed in [20],where current conveyor and current mirrors are used.

One of the most recent additions to all-CMOS precisionrectifiers is by Minaei et al. [21]. The circuit in [21] isa current-mode precision rectifier and uses small numberof transistors (including bias voltage generators), however,this circuit requires precise threshold voltage extractors andbases itself on the concept that MOS transistors are OFFwhen the magnitude of gate-source voltage difference is lessthan the threshold voltage (VTN or VTP ). This is of coursenever the case for practical MOS transistors and sub-thresholdconduction can lead to large errors in the output if the inputsignal is of small amplitude.

The paper is focused on winner-takes-all (WTA), or max-imum/minimum, circuit for wide-band precision rectification.A precision voltage-mode rectification employing a WTA cir-cuit has been discussed by Opris in [22]. Two input maximumcircuit has been used for full-wave rectification of 500 kHzvoltage input signal. Other min-max current selectors aredescribed in [23] and [24] that, however, provide small inputrange (about 20 µA). Recently, Prommee et al. proposed a newtype of VM full-wave rectifier based on their voltage-modewinner-takes-all (WTA) circuit [25]. Since a WTA circuitchooses a winner from a group of input signals, a two-cellWTA maximum circuit with inputs of Vin and −Vin producesthe output as |Vin|. In this work, we present the current-modeversion of [25], wherein a modified two-cell CM Lazzaro’sWTA circuit [26] is employed. SPICE simulation results of thecircuit implemented using 0.35 µm TSMC CMOS technologyare provided which verify the feasibilities of the proposedcircuit.

978-1-4577-1411-5/11/$26.00 ©2011 IEEE TSP 2011324

Fig. 1. Proposed all-CMOS current-mode full-wave precision rectifier

II. PROPOSED PRECISION RECTIFIER

The proposed precision full-wave current-mode rectifierbased on the modified Lazzaro’s WTA circuit is shown inFig. 1, where to the conventional Lazzaro’s WTA structure,formed by M1–M4, transistors M5 and M6 were added. Sincethe WTA uses two cells, the original input current IIN has tobe conveyed into both cells. To obtain a full-wave rectificationone of the inputs must phase-shifted by 180◦. For this purposethe second-generation current conveyor has been used havingtwo current outputs Z+ and Z– (Fig. 2) [27], i.e. terminals Z+and Z– are connected to M7-drain and M11-drain, respectively,while Y-terminal is grounded. For IIN = 0, the transistors M1and M2 are sinking the current IB1 and the drain potentialsV1 and V2 are equal. If IIN > 0, i.e. ID−M2 > ID−M1, thegate voltage VC of transistors M1 and M2 grows. However,since the M1 sinks less drain current the drain voltage V1

decreases, and as a result V1 < V2, transistor M3 goes intodeep-subthreshold, and all current IB2 is conduced by M4.Similarly, for IIN < 0 it can be found that V1 > V2 andcurrent IB2 is conduced only by M3. The transistors M3–

Fig. 2. Basic CMOS implementation of dual output CCII+/–

TABLE IASPECT RATIOS OF MOS TRANSISTORS

Transistor W/L [µm/µm]M1–M4, M14, M19–M24 17/0.9M5–M13 30/0.9M15–M18 5/0.35MC1, MC2, MC10–MC14 11/0.35MC3–MC9 20/0.35

M6 form a differential amplifier. Therefore, if V1 < V2 thevoltage VA is high and for V1 > V2 the voltage VA gets low.This voltage is inverted to VB and both used to control thetransistors M15–M18 operated as switches.

As a result, the output current IOUT represents an absolutevalue of the input signal IIN.

III. SIMULATION RESULTS

To verify the behavior of the proposed current-mode pre-cision rectifier, the structure in Fig. 1 together with CCII+/+from Fig. 2 has been simulated. The transistor parameters usedfor the simulations are taken from TSMC 0.35 µm process [28](level 7). The aspect ratios of MOS transistors of the rectifierand second-generation current conveyor are listed in Table I.The supply voltages are taken as VDD = −VSS = 1 V, thebias currents are IB1 = 20µA, IB2 = 100µA, and IB = 50µA,and the total power dissipation is 1.19 mW.

The simulated DC current transfers of the rectifier are shownin Fig. 3. To keep the current gain error below 5 %, the inputsignal amplitude should not get over 106 µA. The DC offsetof the rectifier is 1.8 µA.

To evaluate the accuracy of the current-mode full-waverectifier from Fig. 1 the DC value transfer pDC has beenanalyzed that represents a ratio of the average, i.e. DC, valuesof the rectified output signal IOUT and the average value ofideally full-rectified sinusoidal input signal [14]:

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Fig. 3. Ideal and simulated DC current transfers of the proposed current-mode rectifier

Fig. 4. DC value transfers for input signal amplitudes 10 µA, 50 µA, and100 µA

pDC =

1T

∫T

yOUT(t) dt

2πIINMAX

, (1)

where T is the signal repetition period. The ideal behaviorof the rectifier is characterized by the value pDC = 1. Inpractice, if the frequency increases distortions occur and thepDC decreases below one. This feature can be seen from Fig. 4,where for input signal amplitudes 10 µA, 50 µA, and 100 µAthe frequency dependent DC value transfer is shown. CorrectDC values can generally be achieved up to the -3 dB cutofffrequency of pDC that can be found as 20 MHz. Note that forIINMAX = 10 µA and IINMAX = 50 µA the pDC is at lowfrequencies higher than one. This is causes by the DC offsetof the rectifier. For IINMAX = 100 µA the offset also affectsthe DC transfer pDC, however from Fig. 3, the actual currenttransfer of the rectifier is lower.

The transient responses for frequencies 10 kHz, 100 kHz,and 1 MHz and input signal amplitudes 10 µA, 50 µA, and

Fig. 5. Transient responses for frequencies 10 kHz, 100 kHz, and 1 MHzand input signal amplitudes 10 µA, 50 µA, and 100 µA

100 µA are shown in Fig. 5. First at the frequency of 1 MHza more significant distortion (mainly in the zero crossing area)can be observed, which decreases the value of pDC

IV. CONCLUSION

In this paper we have presented current-mode precisionrectifier using a modified two-cell winner-takes-all circuit. Themodified structure uses the principle of differential amplifierthat output is used to control the MOS switches, whichconsequently leads to full-wave rectification. Using the TSMC0.35 µm transistor parameters, the all-CMOS structure ofrectifier has been further analyzed by SPICE simulations.Determining the frequency dependent DC value transfer pDC

the rectifier can be used to process signals of frequency up to20 MHz.

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