366 • 2011 IEEE International Solid-State Circuits Conference

ISSCC 2011 / SESSION 21 / CELLULAR / 21.2

21.2 A 9-Band WCDMA/EDGE Transceiver Supporting HSPA Evolution

Magnus Nilsson1, Sven Mattisson2, Nikolaus Klemmer3, Martin Anderson2,Torkel Arnborg1, Peter Caputa1, Staffan Ek2, Lin Fan1, Henrik Fredriksson1,Fabien Garrigues3, Henrik Geis1, Hans Hagberg1, Joel Hedestig1, Hu Huang3,Yevgeniy Kagan3, Niklas Karlsson1, Henrik Kinzel1, Thomas Mattsson1,Thomas Mills3, Fenghao Mu2, Andreas Mårtensson1, Lars Nicklasson1, Filip Oredsson1, Ufuk Ozdemir1, Fitzgerald Park3, Tony Pettersson1, Tony Påhlsson1, Markus Pålsson1, Stephane Ramon3, Magnus Sandgren1,Per Sandrup1, Anna-Karin Stenman1, Roland Strandberg2, Lars Sundström2,Fredrik Tillman2, Tobias Tired1, Satish Uppathil3, Joel Walukas3, Eric Westesson1, Xuhao Zhang1, Pietro Andreani1,4

1ST-Ericsson, Lund, Sweden, 2Ericsson, Lund, Sweden, 3Formerly with ST-Ericsson, Raleigh, NC, 4Lund University, Lund, Sweden

The future of cellular radio ICs lies in the integration of an ever-increasing num-ber of bands and channel bandwidths. Figure 21.2.1 shows the block diagram ofour transceiver, together with the associated discrete front-end components.The transceiver supports 4 EDGE bands and 9 WCDMA bands (I-VI and VIII-X),while the radio can be configured to simultaneously support the 4 EDGE bandsand up to 5 WCDMA bands: 3 high bands (HB) and 2 low bands (LB). The RX isa SAW-less homodyne composed of a main RX and a diversity RX. To reducepackage complexity with so many bands, we chose to minimize the number ofports by using single-ended RF interfaces for both RX and TX. This saves seve-ral package pins, but requires careful attention to grounding. The main RX has8 LNA ports and the diversity RX has 5, with some LNAs supporting multiplebands. On the TX side, 2 ports are used for all EDGE bands and 4 for theWCDMA bands.

To minimize the interference sensitivity of the LNAs we balance the currentsflowing through the respective RF I/O. This is straightforward in a differentialLNA, but in a single-ended LNA input and ground may carry different currentlevels, aggravating leakage. By introducing a dedicated on-chip ground node forthe LNAs and returning the signal current from each LNA output and sourcedegeneration to this ground, the LNA drain current is terminated on-chip andonly the gate current, with its ground counterpart, loops through the RF I/O.With this grounding strategy, each LNA input and associated ground function asa balanced port, and common-mode interference will be canceled. All LB and HBLNAs, respectively, share the same on-chip degeneration inductor. Inactive LNAinputs are shorted to the LNA ground to further minimize noise pick up. Care hasbeen taken to avoid that an LNA is located close to another LNA with an RX bandin the vicinity of the former LNA’s TX band (which is indeed possible, conside-ring the allocation of the various TX/RX bands in e.g. the US, Europe, and FarEast), which minimizes TX-to-RX leakage.

Finally, the LB (HB) LNA outputs are wired together via an LB (HB) cascode tree,which is connected to an on-chip passive LB (HB) balun (Fig. 21.2.2). Each balunis tuned with a capacitor bank. The LNA port of each balun is decoupled to theLNA ground rather than to the supply ground, thus closing the current loop on-chip at the LNA reference node. The balun IF port is balanced and feeds a passi-ve voltage-mode mixer. A conversion gain of 30dB from LNA input to mixer out-put is obtained. The mixer has a large capacitive load at the IF port, which resultsin a relatively low first-order baseband (BB) pole. This load is also translated, bythe reverse mixing process, into a narrow bandpass response at the RF port [1],which provides some 10dB of additional suppression for off-channel interferers.The dominant interferer is the TX signal leaking through the WCDMA duplexers,and at full TX power this leakage is close to the RX compression point, increa-sing the IIP2 requirements for the mixer. Unless the mixer IIP2 exceeds 50dBm,the RX sensitivity may be degraded when standard duplexers are used.

To enhance 2nd-order linearity, the balun AC couples the mixer to the LNA, the-reby blocking low-frequency IM2 products that would otherwise leak to the BBI/Q outputs due to mixer imbalance. The mixer uses complementary MOS swit-ches (Fig. 21.2.2), and the DC bias of the PMOS and NMOS switches can be setindividually. By turning off the PMOS switches, power can be saved at 10dB IIP2penalty. To increase the dynamic range, a 4-phase LO drive with approximately25% duty cycle is used [2]. Supporting 64-QAM in RX, 16-QAM in TX, and 2x2downlink MIMO for HSPA Evolution requires a very low EVM. Auto-calibration isused to minimize errors due to DC offsets, finite image rejection and BB filter rip-

ple. By controlling the RX/TX LO frequency error in the fractional-N PLLs, high-resolution digital AFC tuning is possible and the frequency error can be kept verysmall. The only major remaining source of EVM is the phase error from the LO,due to I/Q imbalance combined with phase noise.

The TX consists of separate EDGE and WCDMA paths. The WCDMA transmitteris a 4-phase IQ-modulator followed by a digitally-controlled amplifier. On-chipbaluns are used to convert the output signal from differential to single-ended,and set the output impedance to 50Ω. To save power in the WCDMA TX I/Qmodulator, a SAW filter is assumed.

The EDGE path adopts a polar modulation TX together with a polar PA. This pro-vides sufficient phase-noise performance to allow SAW-less EDGE TX operation,and ensures an excellent EDGE TX EVM.

A key building block in the polar EDGE TX is the 2-point PLL, which allows for aphase modulation BW that is much higher than the PLL BW. This is necessaryto meet the EDGE ACP requirements. As shown in Fig. 21.2.3, in a 2-point PLLthe modulation is inserted both into the ΔΣ controlling the frequency divider(feedback path), and into the VCO itself (direct path).

A well-known key issue is gain matching, to ensure the correct modulation indexin the direct path. Preferably, the modulation index should be estimated througha calibration algorithm just before the TX burst. Examples of this are proposedin [3,4], where a frequency jump in the PLL is used to estimate the VCO gain.This means that a small loop voltage change must be resolved on top of themuch larger VCO tuning voltage, requiring a high-dynamic-range ADC for anaccurate calibration. In our approach, a square wave is inserted at both modula-tion inputs, which mimics several step responses in the modulation paths. If thegain in the direct path is wrong, an error signal will develop in the loop filter, andthe sign of this signal will indicate whether the gain is too low or too high.Moreover, by utilizing the built-in loop-filter zero, the VCO tuning voltage can beremoved from the error signal. As a result, a simple and robust binary-searchADC can be implemented by using a sign detector. The estimated calibrationerror is as low as 1%.

Communication with the companion digital BB chip is implemented according tothe DigRF v3.09 specifications. Only 6 pins are needed since both control signalsand BB RX/TX data are multiplexed on the same wires. The clock frequency of312MHz is sufficient to transfer both primary and diversity WCDMA data.

The transceiver has been implemented in a 90nm RF CMOS process and is cur-rently in production.

Figure 21.2.4 shows the RX sensitivity of WCDMA band II with TX running atmaximum output power. A small degradation is noticed when the TX is enabled,as well as when receiving close to multiples of the 26MHz XO frequency.

The RX EVM performance in WCDMA band II for 64-QAM is shown in Fig.21.2.5. The EVM is below 3% across a very wide input signal power range.

The throughput gain using RX diversity has been measured in fading conditions(RX moving at 3, 30 and 120Km/h) at the system level. The throughput increa-ses by 50 to 120% when diversity is enabled, clearly showing the merits of adiversity receiver.

A summary of the transceiver performance is given in Fig. 21.2.6 together witha comparison with relevant prior art. Worth noting is the excellent 2G TX EVM,limited only by the PLL noise floor in the polar transmitter. The die photo isshown in Fig. 21.2.7.

References:[1] S. Vilhonen. ”Transferred-impedance filtering in RF receivers”, PatentUS7187230(B2), 6 March 2007.[2] R. S. Pullela et al. ”Low Flicker-Noise Quadrature Mixer Topology”, IEEEISSCC Dig. Tech. Papers, pp. 1870-1871, Feb. 2006.[3] R. B. Staszewski et al. “Just-In-Time Gain Estimation of an RF Digitally-Controlled Oscillator for Digital Direct Frequency Modulation”, IEEE TCAS-II, vol.50, no. 11, pp. 887–892, Nov. 2003.[4] S.-A. Yu and P. Kinget. “A 0.65-V 2.5-GHz Fractional-N Synthesizer With Two-Point 2-Mb/s GFSK Data Modulation”, IEEE J. Solid-State Circuits, vol. 44, no. 9,pp. 2411–2425, Sept. 2009.

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Figure 21.2.1: Block diagram of the transceiver (off-chip discrete componentsto the left and bottom).

Figure 21.2.2: Simplified schematic view of the main RX front-end (LB mixernot shown for clarity). The diversity RX front-end is basically identical, andhas its own dedicated LNA ground node.

Figure 21.2.3: TX PLL with 2-point modulation and direct-path gain calibration.

Figure 21.2.5: Left: 64-QAM RX constellation for the main RX in WCDMA bandII; right: EVM vs. input power level.

Figure 21.2.6: Summary table of the transceiver performance and comparisonwith earlier EDGE/WCDMA transceivers.

Figure 21.2.4: Sensitivity for WCDMA RX band II.

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• 2011 IEEE International Solid-State Circuits Conference 978-1-61284-302-5/11/$26.00 ©2011 IEEE

ISSCC 2011 PAPER CONTINUATIONS

Figure 21.2.7: Die micrograph of the transceiver (3.8mm x 3.8mm).