2011 International Conference on Multimedia, Signal Processing and Communication Technologies
Reconfigurable Continuous Time Current Mode First
Order Multifunctional Filter using Low voltage
Digitally Controlled CMOS CCII
Iqbal A. Khan 1 , Mohammed T. Simsim2 and Parveen Beg3 I, 20epartrnent of Electrical Engineering, College of Engineering and Islamic Architecture, Umm AI Qura University
Makkah, Saudi Arabia igbalakhan [email protected], [email protected]
30epartment of Electronics Engineering, Aligarh Muslim University, Aligarh-202002, India , [email protected]
Abstract-The digitally controlled current conveyor has
been used to realize a novel digitally controlled
reconfigurable continuous time current mode first order
multifunctional filter. The realized filter can provide first order current mode low pass, high pass and all pass
responses without any component matching constraints. The
pole frequency of the continuous time filter is directly proportional to an n-bit digital control word. The realized
digitally controlled continuous time filter is designed and verified using PSPICE and the results thus obtained justify
the theory.
Keywords-Current conveyors, filters, phase shifter.
I. INTRODUCTION
Introduction of digital control to the current conveyor (CCIl) has boosted its functional flexibility and versatility in addition to its higher signal bandwidth, greater linearity and large signal bandwidth [1-9]. T his digital control has eased t he on chip c ontrol of c ontinuous time s ystems through digital w ord w ith hi gh r esolution capability a nd reconfigurability [1-4].
This p aper b asically d eals w ith th e realization of a reconfigurable continuous t ime c urrent m ode first order multifunctional f ilter u sing L ow v oltage d igitally controlled CCIL The new r ealized filter can provide first order current m ode low p ass, h igh p ass an d a II pass responses w ithout any c omponent m atching c onstraints. The pole frequency of the continuous time filter is directly proportional to an n-bit digital control word. To verify the theory, the r ealized d igitally c ontrolled continuous time filter is designed a nd v erified using PSPICE a nd the results thus obtained justify the theory.
II. THE CIRCUIT
The digitally controlled CCII symbol is shown in Fig. 1 (a) a nd its CMOS implementation w ith 4-bit control is shown in Fig. I(b). The current summing network (CSN) is included at port-X. The transfer matrix can be expressed as
978-1-4577-1107-7/11/$26.00 ©2011 IEEE
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o
o (1)
Thus t he port voltages a nd currents for t he digitally programmable cu rrent co nveyor (OPCClI) can b e expressed as
/y = 0, Vx = Vy and (2)
where, N is an n-bit digital control word, the plus sign(+) is for Iz+ and minus sign( -) is for Iz-. The power integer m = 1 for current summing network (CSN) at port-Z and m = -I for c urrent s umming ne twork (CSN) at por t-X 0 f the OPCCII [I].
Iz. N z·
y
x Z+
Ix
Fig. 1 (a) Symbol for 4-bit DPCCII
2011 International Conference on Multimedia, Signal Processing and Communication Technologies
Vee
z-
Vss
Fig. 1 (b) The CMOS implementation of a 4-bit DPCClI with CSN at port X
The current mode first 0 rder m ultifunctional filter using 10 w voltage digitally controlled CMOS DPCCII is shown in Fig.2. The ci rcuit u ses 0 ne CCIl an d o ne 0 PCCII, each 0 ne with three outputs along with grounded R and C. The DPCCli uses t he C SN a t p ort-X a s s hown i n Fig. 1 ( b), s 0 f rom equation (2), m = -1.
z-y
X z+I----..
Fig. 2 The digitally controlled current mode first order multifunctional filter.
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The routine analysis yields its current transfers functions T LP, T HP and TAP respectively for l ow p ass, h igh P ass an d al l p ass responses as
T = fLP NIRC LP
f N IN s+ -RC
T - fHP S HP - N fIN s+ - (3)
RC
and
N
T = fAP s--
RC AP
f N IN s+ -RC
From equation (3) it is evident that the pole frequency (00 (= NIRC) is directly proportional to digital control word N.
III. EFFECT OF NON-IDEALITIES
Taking t he n on-idealities of C ClIs i nto a ccount, t he relationship of the t erminal voltages and c urrents c an be rewritten as:
2011 International Conference on Multimedia, Signal Processing and Communication Technologies
Vx =f3kVy 1 z+ = akJ,. (7)
lz_ =-ak21,. In equation (7) �k is the vo ltage transfer gain from terminal-Y to terminal-X for the k th CCII and Uk! and Uk2 are the current transfer ga ins for kth CCII from X to Z+ and Z- respectively. Using equation (6) the ideal transfer functions given in (3), (4) and ( 5) r espectively, yields t he f ollowing n on-ideal tr ansfer functions:
f 1.2
1.0 s:: ca (!) 0.8
0.6
0.4
0.2
0
f3,a"N f32anRC
f3,a'2N s + -----'-----'-=-
1
f32anRC allN
-- s anRC
(8)
(9)
(10)
3 10
From equations (8), (9) and (10) the pole frequency of filter becomes:
(11)
Equation (11) shows the non-ideal transfer functions affect
the po Ie-frequency. However, fo r al2 = a22 and /31 = /32 the
effects of non idealities are nullified.
IV. DESIGN AND VERIFICATION
The r ealized d igitally c ontrolled c urrent m ode first order m ultifunctional f ilter 0 f F ig. 2 , w as d esigned and verified by p erforming P SPICE s imulation w ith s upply voltage ± 0 .75V using CMOS TSMC 0.25/lm technology p arameters. T he C MOS D PCCII w ith 4 -bit current s umming ne twork a t p ort-X (i.e. m = -1) of Fig. 1 (b) w as used. T he aspect r atios used are given i n the Table 1. The realized filter pole frequency roO = N/RC. Initially th e filter w as designed f or a cut f requency 0 f 1 6 kHz with N = 1, R = 3.3kn and C = 3nF. Then the pole frequency was c ontrolled th rough d igital c ontrol w ord N . The 0 bserved f requency r esponses 0 f t he f ilter f or different control w ords a re gi ven i n Fig. 3 , w hich a re i n close conformity with the design.
30 100 Frequency (KH;.)
300 1000
Fig. 3(a) Frequency response of the digitally controlled current mode first order LP and HP filters
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2011 International Conference on Multimedia, Signal Processing and Communication Technologies
1.2
1 1.0
c 0.8 'n; <.!I
0.6
0.4
0.2
00 1 3 10 30 100 3000 1000
Frequency (KHz)
Fig. 3(b) Frequency response of the digitally controlled current mode first order all pass filter.
Table 1: The aspect ratios of the MOSFETs of the DPCCII
MOSFETs W !lm
M], M2, Ms, M6 5
M3, M4, M7, M8 0.5
M9,MIO 0.5
MIl, M12, M13,MI4, MIS, MI6,M17, M18, 25 MJ9, M23,M27,M3J M20, M24, M28, M32 50
M21, M2S, M29, M33 100
M22, M26, M30, M34 200
V. CONCLUSION
L !lm
0.25
0.5
0.25
0.25
0.25
0.25
0.25
A no vel digitally c ontrolled current m ode f irst order multifunctional f ilter u sing d igitally programmable c urrent conveyor has b een presented. T he r ealized filter can p rovide first order current mode low pass, high pass and all pass responses w ithout any c omponent m atching c onstraints. The pole f requency 0 f t he continuous tim e f ilter is d irectIy proportional to an n-bit digital c ontrol word which yields the reconfigurable control.
To verity the theory, the realized d igitally controlled continuous time filter was designed and verified using PSPICE and the results thus obtainedjustity the theory.
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REFERENCES
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[2] I. A. K han, M . R. K han a nd N . A fzal, " Digitally p rogrammable multifunctional f ilters using C CIIs," J ournal 0 f A ctive a nd P assive Electronic Devices, vol. I, pp.213-220, 2006.
[3] I. A. Khan, M. R. Khan and N. Afzal, "A Digitally Programmable Impedance MUltiplier using C CIIs w ith High R esolution Capability," Journal o f A ctive a nd P assive E lectronic D evices, v ol. 8 , pp. 247-257, 2009.
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[6] R. Mita, G. P alumbo, and S. P ennisi, " 1.5-V CMOS CClI+ with High Current-Drive Capability," IEEE Trans. CAS-II, vol. 50, No. 4, pp. 187-190,2003.
[7] A. H. Madian, S. A Mahmoud and A. M. Soliman, "New 1.5V CMOS second g eneration current c onveyor b ased 0 n w ide r ange transconductor," Analog Integrated Circuits and Signal Processing, vol. 49, pp. 267-279, 2006.
[8] I. A. Khan, P. Beg and M. T. Ahmed, "First Order Current Mode Filters and Multiphase S inusoidal 0 scillators U sing MOCCIIs ", A rabian Journal of Science and Engineering, Saudi Arabia, vo1.32, No. 2C, pp. 119-126, Dec. 2007.
[9] I. A. Khan and M. T S imsim, " A Novel Impedance Multiplier u sing Low voltage Digitally Controlled CClI," Proc. IEEEE GCC Conference and Exhibition, Dubai, UAE, pp. 331-334, Feb. 19-22,2011.