SRF Theory Based Grid Interconnected Solar Photovoltaic (SPV) System with Improved Power

Quality

Ravi Nath Tripathi, Alka Singh Electrical Engineering Department

Delhi Technological University (formerly DCE) Delhi-42, India

ravi1989tripathi@gmail.com, alkasingh.dr@gmail.com

Abstract—This paper presents the concept of interconnection of Solar Photovoltaic (SPV) power generating system using Synchronous Reference Frame (SRF) theory based control in indirect current control mode of operation. This proposed theory improves the power factor and voltage at point of common coupling (PCC). Voltage at PCC is maintained through reactive power compensation. The whole power generating system consists of SPV system, dc-dc boost converter, maximum power point tracking (MPPT), voltage source converter (VSC), ripple filter, different types of loads, interfacing inductor and three phase grid. This system eliminates harmonic currents and load balancing is also possible using it. The grid-interconnected SPV system is tested for two modes i.e. unity power factor mode of operation and voltage regulation mode, with load balancing problems of linear loads.

Keywords—Solar Photovoltaic (SPV), Maximum Power Point Tracking (MPPT), Voltage Sorce Converter (VSC), power quality improvement, unity power factor (UPF), Point of Common Coupling (PCC).

I. INTRODUCTION The demand of energy increasing rapidly year by year

worldwide & the whole world is looking for the alternative source of energy. The most populous alternative source of energy is renewable energy and in renewable energy solar energy, specially Solar Photovoltaic (SPV) energy because it is environment friendly, pollution free & it’s unlimited amount of availability in nature. Solar Energy is a good choice for electric power generation. The solar energy is directly converted into electrical energy by solar photovoltaic module. The photovoltaic array is formed using number of series and parallel modules of solar photovoltaic cells [1]. The drawback of SPV system is that it’s initial cost is very high i.e. cost of solar PV panel and therefore we need to utilize maximum power generating through it by maximum power point tracking. The complete evacuation of generated and tracked maximum power is required to improve efficiency of the overall system. The PV based generation is interfaced with the grid which has lowest failure rate so that evacuated power could be effectively utilized & the PV system can be used in

standalone mode only when the storage support is available otherwise the grid interconnected mode of PV operation offers infinite storage [2]. Solar PV generation is mainly developed in standalone mode or isolated mode and the main drawback of the isolated mode is that it is limited to very low rating of power generation and also it required very large storage capacity but in recent years the main focus is on grid connected solar PV generation.

The general structure of grid connected PV inverter system, contains two main parts: - the Plant part (hardware components) such as the PV arrays, PV inverter and the grid utility; the Control part composed by algorithms such as the Maximum-Power-Point-Tracker (MPPT), dc voltage controller, current controller, etc. The different challenges arises when SPV power generation is integrated to grid and some important and key challenges which affects the quality of power are voltage fluctuations, reactive power, harmonics, low power factor, voltage regulation etc [3]. The standard of power quality is to be maintained when integration of a renewable energy source to the electric grid. There are different techniques to control and synchronize the SPV system to the grid. The grid-following power export control strategy is often used to control the Distributed Energy Resource DER (in this case PV) output power within the voltage and frequency limits as determined by the micro-grid or utility grid [4]. In this paper the grid interconnected SPV system is modeled in two parts and SPV integrated to grid using three phase voltage source converter (VSC). The current source inverters are generally having high semiconductor losses as compared to VSCs and also the ability of CSI to meet strict grid codes is doubtful [5]. In first part the SPV is modeled [1, 6] and the maximum power point (MPP) is tracked using MPPT technique [7, 8] with the help of dc-dc boost converter [9, 10, 11] and in second part SPV system integrated to grid using VSC through control. Different control algorithms are mentioned in literature like instantaneous reactive power theory (IRPT), synchronous reference frame theory (SRFT) etc. Synchronous reference frame theory (SRFT) is implemented and used to control the SPV power generating system. Insulated gate bipolar transistor (IGBT) based VSC is used and the dc bus of SPV and VSC is controlled and maintained to a reference voltage in order to

Fig1: Schematic diagram of proposed Solar Photovoltaic power generating system interconnected to Grid.

provide compensation for the load currents through SPV power. The whole grid interconnected SPV system is designed, modeled and simulated using MATLAB platform and the investigations carried out for the unity power factor (UPF) operation and voltage regulation mode of operation for linear loads in balanced and unbalanced load conditions.

II. SYSTEM CONFIGURATION Figure 1 shows the schematic diagram of proposed SPV

power generating system interconnected to grid and consists of Solar PV panel, maximum power point tracking (MPPT) controller with dc-dc boost converter, a three leg VSC, varying consumer loads and utility grid. The dc-dc boost converter used to boost the voltage level of SPV to feed the power to the dc link. In this proposed system the dc link voltage of SPV and VSC is 800 volt and to maintain the voltage of dc link dedicated dc voltage PI controller is been used. Ripple filter of the proposed system consists of the capacitor connected in delta with three AC inductors. The system is controlled in a way to compensate reactive power for voltage regulation, power factor improvement, load balancing and harmonics

elimination. The purpose of the investigations of proposed system is to evacuate all the generated power from SPV generating system with the help of control algorithm.

III. DESIGN OF GRID INTERCONNECTED SPV SYSTEM A. Design of Photovoltaic Array

The solar photovoltaic array (SPVA) system is designed for the 10kwatts. Reference of different designs and models of PVA system suggests that the open circuit voltage of single solar cell is in between 0.5-0.7 volt depending upon the material of solar cell. Accordingly, the short circuit current of cell also varies depending on the solar cell material. In this paper, the ‘SunPower SPR’ is been taken as a reference with open circuit voltage of single solar cell is 0.66875 volt. 96 such cells are connected in series to provide the overall open circuit voltage of SPV array is 64.2 volt and a short circuit current of 5.96 Amps. The generalized power equation for SPV is given in equation

PmaxM = VmppM * ImppM (1)

Lc

Lb

La

S5 S1

S2

S3

S4 S6

Filter

ILa, ILb, ILc LOADS

I(abc)c

MPPT Controller

Three Phase PLL

Amplitude

⎯ +

PI

LPF

+ ⎯

PI

abc

dq0dq0

abc

LPF

LPF

+

+

−

+

HCC

DC-DC Boost Converter

PV Panel

Ipv

Ipv Vpv Gating Pulse

Lb D

Cb

Vdc

Vref

ILa

ILb

ILc

Vsa

Vsb

Vsc

Vt

Isa Isb Isc

S1

S6

Pulses

Is(abc)

Therefore, by calculating the voltage and current at maximum power point (MPP), the overall maximum power delivered by the SPV array is calculated. Voltage and current values at MPP level are tracked by the MPPT techniques. Hence the power delivered by the SPV array will automatically will be maximum according to P-V and I-V characteristics of the PV array. SPV array module can be designed to any desired rating by choosing the appropriate number of series and parallel modules (cells).

B. Boost Converter Design

The IGBT based DC-DC boost converter is modeled in the MATLAB/Simulink. The maximum power point for voltage and current is tracked using incremental conductance method of MPPT. The voltage at the load terminal of PV array system is boosted according to the change in load by using MPPT and DC-DC boost converter. The current and voltage is modulated at the load side but the power remains constant at a particular level even with the change in load. The value of inductor and capacitor is designed and calculated according to desired output levels.

Vpv = Output voltage on PV side

D = Duty cycle of converter

Δi1 = Input current (PV side) ripple

Id = Output current on load side

ΔV = Output voltage (load side) ripple

fsh = Switching frequency

. Duty cycle (D) of the DC-DC boost converter is given by equation (12)

where, Δi1 is known as input current ripple on the PV side and it is taken as 10% of the input current and ΔV is known as the output voltage ripple and is taken as the 5% of the output voltage on the load side and Vin is the input voltage for converter from PV side and it is same as Vpv and Vb is the output voltage of the converter. C. Selection of DC link Capacitor voltage

The DC link capacitor voltage of VSC is given by [12] equation

It means the dc link voltage should be greater than twice of the peak of the phase voltage of the system. For the system designed for investigation DC link voltage is selected as 800 for modulation index taken as 0.9 & VLL is 415 volt.

D. Design & Selection of DC link Capacitor

Three different criteria used to select and design DC link capacitor only. DC link capacitor value based on dc-dc boost converter is shown in boost converter design and the other two criteria are 1) DC link Capacitor based on Ripple Current The value of DC link capacitor is given by the equation (6) for load balancing of the consumer loads by VSC [9] where Id is the dc link current , ω is angular frequency and Vdc ripple is 5% of the dc link voltage of VSC. The value of dc link current when load of one phase is removed is 2/3 Id i.e. 33% of load current is reduced by removing one phase of load. The value of dc link capacitor based on ripple current calculated as 1200μF. 2) DC link Capacitor based on Energy Conservation Principle The design of DC link capacitor (Cd) of VSC depends upon the instantaneous energy available to the VSC at the time of transients. Based on the principle of energy conservation value of DC capacitor is given as [12]

where V is the phase voltage, I is the phase current , t is the time by which dc link voltage is to be recovered, Vdc is the reference DC link voltage and Vdc1 is the minimum DC link volage level of DC bus. Vdc = 800 volt, Vdc1 considered as 790 volt , a= 1.2, t=350 microsecond and the calculated value of Cd is 1500 microfarad.

E. Design of AC Inductors:

The selection of ac inductance (Labc) of VSC depens upon the different parameters like the ripple current ∆i, switching frequency fs, modulation index (m), dc link voltage (Vdc) and Lf is given by

IV. CONTROL ALGORITHM

A. Control of VSC The synchronous reference frame theory (SRFT) control

used in indirect current control mode & the references of ac main currents is generated for the control of voltage source converter (VSC). The SRF theory is based on the approach of conversion of three phase components of load current into synchronously rotating d-q frame and the whole control is

L V D2∆i f

C ∆

D 1 VV

2√2√3

C I2 ω v

12 C V V 3VαIt

√3 12 ∆

(2)

(3)

(4)

(5)

(6)

(7)

(8)

shown in figure1. The transformation equation used for abc to dq0 conversion is

where cosθ & sinθ are generated through three phase , phase locked loop (PLL) over source voltage (Vsa, Vsb, Vsc ). The dq component of current and voltage consists of average component (dc component) & oscillating component (harmonic component).

B. Control for Unity Power Factor Operation For the operation of grid connected syste in unity power factor mode, the control algorithm considers that utility grid must supply direct axis component of load current as well as active power component of current required to regulate the DC bus voltage to the reference level & to feed VSC losses (iloss). The dedicated dc voltage PI controller regulates the dc bus voltage to desired reference level & provides the active power transfer for compensation of VSC losses. The value of current required to compensate the losses is given as [13]

Where & it is the error in between reference voltage V *

dc(k) and measured voltage Vdc(k) of dc link. Kpd & Kid are proportional and integral gain of the PI controller. The reference current generated for d component of grid current is given as

C. Control for Zero Voltage Regulation Mode of Operation For zero voltage regulation at point of common coupling (PCC) of the proposed system, considers that ac mains grid must delivers the quadrature axis current component (iq) with direct axis current component (id) & the PI controller used to regulate the voltage at the point of PCC. The input for the controller is the error signal generated by the difference of measured voltage at PCC (Vs) and the reference voltage (V*

s). The output of the PI controller generated reference in terms of quadrature component of current (I*

q). The amplitude of PCC voltage is given by the equation (12) The reactive power component of current generated through PI controller by the difference of measured voltage at PCC (Vs) and the reference voltage of PCC (Vs*) is given as

where is error between reference voltage of PCC & measured voltage at PCC. Kpd & Kid are the proportional and integral gains of PCC voltage PI controller.

The reference current generated in terms of q components is given as The reference for the ac mains grid in terms of abc components from the references in terms of dq0 component can be obtained using inverse Park’s transformation given as

V. RESULT AND DISCUSSIONS Performance and analysis of grid interconnected SPV system is presented on the basis of following terms: DC lik voltage (Vdc), PCC voltage (VPCC), grid voltage (Vs), grid current (Is), compensation current or VSC current (Ic), PV voltage (Vpv), PV current (Ipv), load current (Iload, Ia, Ib, Ic), active power from grid (P), reactive power from grid (Q). The system is investigated for different condition like load varying, unbalanced load, unity power factor operation and voltage regulation mode of operation.

1) Performance of the system for linear load varying condition under unity power factor: The performance for linear balanced system is shown in fig.2 for variable load at lagging power factor. At t=0.2 sec. another load connected in parallel and the performance shown for all terms.

2) Performance of the system for linear unbalanced load condition under unity power factor: The performance for linear unbalanced load condition is shown in fig.3. Phase a of the load is been disconnected at t=0.2 sec and at t=0.35 all the phases of load have been disconnected and at t=0.5 sec loads become connected in balanced mode. The dc bus voltage is been maintained and load currents (Ia, Ib, Ic) are balanced and total harmonic distortion (THD) is maintained well within the limits as per IEEE-519 [14] for ac mains current, ac mains voltage and load current.

3) Performance of the system for linear unbalanced load condition under zero voltage regulation: The performance for linear unbalanced load condition is shown in fig.4 for zero voltage regulation mode. Phase a of the load is been disconnected at t=0.2 sec and at t=0.35 all the phases of load have been disconnected and at t=0.5 sec loads become connected in balanced mode. The dc bus voltage is been maintained and load currents (Ia, Ib, Ic) are balanced. The PCC voltage is also maintained and zero voltage regulation is achieved and THD is maintained well within the limits.

iLiLiL23 cos θ cos θ 2π/3 cos θ 2π/3sin θ sin θ 2π/3 sin θ 2π/31/2 1/2 1/2 iLiLiL

1 1

1 1

23 /

iii cos θ sin θ 1cos θ 2π/3 sin θ 2π/3 1cos θ 2π/3 sin θ 2π/3 1 iii

(9)

(10)

(11)

(12)

(13)

(14)

(15)

Figure2: Performance of the System for lagging p.f. load varying condition for Unity Power Factor (UPF) and load balancing

Figure2: Performance of the System for lagging p.f. load varying condition for Unity Power Factor

Figure3: Performance of the System at unbalanced loads for Unity Power Factor (UPF) and Load Balancing

Figure4: Per

Figure4: Performance of the System at unbalanced loads for Zero Voltage Regulation (ZVR) and Load Balancing

-50

0

50

Is (A)

600

800

Vdc (V)

0

500

Vpv (V)

01020

Ipv

(A)

-500

0

500

Vs

(V)

Time(sce.)

1000

2000

3000

P (W)

-1000

0

1000

Q

(KV

ar)

-50

0

50

Iloa

d

(A)

0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.6-50

0

50

Ic (A)

Time (sec.)

600

800

Vdc (V)

0

500

Vpv (V)

0

10

20

Ipv

(A)

-50

0

50

Ic (A)

0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.60

500

Vt

(V)

i ( )

-500

0

500

Vs

(V)

-20

0

20

Is (A)

-20

0

20

Ia (A)

-20

0

20

Ib (A)

-20

0

20

Ic (A)

-500

0

500

Vs

(V)

-50

0

50

Is (A)

-20

0

20

Ia (A)

-20

0

20

Ib (A)

-20

0

20

Ic (A)

Time(sec.)

600

800

Vdc (V)

0

500

Vpv (V)

0

10

20

Ipv

(A)

-50

0

50

Ic (A)

0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 0.60

500

Vt

(V)

VI. CONCLUSIONS The grid interconnected SPV power generating system performance is investigated and analyzed successfully for different conditions like load variation for linear lagging power factor load and load unbalancing condition in two different modes: unity power factor (UPF) and zero voltage regulation (ZVR). The DC bus voltage and PCC voltage maintained at desired level for different conditions along with harmonics elimination and load balancing.

VII. APPENDICES A. Parameters for 10 kwatt Solar Photovoltaic System N = 1.3, Number of series cell (NSS) = 960, Series Resistance = 0.037998 ohms, Parallel Series Resistance = 953.5 ohms, Voltage at Pmax = 54.7*10 volt, Current at Pmax = 4.56*4 amps.

B. Parameters for DC-DC Boost converter D = 0.86, L = 1.5 mH, C = 250 μF, fsh = 10 kHz.

C. Parameters for VSC DC bus voltage:800V, DC bus Capacitance:1500μF, AC inductor: La=Lb=Lc=1.1mH, AC line voltage:415V, 50Hz, Switching frequency:10KHz, Modulation index: 0.9, Line impedance: Rs=.05Ω,Ls=1mH, Loads: 1) 18Kwatt & 3.6 KVAr 2) 6Kwatt & 1.2KVAr

ACKNOWLEDGMENT

Author Alka Singh wishes to thank the Department of Science and Technology, Government of India for the Sponsored Project under Fast Track Young Scientists Scheme SR/FTP/ETA-20/2010.

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