Li Gang, Jimson Mathew, Dhiraj PradhanDepartment of Computer Science,
University of Bristol, Bristol, UK.
Abstract—In this paper, we propose a novel memristor model with multinomial window function. The model describes the range of behaviours that a fabricated device can exhibit especially with respect to state transition behaviour with desired non-linear memristor characteristics. This multinomial window function can be obtained by fitting the measured data of a practical memristor device. Because the window function fits the measured data directly, the multinomial memristor model characterizes a real memristor.
Index Terms—Memristor, Multinomial model, verilog-a, simulation.
I. INTRODUCTION
A memristor is a passive two-terminal resistive element, whose resistance is a function of voltage across or the current through it. Memristor based resistive-variable memory devices have recently been proposed to overcome the limitations of traditional CMOS based memories [1]. These devices have the basic principle of storing the information bits as variable resistance values. Unlike traditional two-terminal devices, such as inductor or capacitor, memristors exhibit non-volatile state retention characteristics, making them particularly suitable for stable data storage [2, 3]. Moreover, these devices can be fabricated with finer layouts and sizes using non-lithographic methods like imprint lithography enabling nanoscale geometries with short access latencies. With these coveted properties, memristors have the potential of realizations in current and future generations of memories. Hence, currently there is a lot of interest both in academia and in industry in the research and development of memristor based memory device.
To extract the benefits of high efficiency and packing density, various memristor array architectures have been proposed to date. For example, passive crossbar arrays of memristive elements were reported as possible non-volatile random access memories [1]. However, passive crossbar arrays have the general issue with sneak-path currents due to interference from the neighbouring cells when selecting a designated cell within the arrays. To avoid sneak-path currents, recently complementary resistive switches (CRS) were proposed [1,3], which consist of two anti-serial memristive
elements. Such interconnection introduces intermediate memristor states that can reduce the sneak-path currents significantly, facilitating the development of large passive crossbar arrays with reduced power consumption.
Effective simulation model is a critical requirement for the development and validation of memristor based systems. Although a number of memristor models have been reported so far, currently there is a lack of effective simulation model that captures the exact state behaviour the element. For example, memristor models proposed in [4-7] are effective for modeling basic memristor characteristics with ion drift or non-linear ion drift behaviour. However, these models cannot capture the full behaviour. Recently, single memristor based model, called TEAM, has been proposed in [8]. This model can characterize the non-linear behaviour of memristors. However, due to current based state control in memristors, it can exhibit asymmetric ON/OFF voltages (i.e. low ON voltage and high OFF voltage).
In this paper, we propose a novel state transition behaviour with desired non-linear memristor characteristics, using multinomial window function. This multinomial window function can be obtained by fitting the measured data of a practical memristor device. Because the window function fits the measured data directly, the multinomial memristor model characterizes a real memristor. In other words, this model can very well fit into hardware correlations to physical experimental data (using measurements from fabricated experimental data) and the model matches very closely.
II. MULTINOMIAL MEMRISTOR MODEL
A. Multinomial Window Function In this paper, multinomial is used as the window function
for the memristor model. The multinomial window function can be obtained by fitting the measured data of a practical memristor. Because the window function fits the measured data directly, the multinomial memristor model coincide with the practical memristor property well. And the concrete window function parameters can be calculated by curve fitting software accurately.
2013 International Symposium on Electronic System Design
Window function fitted data of a memristor at a certain dropped voltage are assumed in the Tab. I. The method how to get the window function fitting data will be introduced in the next section.
The data in the Tab. I can be fitted by a multinomial shown as Eq. 1 and 2. If the degrees of multinomial are different then the curve fitting effect will be different too. Usually, the degree is higher, the fitting effect is better. Equation 1 and 2 show the fitting multinomial of degree 3 and 10 respectively by using the fitted data in Tab. I.
Figure 1 (a) shows the fitting curves using the fitted data in Tab. I. Window function fitted data of the same memristor will change if the voltage dropped on the memristor changed. Namely, the doping interface position drifting ratio will be influenced by the voltage dropped on the memristor. Generally, when the voltage dropped on the memristor is higher than the threshold voltage, the doping interface position drifting speed will be fast, and vice verse. Table I shows the window function fitted data that the voltage dropped on the memristor is higher than the threshold voltage. Table II shows the window function fitted data that the voltage dropped on the memristor is lower than the threshold voltage. Equation 3 and 4 show the fitting multinomial of degree 3 and 10 respectively by using the fitted data in Tab. II. Figure 1 (b) shows the fitting curves using the fitted data in Tab. II.
It’s obviously that the fitting curve slope of figure 1 (a) is larger than that of figure 1 (b) when the w/d is closed to 0 or 1. It means that the doping interface position drifting speed of the memristor dropped on a voltage higher than threshold voltage is faster than that of the memristor dropped on a voltage lower than threshold voltage.
B. Multinomial Memristor ModelMultinomial memristor model can be represented by
dw/dt= ( Ron/D)i(t)f(w/D)stp(D-w)stp(w) (5)
v(t)=(Ronw(t)/D+Roff(1-w(t)/D))i(t) (6)
⎩⎨⎧
<≥
=.0,0
0,1)(
xx
xstp (7)
Function stp(x) is used to avoid the doping interface position exceeding the memristor bounds.
Figure 2 (a) and (b) show the doping interface position drifting speeds when the memristors are dropped on certain voltages higher or lower than threshold voltage respectively. Figure 2 (a) and (b) show that the doping interface position drifting speed has a big difference because of the dropped voltage. This big drifting speed difference results in an enormous drifting time difference when the doping interface drifts from one side to the other side.
In Fig. 2, μv=10-10 cm2s-1v-1, D=10 nm, Roff=38 kΩ and Ron=100 Ω. These parameter values are applied in the other figures in this paper. The voltage dropped on the memristor is DC 1V.
Figure 3 shows the relationship between doping interface position w and time t.
0 0.5 1
x 10-8
0
1
2
3
4
5
6x 10
-7w-dw curves: dropped voltage
higher than threshold
w(m)
dw(m
)
0 0.5 1
x 10-8
0
1
2
3
4x 10
-12w-dw curves: dropped voltage
lower than threshold
w(m)
dw(m
)
(a) (b)
Fig. 2. Doping interface position drifting speed curves.
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0 0.1 0.2 0.3 0.40
0.2
0.4
0.6
0.8
1
x 10-8
t-w curves: dropped voltage higher than threshold
t(s)
w(m
)
w: 0-Dw: D-0
0 1 2 3 4
x 104
-2
0
2
4
6
8
10
x 10-9
t-w curves: dropped voltage lower than threshold
t(s)w
(m)
w: 0-Dw: D-0
a) (b)
0 5 10
x 105
0
0.2
0.4
0.6
0.8
1
x 10-8
t-w curves: dropped voltage lower than threshold
t(s)
w(m
)
w: 0-Dw: D-0
(c)
Fig. 3. Doping interface position curves.
In Fig. 3, the voltage dropped on the memristor is DC 1V.Figure 3 (a) shows that it needs about 0.35 second for
doping interface drifting from position 0 to position D (10-8m) or in inverse direction when the voltage dropped on the memristor is higher than the threshold voltage. Figure 3 (c) shows that it needs about 1100000 seconds for doping interface drifting from position 0 to position D or in inverse direction when the voltage dropped on the memristor is lower than the threshold voltage. It is also obviously that the doping interface drifts very slowly at the beginning when it drifts from position 0 to position D. Figure 3 (a) shows that within 0.13 second the doping interface almost does not move a little. Fig. 3 (b) shows that within 40000 seconds the doping interface almost does not move a little. But there are no such obvious phenomena when the doping interface drifts from position D to position 0 because the ratio of Roff to Ron is too big.
Figure 4 (a) shows the relationship between doping interface position and time. Figure 4 (b) shows the relationship between current and dropped voltage of memristor. Figure 4 indicates that the doping interface will drift almost linearly when it is not very closed to the two ends of the memristor.
In Fig. 4, the voltage dropped on the memristor is sinusoidal voltage v=sin(6.4×π×t)V.
0 2 40
0.2
0.4
0.6
0.8
1
x 10-8 w-t curve
t(s)
w(m
)
-1 0 1-1
0
1x 10
-4 i-v curve
v(V)
i(A)
(a) (b)
Fig. 4. Doping interface position – time and current – voltage curves.
C. Method to Obtain Multinomial Window Function The multinomial window function is the key for the
multinomial model of memristor. There are four steps to obtain the multinomial window function of a practical memristor.
1. The current im of the memristor shown in Tab. 3 should be measured at a certain dropped voltage Vm by using the experiments.
2. The doping interface position wm is calculated and shown in Tab. 3 by using the relationship between the doping interface position wm and the memristor current shown as Eq. 6. Multinomial f(wm) is used to fit the data wm.
3. Multinomial f(wm) is differentiated to get the differential function f’(wm) . The f’(wm) value at every sampling time point is calculated and shown in Tab. 3.
4. The f’(wm) value is divided by μv×Ron×im÷D) to get the window function fitted data F(wm/D) shown in Tab. 3. Multinomial window function f(w/D) will be fitted by using data F(wm/D) at last.
Therefore, the multinomial window function can be obtained through the experiments. Different memristors have different window functions. Different dropped voltages also bring different window functions. Multinomial memristor model will be obtained by using this method finally.
III. MULTINOMIAL MEMRISTOR ANALOG-A MODEL AND SIMULATION
The multinomial memristor analog-a model is based on the multinomial widow function introduced in the former section. The key program of the multinomial memristor analog-a model is shown as the following program.
TABLE III. DATA REQUIRED TO OBTAIN MULTINOMIAL WINDOW FUNCTION
………………………. parameter real init_state = 0.2; parameter real uv = 1e-13; parameter real dt = 0; parameter real vthreshold = 0; real f_drift, dwdt, w_last, w, first_iteration; analog begin ……………………….if (abs(V(p,n))> vthreshold) f_drift = …*stp(V(p,n),w_last-
w_last/D)*Roff)*f_drift;w_last =dt*dwdt+w_last;I(p,n) <+ V(p,n)/(w_last/D*Ron+(1-w_last/D)*Roff); ……………………….In the above program, parameter init_state is original
doping interface position of w/D, stp() function is used to avoid the doping interface position exceeding the memristor bounds, uv is average ion mobility, real f_drift is window function and vthreshold is threshold voltage. If a small voltage is dropped on the memristor, the doping interface will drift almost linearly. This can be seen in Fig. 5.
In Fig. 5, the power supply is sinusoidal voltage source v=sin(6.4×π×t)V. The memristor is connected with a 100 resistor in series. First curve v(3) is the doping interface position drifting from 2nm to 7nm. Second curve v(1) is the voltage of the power supply. Last curve i(vp) is the relationship between power supply current and voltage.
If a high voltage is dropped on the memristor, the doping interface will drift nonlinearly. This can be seen in Fig. 6.
In Fig. 6, the power supply is pulse voltage source whose amplitude is 4V, interval is 0.3125s, rising time is 1ns and falling time is 1ns. The memristor is connected with a 100 resistor in series. First curve v(3) is the doping interface position drifting from 0nm to 10nm. Second curve v(1) is the voltage of the power supply. Last curve i(vp) is the relationship between power supply current and voltage.
The memristors can be used as a memory device when the memristor operate on the nonlinear state. It’s the state 1 when doping interface position w is 0. It’s the state 0 when doping interface position w is D. This multinomial memristor verilog-a model can be applied to compose the CRS verilog-a model which is a kind of memory cell.
Fig. 5. Multinomial memristor model simulation result with low input voltage.
Fig. 6. Multinomial memristor model simulation result with high input voltage.
IV. COMPLEMENTARY RESISTIVE SWITCH ANALOG-A MODEL AND SIMULATION
This multinomial memristor verilog-a model also can be applied to simulate the CRS which is a kind of memory cell to solve the sneak-path problem of the memristor array. Figure 7 shows the characteristics of the CRS when its voltage is raised gradually. Figure 8 shows the performance of the CRS when it operates on a given pulse voltage.
Fig. 7. CRS model simulation result with sinusoidal input voltage.
In Fig. 7, the power supply is sinusoidal voltage source v=14sin(0.8×π×t)V. The CRS is connected with a 100Ω resistor in series. First curve v(3) is the doping interface position of one memristor of the CRS. Second curve v(5) is the doping interface position of the other memristor of the CRS. Third curve v(4) is the voltage of the power supply. Fourth curve i(vp) is the relationship between power supply current and voltage.
Fig. 8. CRS model simulation result with pulse input voltage.
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In Fig. 8, the power supply is pulse voltage source whose amplitude is 14V, interval is 0.3125s, rising time is 1ns and falling time is 1ns. The CRS is connected with a 100 resistor in series. First curve v(3) is the doping interface position of one memristor of the CRS. Second curve v(5) is the doping interface position of the other memristor of the CRS. Third curve v(4) is the voltage of the power supply. Fourth curve i(vp) is the current of power supply.
Figure 8 shows that CRS will change its state from 1 (inside two memristors being 1 and 0 respectively) to 0 (inside two memristors being 0 and 1 respectively) or from 0 to 1 according to the polarity of the voltage applied to the CRS. Before the CRS changes into the new state, there is a transient state that inside two memristors are all in the 1 state. In the transient state, there is a peak current of i(vp). When CRS is applied a reading voltage smaller than the writing voltage, there is also the peak current. This peak current can be measured and used to judge the information (1 or 0) stored in the CRS [3, 9]. Figure 8 also shows that there is a time delay when CRS changes its state from one to the other. This delayed time has a relation with the CRS device itself and the applied voltage. The CRS analog-a model parameters can be modified if the CRS device changed. So the delay time of CRS state changing can be controlled by CRS analog-a model parameters and the applied voltage.
A comparison of different memristor models is list in the Tab. IV.
TABLE IV. COMPARISON OF DIFFERENT MEMRISTOR MODELS
Model Nonlinear ion drift
[5]
Simmons tunneling barrier
[6]
Yakopcic et al[7]
Team[8]
Multi-nomial
State variable
0≤w≤1Doped region normalized
width
αoff≤x≤αonUdoped region width
0≤x≤1No physical explanation
xon≤x≤xoffUndoped
region width
0≤w≤DDoped region
physical width
Control mechanism
Voltage controlled
Current controlled
Voltage controlled
Current controlled
Voltage controlled
Current-voltage
relationship and
memristance deduction
I-V relationship
explicitMemristance
deduction ambiguous
Ambiguous Ambiguous Explicit Explicit
Matching memristive
system definition
No No No Yes Yes
Generic No No Moderate Yes YesAccuracy comparing practical
memristive devices
Lowest accuracy
Highest accuracy
Moderate accuracy
Sufficient accuracy
Sufficient accuracy
Threshold exists
No Practically exists
Yes Yes Yes
Simple to get
parameter
No No No No Yes
V. CONCLUSION
In this paper, a memristor multinomial model with multinomial window function was proposed. The model parameters were obtained from the practical measured data of the memristor, so the model fitted the physical memristor device characteriscs well. The analog-a model based on this model simulated the memristor and CRS device well too. So the proposed model could be applied to design and analyze the device composed of memristors.
REFERENCES
[1] M. A. Zidan, H. A. H.vFahmy, M. M. Hussain, and K. N. Salama, “Memristor-based memory: the sneak paths problem and solutions,” Microelectronics Journal, Vol. 44, (2), pp.176-183, 2013.
[2] R. Rosezin, E. Linn, L. Nielen, C. Kvgeler, R. Bruchhaus, and R. Waser, “Integrated complementary resistive switches for passive high-density nanocrossbar arrays,” IEEE Electron Device Letters, vol. 32, (2), pp. 191-193, 2011.
[3] E. Linn, R. Rosezin, C. kvgeler, and R. Waser, “Complementary resistive switches for passive nanocrossbar memories,” Nature Materials Letters, vol. 9, pp. 403-406, 2010.
[4] A. G. Radwan, M. A. Zidan, and K. N. Salama, “On the mathematical modeling of memristors,” 22nd International Conference on Microelectronics, pp. 284-287, 2010.
[5] E. Lehtonen, and M. Laiho, “CNN using memristors for neighbourhood connections,” Int. Workshop Cell. Nanoscale Netw. Their APPL, Feb, pp. 1-4, 2010.
[6] M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider, D. R. Stewart, and R. S. Williams, “Switching dynamics in titanium dioxide memristive devices,” J. Appl. Phys. Vol. 106, (7), pp. 1-6 , 2009.
[7] C. Yakopcic, T. M. Taha, G. Subramanyam, R.E. Pino, and S. Rogers, “A memristor device model,” IEEE Electron Device Lett., Vol. 32, (10), pp. 1436-1438, 2011.
[8] S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, “TEAM: threshold adaptive memristor model,” IEEE Trans. Circuits and Systems, Vol. 60, (1), pp. 211-221, 2013.
[9] S. M. Yu, J. L. Liang, Y. Wu, and H. P. Wong, “Read/write schemes analysis for novel complementary resistive switches in passive crossbar memory arrays,” Nanotechnology, vol. 21, 465202, 5pp, 2010.
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