An Impedance Measurement Analog Front End forWirelessly Bioimplantable ApplicationsCihun-Siyong Alex Gong*, Kai-Wen Yao**, Muh-Tian Shiue***, and Yin Chang****

*/*** Industrial Technology Research Institute, Taiwan, R.O.C.Email: alexgong@itri.org.tw; alexgong@kimo.com

**/*** Department of Electrical Engineering, National Central University, Taiwan, R.O.C.*/**** Institute of Biophotonics, National Yang-Ming University, Taiwan, R.O.C.

Abstract— This paper reports on design and implementation ofan impedance measurement analog front end (AFE) for wirelesslypowered medical electronic applications. Going through theliterature on the implantable applications, it is understood thata common impedance value of 10 kΩ is agreed in terms ofthe human tissues. It is, however, also well known that suchan impedance value could be varied toward 100 kΩ as aresult of the variances in electrode-tissue interfacing, indicatinginternally physiological change or electrode failure. The variancesin electrode-tissue interfacing also cause electrode with unequalcharges in biphasic stimulation, damaging surrounding neurons.Proposed aims to overcome the potential problem, which is ableto differentiate variances in impedance ranging from 10 kΩ to100 kΩ. An impedance value exceeding 100 kΩ is consideredelectrode failure due to the malfunction of providing predefinedcurrent output in stimulator. The measured impedance canbe backscattered to the external device through an integratedmodulation technique.

I. INTRODUCTION

Thanks to the rapid advance in the technologies of integratedcircuit (IC) during the last ten years, it is possible to realizea complex signal processing system with large number oftransistors in a single microchip, which creates the possibilityof reconstructing lost sophisticated human sensations. Today,implantable chips, such as the cochlear implant, have beenable to be used to regain the great part of the sense of losthearing. An implantable device commits itself to performingmedical treatment by activating tissue or cell response throughinjecting a current or providing a potential. The first pacemakerinvented by Zoll et al. is in the year 1950. In 1961, Libersonand Holmquest performed, for the first time, low-frequencyelectrical stimulation therapy for the suffer of stroke, knownas the functional electrical stimulation, FES [1]. For an im-plantable device performing stimulation, the electrode shouldbe in close proximity of the targeted tissues or cells. Owningto the physical limitations such as electrode geometry andsurface, spatial placement, choices of electrode materials andsizes, and so forth, however, a real impedance value variessignificantly, ranging from 10 kΩ to 100 kΩ [2]-[4]. Too highan impedance can result in insufficient stimulus current andunpredictable charge accumulation on electrode which maypotentially damage surrounding living bodies, and thereforeshould be considered electrode failure. This paper proposes tomonitor the impedance change of the interfacing and modulatethe corresponding digitized data intended to be sent outside

the internal device via an embedded wireless link. The datacan be used to understand real-time impedance variationsin interfacing, thereby diagnosing the implant functionalityand providing efficient stimulation treatment. They are alsovaluable feedback to the built-in self-test capability of elec-trode positioning for a medical device performing vital signalsrecording and/or stimulation. The results obtained from theinterfacing impedance would also be beneficial to further op-timize the design of new-generation electrodes involved. Therest of the paper will elaborate on how the above mentioneddesign is dealt with in circuit means and the experimentalresults from the proof-of-concept prototypes.

II. ARCHITECTURE, COMPARISON, AND CIRCUITS

Fig. 1 shows the generic architecture in biomedical elec-tronic implant. Zoom in, and get a close look at 𝑅𝑒𝑐𝑜𝑟𝑑𝑖𝑛𝑔,𝑁𝑒𝑢𝑟𝑎𝑙 𝐼𝑛𝑡𝑒𝑟𝑓𝑎𝑐𝑒, 𝐵𝑎𝑐𝑘 𝑆𝑐𝑎𝑡𝑡𝑒𝑟𝑖𝑛𝑔, and the 𝐸𝑥𝑡𝑒𝑟𝑛𝑎𝑙parts, an architecture shown in Fig. 2 is proposed for thepurpose of impedance monitoring. The left of the ”Internal”part represents the electrode-tissue interfacing (ETI) model[5], which is the target. The ETI model consists of twoequivalent Electrode models, each of them can be representedas a R//C network with a double-layer capacitor and a chargetransfer resistor, and one Tissue model composed of bothtissue resistance and the access one [5]. Previous designsused either high-complexity AC-based impedance decompo-sition method, such as the one presented in [4], or recentlyinvestigated low-complexity DC-based counterparts [5]. Thelatter revealed worse measurement accuracy in spite of theirremarkable efficiency in both power and area aspects. Fortu-nately, an implant with which combines intrinsic stimulatorcan not only make better compromise between having AC-based impedance diagnosis functionality and its efficiencybut also include the DC-based counterpart, using the sameimplemented hardware as well as depending on the downlinkparameters programmable for mode switching. In addition,all the designs in [4] and [5], featuring invasively prostheticpurposes, have not included on-implant back telemetry forfull integration, which is another subject of the proposedsystem. With regards to the stimulation-based system, forvoltage-mode stimulation, the current output is considerablyaffected by the impedance value. On the other hand, current-mode counterpart has constant current output on the basis an

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Demodulator

SeriesRegulator(Baseband)Peak

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RectifierShunt

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Fig. 1. Representative architecture of wirelessly powered medical electronic implant.

Fig. 2. Proposed AFE for wireless impedance measurement system.

impedance value within an acceptable range (10 kΩ to 100kΩ here). A two-point measurement of impedance is adopted[6], followed by the instrumentation amplifier (IA) and ADCused for data acquisition. The load-shift-keying (LSK) driver isused for 𝐵𝑎𝑐𝑘 𝑆𝑐𝑎𝑡𝑡𝑒𝑟𝑖𝑛𝑔. The 𝐸𝑥𝑡𝑒𝑟𝑛𝑎𝑙 parts consist of theclass-E power amplifier gated by Vsw capable of performingamplitude-shift-keying (ASK) modulation whenever needed.With regards to the data recovery of the measured impedanceat the 𝐸𝑥𝑡𝑒𝑟𝑛𝑎𝑙 parts, 𝐹𝑒𝑒𝑑𝑏𝑎𝑐𝑘 𝐶𝑜𝑛𝑡𝑟𝑜𝑙𝑙𝑒𝑟, shown in Fig.1, for current sensing readout is in charge of the job. We detailthe circuits involved below.

1) IA, Instrumentation Amplifier

An IA should at least have two apparent characteristics-high input impedance and high common-mode rejection ratio(CMRR). One would like to obtain from IA is the differentialgain. It is, however, the differential input signal accompaniescommon-mode level. As a result, the output and also the IAperformance are affected by the common-mode gain, which isthe reason an IA requires sufficient CMRR. With regards to theconventional IA requiring three-OP-Amp differential amplifierwith resistive feedback, however, good CMRR is related toresistors matching, relying on post-IC-fabrication trimming toreduce common-mode gain and consequently increasing theimplementation overhead [7]. As a result, the design of [7],shown in Fig. 3, has been adopted in the proposed system.The most significant feature of the design is that it requiresonly two resistors. 𝐴1 and 𝐴2 form source followers asconventional, thereby forcing 𝑉𝐴=𝑉𝑋 and 𝑉𝐵=𝑉𝑌 . The currentflowing out of 𝐴1 and that of 𝐴2 are equal, but they haveopposite polarities. By using the current subtractor, marked indotted line in Fig. 3(a), whose circuit is shown in Fig. 3(b), onecan obtain 𝐼𝐺=2𝐼𝑅1, hence the formula 𝑉𝑜𝑢𝑡=2𝑅𝐺/𝑅1(𝑉𝐴-𝑉𝐵)

can be deduced.

2) ADC, Analog-to-Digital Converter

To monitor the interfacing, demand for high effective numberof bits (ENOB) on the ADC is not strictly required as manyoff-the-shelf consumer applications. In our system, a 3-bitFLASH ADC architecture shown in Fig. 4(a) is adopted asthe stimulator involved has the same resolution. Fig. 4(b) isthe clocked comparator involved having two modes: Reset(CLK=logic ”LOW”) and Operate (CLK=logic ”HIGH”). TheDecoder, shown in Fig. 5, converts the Thermometer Code toGray Code and then the Binary Code, reducing the perfor-mance degradation caused by the bubble errors.

3) LSK, Load-Shift-Keying

In general, the underlying principle of the backscatteringmechanism used in the implantable systems is the same asthat used in RFID. In Fig. 6, by gating the LSK-modulatedtransistor through 𝑉𝑆𝑊1, one can create an equivalent reflectedimpedance 𝑍𝑟 that can be sensed and read out in the primaryside. Given that the class-E-based ASK driver in the primaryside has constant average power predefined, 𝑉𝐿1 decreaseswith increased current drawn caused by 𝑅 when 𝑉𝑆𝑊1= logic”HIGH” (1), performing LSK. Note that 𝑉𝑆𝑊 , used for ASK,and 𝑉𝑆𝑊1 should not be performed at the same time.

III. MEASUREMENT RESULTS

We have implemented the proposed architecture whoselayout and chip photomicrograph are shown in Fig. 7 in a0.18-𝜇m 1P6M standard CMOS process. The core of thechip occupies 1.2*0.635 𝑚𝑚2. In IA, to extend the inputrange, thick-oxide tolerating 3.3-V supply is used. The IAis designed to possess 8-X differential gain, which can be

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Fig. 3. (a) IA. (b) Current subtractor involved.

seen from the oscilloscope trace in Fig. 8. A 10-KHz 0.1-V sinusoidal signal was input to the IA under test for the”AC-based impedance decomposition” mode. The results wererecorded through Agilent MSO9104A. The measured gain andbandwidth are, respectively, 15 dB and 60 KHz while thepost-layout simulation shows the counterparts of 18 dB and100 KHz. A CMRR of exceeding 100 dB was also measuredthrough the same experimental setup. For ADC, ENOB of3 bits is demonstrated from the oscilloscope trace shown inFig. 9. To ensure that the ADC has sufficient post-fabricationyield on resolution, Monte Carlo analysis has been performedfor mismatch-induced input offset of the comparator priorto physical implementation. One sigma standard deviation ofthe input-referred offset voltage is around 20 mV, which canbe found according to [8]. The offset voltage is less thanhalf of that of the ADC least significant bit (43.75 mV),guaranteeing its ENOB. The LSK-modulated waveform hasbeen observed from one of the two terminals at secondary coil.The backscattering data regarding the measured electrode-tissue interfacing impedance were sensed and demodulated atthe primary side (the demodulator is not included in this chip).Both of them can be seen in Fig. 10. The entire impedancemeasurement circuitry consumes approximate 6 mW includingregular LSK modulation when supplied in 3.3 V. Whole sys-tem evaluation using a real dummy load of (10 kΩ)//(10 nF),representing a single ”Electrode model” without the accessresistance, at 1-KHz ”AC-based impedance decomposition”mode has been performed. The 1-KHz sinusoidal currentflowing through the load was output from a stimulator, one ofthe two redesigned 3-bit counterparts based on that proposed in[9], with unitary DAC cells (not shown). The stimulator wasimplemented in the 3.3-V I/O devices of the same processand can withstand a supply voltage as high as 3.6 V. The

Vout +Vout-

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Fig. 4. (a) Flash ADC. (b) Clocked comparator involved.

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Fig. 5. Decoder circuit.

parameters programming the stimulator for mode selectionof the impedance measurement were wirelessly transmittedthrough a platform and received, demodulated, and decodedby another platform including a fully digital chip shown in [10]for post-impedance-sensing processing. Table I summarizesthe work competitive with those in the literature.

IV. CONCLUSION

Proposed aims at wireless monitoring of the interfacingimpedance involved in a biomedical implant. The recordedparameters can be used to diagnose implant functionality. TheAFE design has become part of our implantable prosthesis. Ex-perimental results from the fabricated chips are given as proofof concept, demonstrating that the chip is fully functionalto indicate electrode failure. The applications with differentimpedance change ranges can also benefit from the workprovided that the circuits are redesigned accordingly.

ACKNOWLEDGMENT

The authors would like to thank the CIC, Taiwan, for chipdesign assistance. Funding supports from the NSC contract101-2220-E-008-007- and ITRI are appreciated.

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Fig. 6. Modulators.

Fig. 7. Photomicrograph of fabricated chip.

REFERENCES

[1] W. T. Liberson et al. ”Functional electrotherapy: stimulation of peronealnerve synchronized with the swing phase of the gait of hemiplegicpatients,” Arch. Phys. Med. Rehabil., pp. 101-105, 1961.

[2] M. Mahadevappa et al. ”Perceptual thresholds and electrode impedance intree retinal prosthesis subjects,” IEEE Trans. Neural Syst. Rehabil. Eng.,pp. 201-206, 2005.

[3] A. P. Chu et al. ”Stimulus induced pH changes in retinal implant,” Proc.26th Annu. Int. Conf. IEEE EMBS, pp. 4160-4162, 2004.

[4] A. Uehara et al. ”CMOS retinal prosthesis with on-chip electrodeimpedance measurement,” Electron. Lett., pp. 582-584, 2004.

[5] A. Uranga et al. ”Electrode-Tissue Impedance Measurement CMOS ASICfor Functional Electrical Stimulation Neuroprostheses,” IEEE Trans. Instr.Meas., pp. 2043-2050, 2007.

[6] J. M. Torrents and R. P-Areny, ”Error analysis in two-terminal impedancemeasurements with residual correction,” IEEE Trans. Instr. Meas., pp.2113-2116, 2005.

[7] A. Harb and M. Sawan, ”New low-power low-voltage high-CMRR CMOSinstrumentation amplifier,” IEEE ICECS, pp. 517-520, 1999.

[8] B. Wicht et al., ”Yield anld Speed Optimnization of a Latch-Type VoltageSense Amplifier,” IEEE Journal of Solid-State Circuits, pp. 1148-1158,2004.

[9] Alex Gong et al., ”An Efficient Micro-Stimulator Array Using Unitary-Size DAC with Adiabatic Baseband Scheme,” IEEE ICECS, pp. 29-32,2006.

[10] Alex Gong et al., ”Design and Implementation of a Monolithic Program-Controlled System for Retinal Prosthesis,” IEEE ICECS, pp. 351-354,2006.

Fig. 8. Oscilloscope trace of IA.

Fig. 9. Oscilloscope trace of ADC.

Fig. 10. LSK waveforms and recovered 𝑉𝑆𝑊1. (2.56-MHz carrier frequency)

TABLE I

PERFORMANCE SUMMARY

Whole Impedance Monitoring System(*Including Those Stemming from [9] and [10])

(LSK@ 2.56-MHz carrier frequency)

(LSK@ 2.56-MHz carrier frequency)

(max.) @1-KHz AC input (256

sample/cycle), 32-uA sti. current (8 LSBs), and

10KOhm//10nF dummy load

175