IEEE Development of a Test Bed for High Speed PLC

8/3/2019 IEEE Development of a Test Bed for High Speed PLC

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Development of a Test Bed for High-speed Power Line Communications

C.K. Lim, *P.L So, E. Gunawan, S . Chen, T.T. Lie, Y.L. G u a nSchoolof Electrical and E lectronic Engineering

Nanyang Techno logical UniversitySingapore 639798

*E-mail: eplso@n tu.edu.sg Tel: (65) 790-5026 Fax: 65) 793-3318

Abstract: This paper presents the development of a power linetest bed which provides a platform to simulate the 230V power lineenvironment in a controlled and reproducible manner. The target isto communicate data reliably over power lines at speeds of at least I

Mbitds with frequency ranging from IMHz to 1OMHz. This test bedis integrated with a power line communication channel, power linecouplers, loads and impairment devices for worst case environmentsimulation. A method for coupling the high-frequency signal ontoand from the power line is discussed.The design of digital filters fortransceivers using advanced digital signal processing techniques is

presented. The digital filters are used to amplify, condition andrecover the high-frequency signals which have been attenuated andcorrupted by noise at the channel.

Keywords: Power line platform, impairment devices, transceivers,coupling circuits, digital filters.

I. INTRODUCTION

The low voltage (LV) electrical power distribution networkrepresents the most attractive m edium for high-speed digitalcommunication purposes due to an ever-increasing demandcaused by the advances in communication and informationtechnologies. Hence, it w ill open u p the possibility to powerutilities to establish widespread local area networks (LAN)for telecommunication services such as Internet access andmultimedia communication. However, the LV networks turnout to be rather hostile, unusual and unpredictable channelsdue to the fact that their design has never involvedcommunication aspects but electrical energy transmission.

The LV network is a widely spread network withdistribution transformer’s secondary as the driving force andmany loads connected in parallel. In Singapore, eachdistribution transformer in the LV network supplies electricalenergy to about 500 households over 230V lines and with acable of about 30Om in a ring circuit. The power line and itsparallel connected loads are rather dynamic and changing atall the time. In addition to the noises present on the powerlines, communication signals transmitted over power lineswill experience line impedance, attenuation and phase shiftwhich can vary not only with frequency, but also with time,location and d istance. Thi s consequently presents difficultiesto system designers when developing and testing their

designed communication transceivers. In order to overcomesuch difficulties, it will be good if the power linecommunication (PLC) channel environment can be modeled

and emulated on a platform in a reproducible and repeatablemanner so that the development of the PLC transceivers isfeasible. Although the power line is an attractive high-speed

communication medium for applications such as Intemet access an dmultimedia communication, its unpredictable characteristics havebeen great obstacles to the PLC development.

This paper presents the development of a power line test

bed which provides a platform to simulate the power lineenvironment. The test bed allows the line impedance andattenuation between PLC transceivers to be adjusted tosimulate various conditions typically found in 230V powerline network and allows various impairment devices to be

added to the test environment, so that evaluation,characterization and tests are performed in a controlled and

reproducible environment. It is specifically designed forfrequency spectrum of lMHz to loMHz with the datatransmission rate of at least lMbits/s, and for frequencyspectrum of 1OOkHz to 400kI-I~ nder CEBus power linephysical layer and medium specification. The hardwarelayout of the PLC test bed an d interfacing technique with the

ac power lines are described. A brief overview of a PLCsystem and the characteristics of power lines are discussed.The PLC transceivers using advanced digital signalprocessing (DSP) techniques for extracting and recoveringthe corrupted and attenuated receiving signals are presented.

11. PLCSYSTEM

The proposed high-speed PLC system at “last-mile” is

typically made up of transmitters and receivers or both (so-called as transceivers) at a communication point which areneeded for generation and recovery of the high frequencycommunication signal, and so me coupling circuits as shownin Fig. 1. The coupling circuits are used to couple themodulated carrier signal onto and from the power lineswithout compromising the power frequency 5OHz insulationlevel.

The PLC modem represented by transmitter and receiverblock at the sending end (i.e. at the low voltage side of thedistribution transformer) in Fig. 1 will convert theinformation into data packets which are modulated onto acarrier frequency spectrum. The modulated signal is thensuper-imposed onto the 5OHz power system voltage on thepower lines and hence being transmitted. At the receiving

end, the information will be reclaimed by a demodulationprocess.

Before the high-speed PLC test bed which represents thetypical PLC system as mentioned above can be developedinto a reliable and efficient platform, it is important to fully

0-7803-6338-8/00/$10.00(~)2000EEE 45 1



understand the characteristics of power lines. The followingsection will briefly discuss the characteristics of power lines.

Transformer

User's Premises&ompvler

Rg. 1. A typical PLC ystem

111. POWER LINE CHA RAC TERIST ICS

Studies have demonstrated that the power line impedance

is a strongly fluctuating variable, depend ing on specific loadsbeing connected in p arallel to the network at specific times,which could not be controlled by the PLC transmitters andreceivers. From [ l ] , the power line impedance is frequencydependent According to Nicholson and Malack [2], thecharacteristic impedance of the power lines increases withfrequency, and the overall impedance of a LV network isresulted from:

Impedance of the distribution transformer that increases

with frequency.

Characteristic impedance of the cables used.

Impedance of the devicesAoads connected to thenetwork.

Regarding to signal transmission, impedance matching is

important since the signal powerat

the rece iver side reachesmaximum when the impedance of transmitter, receiver andchannel are matched [3], i.e. maximum power transfer.Moreover, a power line has its own m ultipath effects similarto a RF channel that will cause selective fading and inter-symbol interference [4].

The next power line obstacle is the attenuation, whichgenerally increases w ith frequency. A low pass characteristicwith unpredictable nulls (notches) has been observed for allpower line cable connections, and thu s should be regarded as

one of the major properties of PLC at least in the frequencyrange of above 500kHz [5]. For example, one of theattenuation spectral that has been obtained from a LVnetwork in laboratory environment is shown in Fig. 2.

On he notoriously noisy power line, the primary sourcesof noise are the various electrical loads connected to thedistribution transformer's secondary (see Fig. 1). It has been

shown that the primary sources of noise are triacs used inlight dimmers [3] and the switching action of brushes inuniversal motors of vacuum cleaners. The noise magnitude

produced by triacs is as great as that generated by universalmotors found in vacuum cleaners. However, the triacs createan im pulse noise at every half cycle of pow er frequency, i.e.noise that is synchronous to power frequency, while the

universal motors produce a relatively smooth spectrum, i.e.broadband noise. A corroded wiring junction will have asemiconductor effect in which its nonlinearity induces noiseon every half power cycle. One should note that when every

device is unplugged, the noise still presents due to thecoupled R F signals from surrounding on to the power line.

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0

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9

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Rg. 2. Attenuation spectralat a LV network ina laboratory environment

The noises in a power line can be categorized to a few

Noise having line components synchronous with power

system frequency that consists of a series of harmonicsof the 100 Hz fundamental component. The majorsources for this type of noise are triacs in light dimmers.

Noise with a smooth spectrum w hich has a relatively flatspectrum can be modeled as band limited white noise.The LV network also exhibits additive white Gaussian

noise (AWGN). This kind of noise normally appears for

a short period of time and is mostly produced byuniversal motors.

Single event impulse noise which is primarily caused byswitching phenomena can be modeled as impulses. It canbe overcome by applying an appropriate error correctingcode, perhaps combined with interleaving.

Non-synchronous noise which is a periodic noise pulses

occurs with a frequency other than multiples of thefundamental frequency. The major sources for this typeof noise ar e televisions and computer monitors.

classifications as follows:

IV. PLC TEST BED SETUP

A. PLC Test Bed Layout

Based on the PLC system at "last-mile'' which has beenshown in Fig. 1 , the PLC test bed is designed and

implemented. The frequency specification that it shouldoperate is from lMHz to l o w , and from lOOkHz to4OOW if under CEBus power line physical layer andmedium specification [6].

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At these signal frequency ranges, both ac test power strips,AC Power'strip A and AC Power strip B are each isolatedfrom the supplying ac power by line filter and 2301230Visolation transformer as shown in Fig. 3. However, theisolation transformers cannot effectively isolate a circuit from

noise caused by potentials between various systems andcommon power grounds [7]. Hence, line filters are added toprovide electromagnetic compatibility (EMC) so that thesystem built is functioning in a desired state in anelectromagnetic environment without either adverselyaffecting other equipments, or without being adversely

affected by the environment. Also, line filters are used toreduce the potential of communication signals conductingback into AC Pow er Strip through the PC power supplies thatwill reduce the system isolation as it has a quite large input

capacitance. Besides line filters, line trap is also used torestrict carrier transmission over the power line to a givenline section and prevents the carrier frequency from 'spilling'over to the adjacent sections of the power lines. It offerssufficient impedance to block the high frequency signal from

the transmission end to the receiving end through the

isolation transformer [8]. Thus, it further improves the signalisolation between the two AC Power Strips and the carrierfrequencies will propagate down the power line in a directionthat is desired and controllable.

SUPPAC P

Fig. 3. Simplifiedhigh-speedPLC est bed layout

The PLC channel simulator can be best represented byvariable attenuators and notch filters, and its design is relatedto the attenuation spectral which to be m odeled. The variableattenuator, which provides the coupling of thecommunication test signals between the two ac test powerstrips, acts as the PLC channel's attenuation. The attenuatorprovides attenuation ranges from OdB to 8OdB [9] ofcommunication signals between the power strips. The notchfilters are used to provide some attenuation with an additional

notch at a specific frequency which is commonly found atpower line spectral (see Fig. 2). Both of the variable

attenuators and notch filters a re designed to match 5051 load.

Th e 50Q resistive load on each power strip allows the line

impedance be seen as 2551 by the Device Under Test (DUT ),

and acts with attenuator or other impairment devices to setthe impedance of the test po wer line. The impairment devices

are represented by three lOOW light dimmer circuitsconnected in parallel.

Referring to [2,10], the primary source of noise on theresidential power line is electrical appliances connected to thetransformer secondary, and the noise produced by triacs in

light dimmers is one of the greatest yet at low power withlong duration. Th us, the triac dimm er module is designed tosimulate the use of multiple triac dimmer devices on the

power line that will generate noise with frequenciessynchronous to power frequency 50Hz.For the worst-casetransient noise, the dimmer module consists of three simpletriac dimmers without filter circuits. Each triac controls thepower to a lOOW light bulb. The setting of the firing angle

shall be at l00p.s before the 90" point of the 50Hzwaveform

for one of the dimmers, the second dimmer is fired at 90"

point and the third dimmer at lOOp after the 90"point. Thissetup will provide a large transient impulse noise at everyhalf cycle of power frequency. A dimmer schematic is shown

in Fig. 4.

AC

Light Bulb5k ohms

loow 250k

Ohms

04008L4

HT32 1 0 . 1 U F

250V

N EU T R A L

DIMMER

Notes:1. The Impairment Device is made of three l OOW

2. For the worst-case transient noise in the power line,

Dimmers in parallel.

three Dimmers without filter circuits are used.

Fig. 4. Triac dimmer circuit with lOOW oad

Each transceiver is designed to m atch a 5 09 load. The testtransmitters, impairment devices and DUTs are connected tothe power strips depending on the appropriate tests to be

performed for the PLC study. As shown in Fig. 3, the testtransmitter is typically the PC connected to AC Power StripA, while the test receiver is of DUT node connected to ACPower Strip B. T he impairment devices are connected to ACPower Strip B so that the receiver performance of the DUT atvarying signal levels can be measured. In other words, the

performance of the communication module (TransmitterNode and ReceiverDUT Node) or so-called as transceiver

can be studied and tested.

B. Coupling Method and Circuit

A passive coupling circuit, based on differential modecoupling involving the live wire as one terminal and theneutral line as the second terminal, is used to couplecommunication signal onto and from the power lines. The

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way of connecting the power lines to the coupling circuit is

based on capacitive coupling which consists of two maincomponents, i.e. a capacitor and a coupling transformer. Asimplified coupling circuit equipped with some protection

devices is shown in Fig. 5.

AC LINESIGNAL

ZENER

POWER LINE COUPLING CIRCUIT

Fig. 5 . A simplified power line coupling circuitwith protection devices

The capacitor is responsible for actual coupling of the

communication signals [3] as it offers a low impedance pathfor high frequency signals and blocks the 50Hz power

frequency voltage from appearing across the winding of thecoupling transformer; while the coupling transformer offersisolation of the test equipment common ground from the

neutral of the power lines. In order to prevent any of the highfrequency power 'line surges dam aging any test equipmentconnected to the signal idout point of the coupling circuit

(see Fig. 3, rotection devices must be added [111. A MetalOxide Varistor (MOV) across the live and neutral lines

provides protection against very large transients on the powerlines, and zener diodes are used to clamp any voltagetransients at the small voltage side where the test equipmentare connected. A resistor connected in parallel with thecoupling capacitor is used to discha rge the capacitor when thecoupling circuit is disconnected from the power lines, thus

minimizing high voltage shock due to large charges stored init.

V. PL C TRANSCEIVERS

A. General Description

Fig. 6. Simplified PLC transceiver layout

The PLC transceivers at both the Transmission (Tx) Node

and Device Under Test (DUT) ode of the PLC test bed,

which will couple the communication signal onto and fromthe power line, i.e. at the front-end of a pow er line modem.The transceiver structure at each end of a PLC system is

identical and is shown in Fig. 6. The transmitter portionconsists of a digital shaping filter, a digital-to-analogconverter (DAC) and a n anti-aliasing filter, while the receiver

portion consists of an analog band-pass filter and an analog-

to-digital converter (AD C).

From Fig. 6, an echo canceller that consists of subtractorand echo estimator is integrated between the transmitter andreceiver portions. Why has it be integrated here? In a PLC

system, inevitably echo may be generated due to thereflection of communication signal as a result of impedancemismatching. As the far echo of the local transmitted signal is

very much attenuated over the power lines and the receivingportion is someh ow conn ected to the transmitting portion, thenear echo of the local transmitted signal is more significantthan the far echo. Therefore, the echo canceller is important

for separating the echo of the transmitted signal r(n) from th ereceived signal s(n) so that the signal that feeds into the

demodulator is th e signal from remote that received from the

power lines x(n).

B. Echo Canceller and Algorithms

The echo canceller [121 is typically an adaptive transversalfilter with application of digital signal processing (DSP)

using Least Mean Sq uare (LMS) algorithm. This algorithm isselected because it does not require any stationary input dataor knowledge of t he ensemb le statistics as the communication

data and PLC characteristics keep changing, and it is easy tobe implemented. When this algorithm is used, the

convergence rate or performance of the adaptive filter topredict the echo o f the transmitted signal will be the greatestconsideration, which depends on two major parameters, i.e.

step size or loop gain $ and input signal power.

The echo estimator is updated with its weight or coefficientparameter wk varied, and th e faster the parameter wk is tunedto its optimum, the faster the echo is estimated. If thisparameter is varied to o rapidly, a significant distortion will beintroduced to the signal received from the power line. Thisdistortion can cause so much feedback that an adaptive filter

can become unstable. It is therefore necessary to reach acompromise between the update rate and the distortionintroduced to the signal.

In the power line network, we expect to deal with signalswith significant power level variation du e to the variation of

the power line characteristics with time and frequency. Thus,an adaptive step size which adapts to the power of the inputsignal seems to be a requirement. Hence, several types ofLMS algorithms have been studied by simulation for theirsuitability and performance. The studied algorithms are as

follows:

Normalized LM S (NLMS)

0 Leaky Normalized LMS (LNLMS)

Unnonnalized LMS or Stochastic Gradient (SG)

From the simulation, it is observed that both SG and

NLMS algorithms have their disadvantages and poor

suitability for PLC system as described in the Table 1. Thus,their principles and implementation will not be discussedhere.

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Stochastic Gradient

(SG)Convergence or adaptation

rate for the e cho estimationis very slow

Echo of the transmittedsignal is able to becancelled off when theweights are at optimumPoor stability I Better stability

I weights are at optimum

Normalized LMS

W M S )Convergence or adaptation

rate for the echo estimationis faster than SG

Significant residual of theecho of transmitted signalstill exist even when the

For the case of LNL MS, the estimated ec ho signal will bedetermined by the following equations:

N-1

k =O

e (n )= s(n)- - e s t ( n )

where

wk (n) :weight factor for each FIR (k)parameter at time (n)z (n) : ocal transmitted (or reference) signal at time (n)r-est (n) : estimated echo of local transmitted signal at time

(n)

s(n) : eceived echo signal at time ( n)e(n) : echo-cancelled received signal at time (n)N : ap length for estimator

If the update for this echo estimator is based on the LMSalgorithm:

the U constant can be made relatively small to generate an

echo canceller that produces a low level of distortion. Theupdate rate of this filter is proportional to both the reference

input (transmit) signal level and th e ech o signal level, and thefilter tends to converge faster for high reference input signallevels. This rapid convergence can be counteracted bynormalizing the update rate to the level of this input signal.The echo is proportional to the reference input signal so thenormalization can be referred to the reference input signalz(n)*. It is important that one shall not place too much

emphasis on individual samples because when there are nearzero crossings, the error can be large compared to the signallevel, and the signal from the s(n) input is delayed by theecho. To avoid these problems, the estimator update uses the

mean input signal level of the z(n) variable rather than theinstantaneous signal level. Thus, with the normalizationconstant [131:

This equation shows the actual constant used to set the

convergence stability compromise. In order to furtherstabilize the filter d uring arrival of any tones and to preventany overflows, a leakage factor (Um) is introduced into theupdate and the final equation w ill be:

C. Results andDiscussions

The functionality of echo canceller, with the emphasis o nthe transversal filter adaptation, was tested and verified on

TI’S MS32OC67x DS P EVM platform. Since this platform

at meanwhile does not have the capability to connect to thePLC test bed, verifications were performed using softwaresignal generation capabilities. For studying the convergenceof the adaptive algorithm LNLMS, test signals from twosignal generation routines, representing a reference signalz(n, and the corresponding echo signal r(n), were streamedonto a DSP. After DSP, the results were streamed out to a

graphic display. Obviously, this approach is not meant tosatisfy real-time constraints. Th e results of LN LMS algorithmwith parameter N=32 and adaptive convergence factor are

shown in Fig. 7 and Fig. 8.

Fig.7 Error e(n ) and reference input z(n) signalof echo canceller

Fig. 8 Echo cancelleroutput e(n) and the received s(n) signalsin magnitude spectrals used, the weight upd ate will be:

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From the simulation results, it can be seen that the LNLM Ss e e m to lead a relatively faster convergence compares to SGand NLMS. Also, putting a leakage in the adaptation tends to

force the coefficients towards origin, thus keeping them

smaller which will minimize the probability of coefficient

fluctuating out of the allowed region towards the leastsensitivity. Although the LNLMS produces a smallermagnitude compared to the other two algorithms, it can be

overcome by implementing an amplification stage in theDSP. The convergence rate increases with increasing step

size. Note that if the convergence factor becomes too large,the filter might become unstable.

VI. CONCLUSIONS

A test bed for high-speed PLC system has been developedand implemented. It is a platform which simulates the power

line environment with the worst case transient that can be

generated by using impairment devices such as light dimmercircuits. Thus, it offers a controllable and repeatable powerline characteristics environment to the PL C developers so that

their designed PLC system can be tested and developed to areliable system. Th e PLC transceivers has been designed w ith

matching impedance of 50sZ and with capability to drive thepower lines at other impedance as well. Currently, the PLC

transceiver system with the integration of the e cho cancelleris under design and construction. The echo canceller will be

implemented with the application of LNLMS algorithmbecause of its stability and ability to provide a fastconvergence or adaptation rate to estimate the echo of thelocal transmitted signal.

VII. ACKNOWLEDGEMENT

The authors gratefully acknowledge the financial supportprovided by Nanyang T echnological University, Singapore.

VIII. REFERENCES

[l] R.M. Vines, H.J. Tru ssell, K.S. Shu ey, and J.B. O’Neal, “Impedanceof residential powerdisuibution circuit,” IEEE Transactions onElectromagnetic Comp atibility, vol. EMC-27, no. 1. February 1985,pp. 6-12.

J.R. Nicholson, and J.A. Malack, “RF impedance of power lines andline impedance stabilization networks in conducted interferencesmeasurement,’. IEEE Transactions on Electromagnetic Compatibility,vol. EMC-15, no. 2, May 1973, pp. 84-86.

HC Fereira, HM Grove, 0 Hooijen, and AJ Han Vinck. “Power linecommunications: an overview,” IEEE Transactions, 1996, pp. 558-563.

Intellon High Speed P ower L ine Comm unications, IntellonApplication Notes, Rev. 2, July 1999.Klaus M. Dostert, “Power lines as high speed data transmissionchannels -modelling the physical limits,” IEEE, 1998 , pp. 585-589.EIA-600.31 - PL Physical Layer & Medium Specification, ElectronicIndustries Association, Rev. 2-5-95.Bruce C. Gabrielson, and Mark 1. Reimold, “Suppression of powerline noise with isolation transformers,” EMC EX P087 , May 1987.An American National Standard IEEE Guide for Power L ine CarrierApplications, ANSVIEEE Standard 643-1 980. January 1981.Torsten Waldeck, Michael Busser, and Klaus Dostert,“Telecommunication applications over the low voltage powerdistribution grid,” IEEE Transactions, 1998, pp. 73-77.Gerhard P Hancke, and Deon Very, “Etectrical load monitoring andcontrol in the domestic environment,” IMTC, H a m “ , May 1994.Surge Protection Techniques for Power Line Communications,Intellon Application Notes, Rev. 2, January 1 999.Michael L. Honig, and David G . Messerschmitt, “Adaptive filters -structures, algorithms and applications,” Kluwer Academ ic Publishers,

1985.Implementation of Echo Control for ITU G.165D ECT onTMS320C62xx Processors, Texas Instruments Application Report,August 1999.

IX. BIOGRAPHIES

Lim maduated from Nanyang Polytechnic (French-SingamreInstitute), Siigapore in 1994 and- jok ed ST Microelectronics Kv at eLimited, Singapore, as an Assistant Engineer. He left this company in 1996to further his studies and received his B.Eng. degree with Erst ClassHounours in Electrical and Electronic Engineering from NanyangTechnological University, Singapore in 19 99. He is now pursu ing a M.Eng.degree. His esearch interest is power line communications.

PA. o joined China Light & Power Company Limited, Hong Kong, as aGeneral Assistant Engineer in 19 80 and later as Second Engineer working in?he field of power system protection. He left this company in 1991 to furtherhis studies in the U.K. He received his B.Eng. degree with First Class

Honours in Electrical Engineering from he University of Warwick in 1993 ,an d his Ph.D. degree in Electrical Power Systems from Imperial College,University of London in 1997. He is currently an Assistant Professor in theSchool of Electrical and Electronic Engineering, Nanyang TechnologicalUniversity, Singapore. His main research interests are power systemdynamics, stability, control, FACTS and power line communications in LVdistribution network.

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IEEE Development of a Test Bed for High Speed PLC

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