POWER MOSFETS REVERSE CONDUCTION REVISITED

A. Fmrrmir8 urd M. I. C18trO Sima8

SMEEP - DEEC - INSTITUTO SUPERIOR TPCNICO 1 CENTRO DE ELECTR6NICA APLICADA DA UNIVERSIDADE TOCNICA DE LISBOA - I N I C

1096 LISBOA CODEX, PORTUGAL PHONE: 351-1-800637/805064 FAX: 351-1-8472001

Abstract

In t h i s pape r a c o n t r i b u t i o n t o t h e c h a r a c t e r i z a t i o n of power MOS t r a n s i s t o r under op t imized s w i t c h i n g behav iour i s p r e s e n t e d , aimed a t t h e new h igh frequency power process- i ng topo log ie s . Reverse conduction through t h e channel r e s i s t a n c e i s imposed, avo id ing t h e problem of i n t e g r a l diode recovery t ime without u s ing e x t e r n a l d iodes .

Con t ro l c i r c u i t des ign i s d i s c u s s e d . Performance and drawbacks are d e f i n e d and tested i n a series re sonan t conve r t e r .

The eve r i nc reas ing switching frequency r e q u i r e d by new power p r o c e s s i n g t o p o l o g i e s c a l l s f o r an op t imized swi t ch ing behaviour of power dev ices .

N e w p o w e r devices a r e being designed t o achieve both h igh p o w e r handl ing and opt imized switching, w i th in s a f e ope ra t ing a r e a and with reduced power l o s s e s [11-[41.

Also new achievements i n Smart Power a r e expec ted t o e n a b l e t h e e a s y merging of power d e v i c e s w i t h h p h i s t i c a t e d c o n t r o l and p r o t e c t i o n circuitry. This permits t o opt imize power d e v i c e s performance acco rd ing t o t h e stresses imposed by t h e power c i r c u i t i n which they a r e embedded [SI.

Other approaches must cons ide r r eve r se c u r r e n t f low requirements of s p e c i f i c topolo- g i e s . In t h e p a s t , t h e s e requirements have ap- p l i e d t o t h e body d i o d e conduct ion. However, f o r high f r equenc ie s i n b r idge conf igu ra t ions , t h i s parasitic e f f e c t i s no longer use fu l s i n c e i t s l a r g e recovery t i m e p r e s e n t s a r i s k of de- s t r u c t i v e l a t c h u p of MOSFETs [61. Fig . l shows two p o s s i b l e s o l u t i o n s t o overcome t h i s r i s k s : a two MOSFET b i d i r e c t i o n a l conf igu ra t ion ( f i g . l a ) ) and a MOSFET w i t h two e x t e r n a l d i o d e s ( f i g . l b ) ) , t h e design of which i s aimed a t t h e disablement of t h e conduct ion through t h e in - t r i n s i c d iode while a s s u r i n g r e v e r s e conduc- t i o n . This can only be achieved a t t h e expense of i nc reased forward conduction drop. These ap- proaches a r e widely used f o r h igh frequency conf igu ra t ions u t i l i z e d e i t h e r i n convent ional PWM or r e sonan t c o n v e r t e r s .

Half and f u l l b r idge conf igu ra t ions a r e those which more e a s i l y o r i g i n a t e power devices f a i l u r e cond i t ions under apparent ly low stress. In f a c t , i n s p i t e of MOSFETs high ruggedness t o dv/dt related f a i l u r e s , t h e y become q u i t s f rag- i l e when t h e i r i n t r i n s i c d iode conducts. Since t h i s parasitic is a minori ty carrier device, it p r e s e n t s a behav iour which i s dependent on s t o r e d charge and t h u s it h a s forward and re- v e r s e recovery t i m e s . During r e v e r s e recovery t i m e , t h e f a s t removal of charge may i n c r e a s e t h e base-emitter vo l t age of t h e p a r a s i t i c bipo- l a r t r a n s i s t o r t h u 8 provoking l a t c h u p of t h e s t r u c t u r e . Furthermore, t h e f a s t removal of cha rge i n c r e a s e s c r i t i c a l c u r r e n t d e n s i t i e s enab l ing a s h o r t c i r c u i t t o t h e power supply th rough t h e o p p o s i t e l e g t r a n s i s t o r d u r i n g turn-on.

The turn-on o f t h e t r a n s i s t o r i n t h e opposi te l e g a l s o r e i n f o r c e s t h e s e f a i l u r e con- d i t i o n s due t o t h e r e v e r s e h igh v o l t a g e reap- p l i e d t o t h e body d iode d u r i n g r e v e r s e recov- e ry .

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a ) b)

Fig. 1 Power swi t ch ing s t r u c t u r e s f o r b r idge c o n f i g u r a t i o n s : a ) two power MOSFET b i d i r e c - t i o n a l s t r u c t u r e , b) one power MOSFET and two

e x t e r n a l d iodes

Recent experiments u s ing r eve r se opera- t i o n of power MOSFETs through t h e channel, t h a t attempt t o inc rease system e f f i c i e n c y while de- c r e a s i n g , volume, weight and c o s t , have been r e p o r t e d [7], [ 8 ] .

The opt imized u s e of power MOSFET's i n t h i s r eve r se conduction s t a t e r e q u i r e s an accu- r a t e c h a r a c t e r i z a t i o n of t h e i r s t a t i c and dy- namic r e v e r s e behaviour .

Th i s pape r a d d r e s s e s t h e problem of power MOS t r a n s i s t o r r e v e r s e o p e r a t i o n us ing channel r e s i s t a n c e modulat ion, and a l s o d i s - cusses r e l a t e d c o n t r o l requirements .

In o r d e r t o show t h e a p p l i c a b i l i t y of MOSFET r e v e r s e conduct ion through t h e channel w e have chosen a b r i d g e c o n f i g u r a t i o n as tes t c a s e due t o i t s e x i g e n t r equ i r emen t s on t h e s w i t c h i n g c a p a b i l i t i e s of t h e d e v i c e s . Ex- per imental r e s u l t s , ob ta ined on a series res- onant c o n v e r t e r p r o t o t y p e , u s i n g e i t h e r t h e channel r e s i s t a n c e o r t h e s t r u c t u r e s shown i n f i g . 1, a s a l t e r n a t i v e r e v e r s e p a t h s , w i l l be compared.

t o r Ce-s

The p h y s i c a l s t r u c t u r e o f a power MOSFET c e l l and i t s e q u i v a l e n t c i r c u i t are shown i n f i g . 2.

Both swi t ch ing behaviour a t h igh f r e - quency and r eve r se conduction c o n t r o l l e d by t h e load a r e deeply a f f e c t e d by t h e p a r a s i t i c ele-

i n f i q . 2, which were a l r e a d y in - ments shown troduced i n e v e r , t h e i r our p re sen t (vDS<o) -

O-7803-oO90~/91/07oO-O4 16$01 .oO 0199 IIEEE

1 1 1 - n I I I I I

a p rec ious c o n t r i b u t i o n [9] .-How- r e v i s i o n becomes necessa ry due t o concern i n r e v e r s e b i a s cond i t ions

I t I I I

a- rplanh

n* dnin I I

S - B

b)

Fig.2 Cross s e c t i o n of a VDMOS t r a n s i s t o r cell (a) and i t s e q u i v a l e n t c i r c u i t (b)

The g a t e - s o u r c e , g a t e - e p i d r a i n and ga te - subs t r a t e ove r l ap capaci tances represented by cons t an t v a l u e s CGSO, CGDO and CGBO, respec- t i v e l y , are independent from b i a s c o n d i t i o n s s i n c e t h e y a r e e l e c t r o s t a t i c a l l y de f ined . The capac i t ance i n h e r e n t t o t h e pn- junc t ion , sub- s t r a t e bulk-epidrain, r ep resen ted by Cdsl , i s a h igh ly non-l inear f u n c t i o n of t h e s u b s t r a t e bu lk -ep id ra in v o l t a g e VBE. I n t h e e q u i v a l e n t c i r c u i t of f i g . 2 b ) , t h e behav iour of t h i s j u n c t i o n i s modeled by a pn d i o d e c l a s s i c a l model: a non- l inea r c a p a c i t i v e e f f e c t C d s i n p a r a l l e l with a non-linear r e s i s t a n c e F&. When t h i s j unc t ion i s forward o r quasi-forward bi- ased, a s it happens f o r VDS<O, t h e e f f e c t of t h i s capac i t ance can be neg lec t ed .

The c a p a c i t a n c e s C d e p i and Cd a r e a s s o c i a t e d w i t h induced d e p l e t i o n r e g i o n s , which a r e formed between t h e s i l i c o n s u r f a c e and t h e b u l k . These r e g i o n s may be assumed i d e n t i c a l t o t h a t which i s formed i n a one- s ided pn junc t ion and a r e modeled accordingly. It must be stressed t h a t , under r e v e r s e b i a s ( v ~ s < O ) , t h e c a p a c i t a n c e Cdapi becomes ve ry h i g h and may b e n e g l e c t e d i n i t s series a s s o c i a t i o n with %DO. This a s s o c i a t i o n a c t s a s a MOS capac i t ance (ga t e -ep id ra in ) [9].

The c h a r a c t e r i z a t i o n of t h e remaining elements i n t h e model i s s i m i l a r t o t h a t a l - ready desc r ibed f o r forward b i a s ope ra t ion .

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lWe assign upper use rubraipu to u p . C i m w associated with the MOS MIctule, which ue elccrroruciully dcfincd, urd lower u 8 c rubscripu Io up.ci-8 UraiUcd with h e dcpldon regions of pn juntions or induced by gate voh.ger, bawecn silicon surface and bulk.

However, some comments about t h e cur- r e n t source i D are on o r d e r . For r e v e r s e b i a s , two d i f f e r e n t r e g i o n s o f o p e r a t i o n may occur , acco rd ing t o t h e v a l u e of t h e a p p l i e d v o l t a g e VGS :

Channel OFF r eg ion

For VGS+VSA<~T and VGS-T, no channel is formed and i D = O . Thus, CGD-CGS-O, and t h e sub- s t r a t e r eg ion under t h e g a t e e i t h e r i s unde- p l e t e d o r it h a s a narrow d e p l e t i o n r eg ion , which means t h a t cd i s h igh and CGBO i s domi- nan t i n t h e series. S i n c e under r e v e r s e bias VGE>VTEPI*, an accumulat ion l a y e r e x i s t s under t h e oxide and CGDO dominates over cdepi.

When t h e s u b s t r a t e bu lk -ep id ra in v o l t - age VEB i s h igh enough t o fo rward bias t h i s j u n c t i o n , i t s c u r r e n t becomes impor t an t and equa l s t h e d r a i n c u r r e n t which i s dependent on t h e r e s i s t i v e e f f e c t s F& and RD.

Reverse Triode Region

For VGS+VSA>VT, an i n v e r s i o n r eg ion i s formed a t t h e s u b s t r a t e s u r f a c e - t h e t r a n s i s - t o r channel - which i s a low r e s i s t i v i t y pa th f o r c u r r e n t f low no matter i t s d i r e c t i o n .

The channel c o n d u c t i v i t y i s a func t ion of t h e vo l t ages app l i ed t o i t s t e rmina l s and t o t h e g a t e , and w e may w r i t e :

where v l~~=vGA-VT, i s t h e gate-access region e f - f e c t i v e vo l t age , Bo i s a c o n s t a n t , func t ion of t h e MOS p h y s i c a l and g e o m e t r i c a l s t r u c t u r e (Do-~o.Cox.W/L) , and e and VLO are t h e carrier m o b i l i t y r e d u c t i o n c o e f f i c i e n t s , due t o t h e t r a n s v e r s e and l o n g i t u d i n a l e l e c t r i c f i e l d s , r e s p e c t i v e l y . For high va lues of VSA, t h e sub- s t r a t e bu lk -ep id ra in j u n c t i o n may become f o r - ward b i a s e d even b e f o r e t h e s a t u r a t i o n of t h e charge c a r r i e r s d r i f t v e l o c i t y occur s a t t h e source end. In t h e s e cond i t ions , t h e body diode c u r r e n t becomes an impor t an t f r a c t i o n of t h e d r a i n c u r r e n t .

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There a r e w e l l known and widely used t o p o l o g i e s which u t i l i z e r e v e r s e conduct ion through t h e i n t r i n s i c diode. However, t h i s re- v e r s e conduc t ion depends on t h e s u b s t r a t e - e p i d r a i n j u n c t i o n forward b i a s . An impor t an t drawback of t h i s t e c h n i q u e d e r i v e s from t h e l a r g e recovery t i m e of t h e diode. Although many a t t empt s have been made t o reduce t h i s t i m e by means of e l e c t r o n i r r a d i a t i o n [lo], t h e r e i s always a compromise wi th r e s p e c t t o RDSON mini- mizat ion, because t h i s t echn ique dec reases mi- n o r i t y c a r r i e r l i f e t i m e which i n t u r n inc reases s i l i c o n r e s i s t i v i t y .

O the r s o l u t i o n s , e i t h e r t h a n techno- l o g i c a l , a r e b e i n g used t o overcome des t ruc - t i v e l a t c h u p problems when e n a b l i n g t h e body diode conduction i n br idge conf igu ra t ions , such a s power MOSFET i n b i d i r e c t i o n a l s t r u c t u r e s ( f i g . l a ) o r u s i n g an e x t e r n a l f ree-wheel ing d iode and a d iode i n series wi th t h e MOSFET [ 6 ] , t o prevent c u r r e n t f low th rough t h e body d iode ( f i g . l b ) . For some a p p l i c a t i o n s , when us ing a free-wheeling Schottky diode, t h e r e i s no need f o r t h e series diode, s i n c e t h e f r e e - wheeling d iode s h o r t - c i r c u i t s t h e body d iode which t h e r e f o r e remains d i s a b l e d .

2 V ~ n - Epidrain invasion threshold voltage.

417

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-.-. _ _ . . - - . - - .. . - ~

VDS (10V/div) 'i, - i -

+.-&4.-. J,--.FI.V"1 - . i~(0.5V/div)

...-"--=- -_c- -----f-.*x*&--A'

With t h e s e techniques , a reduct ion of t h e OFF switching l o s s e s by a f ac to r of two may be achieved [ll]. On t h e o the r hand, conduction losses and device count a r e increased .

Another a l t e r n a t i v e pa th t o r e v e r s e conduct ion r e s i d e s a t t h e MOSFET i n t e r n a l s t r u c t u r e , and i s provided by channel resis- t ance modulation through proper d r i v e condi- t i o n s . This so lu t ion doesn ' t r equ i r e any e x t r a p o w e r device t o implement switching ope ra t ion .

In f a c t , it i s poss ib l e t o enforce re- verse conduction through t h e reverse t r i o d e re- gion applying a gate-source vol tage higher than VT. In t h i s c i rcuns tances , VGA'VGS+VSA i s higher than VT, and t h e channel i s formed a t t h e sub- strate region under t h e oxide. While t h e resis- t i v i t y of t h i s c u r r e n t pa th i s lower than t h e body d iode r e s i s t i v i t y , and t h i s happens f o r t h e most app l i ca t ions and most common p o w e r MOS t r a n s i s t o r s [12], r eve r se conduction w i l l be assured by t h e t r a n s i s t o r channel.

Fig. 3 shows t h e dra in-source vo l t age f o r a power MOS t r a n s i s t o r under reverse bias, when a .gate-source v o l t a g e h ighe r t h a o t h e t h r e s h o l d vo l t age VT, i s fo rced by cons t an t c u r r e n t d r i v e a t g a t e and d r a i n t e r m i n a l s . Thus, t h e body d iode i s shor t - c i r cu i t ed by t h e channel (vBE<vDdsoN) . These waveforms a l s o per- m i t t o conclude t h a t d r i v i n g i n t o conduction power MOS t r a n s i s t o r s under r e v e r s e d ra in - source b i a s r e q u i r e s a h igher dynamic cu r ren t l e v e l than under forward b i a s ope ra t ion . This i s i n accordance with t h e t h e o r e t i c a l ana lys i s of t h e e q u i v a l e n t c i r c u i t p r e s e n t e d above, which shows t h e importance of t h e e l e c t r o s t a t i c ga te -ep idra in capac i tance , CGDO, over t h e de- p l e t i o n capac i t ance of t h e e p i d r a i n , C d e p i , when an accumulation l aye r e x i s t s under t h e ox- i d e due t o a nega t ive drain-source vol tage .

SINGLE BIDIRECTIONAL MOSFET AND MOSFET MOSFET DIODES

t R I 1 9 O L S 6 9 0 ~ s 2 3 0 ~ s

, t f I 160bs 6 2 0 ~ s 22OFS

Fig. 3 MOSFET Gate-Source and Source-Drain vo l t ages v ~ s (t) and VSD (t) , under cons tan t

g a t e and source cu r ren t s , i n r eve r se conduction.

As a matter of f a c t , appl ica t ions which r equ i r e r eve r se conduction through a f a s t re- covery pa th normally have a l r eady presented a forward conduction through t h e same device, t h e capacitances are then charged near ly t o t h e f i - na l va lue of t h e r eve r se s teady s t a t e vo l tage .

MOSFETs swi tch ing behaviour has addi- t i o n a l l y been tested i n t h r e e d i f f e r e n t con- f igura t ions a t t h e same cons tan t ga t e and d ra in cur ren t d r iv ing condi t ions , i n o rde r t o evalu- a t e turn-on and turn-of f t i m e s s t r e s s i n g ca- p a c i t i v e e f f ec t s3 . These conf igu ra t ions were:

3lt should be d. hat IIIC purpoter of such a low spccd drive is to compare dynmic "mu driie rquiranenls of the thrce switch configurations under test.

Table I

W e can conclude t h a t t h e b i d i r e c t i o n a l MOSFET swi tch ing s t r u c t u r e r e q u i r e s a h ighe r dynamic cu r ren t t han t h e o t h e r two configura- t i o n s t o achieve t h e same switching t i m e s , be- cause capac i tances are h igher . Switching t i m e s a r e t h e lowest f o r t h e s i n g l e MOSFET configura- t i o n .

418

1 i r n I T

Reverse conduction through t h e channel F ig . 7 d e p i c t s t h e r e sponse o f t h e r e s i s t ance can be optimized i f gate-source and p o w e r c i r c u i t under t h e above condi t ions . d ra in -ga te v o l t a g e s are ma in ta ined a lmos t equal. The dra in-source vo l t age must be kept low and t h e opera t ing poin t must be kept wi th in t h e reg ion s i g n a l e d wi th dots i n t h e output c h a r a c t e r i s t i c s ( f i g . 5 ) t o avo id i n t r i n s i c d iode conduct '

5

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es C o n v e r t e r - w s

Fig . 5 Output c h a r a c t e r i s t i c s cons ider ing r eve r se conduction.

In order t o test t h e performance of re- verse conduction through t h e channel, t h e most demanding exper imenta l c o n d i t i o n s have been considered: a series resonant conver te r which uses a h a l f b r idge topology.

S e r i e s resonant conver te rs t h a t switch a t f requencies which a r e h ighe r t han resonant frequency do no t r e q u i r e f a s t recovery f r ee - wheeling d iodes s ince r eve r se conduction turn- o f f occurs f o r ze ro c u r r e n t va lues . Problems emerge f o r swi tch ing f r equenc ie s lower than resonant frequency.

Fig. 6 shows t h e series resonant c i r - c u i t used t o tes t t h e performance of fou r d i f -

F ig . 7 Responses of t h e series resonant conver t er

F ig . 0 shows experimental diagrams of gate-source and dra in-source vo l t ages , vGs (t) 1 - a p o w e r MOSFET with body diode con- and VDs(t) , and d r a i n c u r r e n t i D ( t ) , f o r t h e duc t ion

2 -a power MOSFET wi th two e x t e r n a l diodes aforementioned implementations.

3 -a b i d i r e c t i o n a l two power MOSFET The comparison between e f f i c i e n c y val- s t r u c t u r e ues ca lcu la ted from experimental r e s u l t s , shows

4 - a power MOSFET us ing channel re- b e t t e r r e s u l t s u s i n g c h a n n e l r e v e r s e ve r se conduction, conduct ion . Body d i o d e performance i s t h e

worst , aheaded by free-wheeling d iode imple- menta t ion and t h e two MOSFET b i d i r e c t i o n a l s t ruc tu res . These performances are confirmed by t h e zoom of drain-source vo l t age VDS and d ra in

f e r e n t switch Si and S; implementations,

The fo l lowing tes t cond i t ions were imposed: i npu t vo l t age vs-20V and swi tch ing frequency fs-47KHz.

cur ren t i o shown i n f i g . 9, f o r - the - fou r switch implementations under test . In t h i s f i gu re , t h e o p p o s i t e l e g d e v i c e s o v e r l a p c u r r e n t s and reverse conduction drop are a l s o c l e a r l y seen. Higher dra in-source vo l t age va lues w e r e found f o r h igher c u r r e n t l e v e l s . However, power MOS t r a n s i s t o r s are expected t o be a v a i l a b l e , f o r each a p p l i c a t i o n , i n o r d e r t o p rov ide l o w enouah conduction l o s s e s throuah t h e channel t hus -d i sab l ing body d iode conduction.

To s tudy t h e op t imiza t ion of t h e con- t r o l o f bo th switches, a s p e c i a l d r i v e w a s de- signed i n o rde r t o provide t h e same TI turn-on and T2 tu rn-of f t i m e s and vice-versa, and si- mul t aneous ly p r o v i d e s c o n t r o l o v e r t h e s e switching t i m e s ( f i g .10 ) . To avoid a low resis- t i v i t y pa th f o r cu r ren t flow between t h e p o w e r supply t e rmina l s , t h e t r a n s i s t o r s were dr iven i n t o and ou t o f conduction a t cons t an t g a t e c u r r e n t s . Th i s d r i v e p r o v i d e s c o n t r o l l e d switching t i m e s and allows an almost simultane- ous change of state between MOSFETs i n opposite

Fig. 6 S e r i e s resonant conver te r c i r c u i t l e g s of t h e power conve r t e r , wi thout ove r l ap

fo= 82.35KHz L = 32.3pH 3

I, = 76.33 KHz C = 115.6 n F RL = 12.55KHz CF= 50pF

used f o r t h e test cu r ren t s or inductor cu r ren t d i s c o n t i n u i t i e s .

419

d)

Fig . 0 Experimental r e s u l t s wi th f o u r d i f f e r e n t swi tch implementations: a ) one power MOSFET wi th body diode conduction b)one power MOSFET wi th t w o e x t e r n a l diodes c) two power MOSFET b i d i r e c t i o n a l s t r u c t u r e d )one power

MOSFET w i t h channel r eve r se conduction

420

Fig . 9 Zoom of drain-source vo l t age diagram: a ) o n e power MOSFET wi th body diode conduction b)one power MOSFET wi th t w o e x t e r n a l diodes c) two power MOSFET b i d i r e c t i o n a l s t r u c t u r e

d)one power MOSFET wi th channel r eve r se conduction

....

I i r r

1

A

1 - I I

.V. -*.

A

Fig. 10 Drive circuit for optimized performance

For comparison purposes, fig. 11 shows drain-source voltage, drain current and oppo- site leg snubber current for non optimized drive conditions (is (lA/div) ) .

Fig. 11 Series resonant converter experimental results using a non optimized channel reverse

conduction

Fig. 12 shows the optimized performance of reverse conduction through the MOSFET chan- nel, in the considered series resonant con- verter. In order to emphasize optimized perfor- mance,one of the turn-off pulses was slightly advanced in time, thus enabling a brief conduc- tion of MOSFET T2 body diode. This technique is aimed at comparison purposes only.

At the switching edge corresponding to conduction change between T2 ( S z ) and TI (SI), an overlap current is to be found (fig. lla)), as well as current spikes in the opposite leg snubber (TI) (fig. llb), i,(POOmA/div)). On the other hand, at the opposite switching edge, fig. loa) clearly shows no significant overlap current; additionally no current is practically detected in the opposite snubber ( T p ) (fig. llc) , is (4OmA/div) ) .

Thus, since channel switching times can be controlled, an optimized design opens new possibilities for snubber discarding, while en- abling an increase in power factor.

42 1

C)

Fig. 12 Channel reverse conduction experimental performance in a series resonant converter

under semi-optimized drive

The reverse conduction through the power MOS transistor has been revisited with the purpose of a more complete characterization of the channel bidirectional current flow path.

The more relevant effects were analysed based on the physical structure of the MOSFET.

Experimental results using a most de- manding topology were shown for different switch implementations, for comparison pur- poses.

Experiments proved the highly perfor- mant behaviour of reverse conduction through the channel compared to other switching cells reverse paths.

I

A more efficient and with lower power device count solution, for power circuits re- quiring reverse conduction,was discussed.

Summing up, the optimized reverse con- duction in MOSFETs associated with appropriate control and drive circuitry appears as a promising direction to achieve high power den- sity.

Nevertheless a deeper insight into MOSFET reverse conduction modelling is still necessary, to provide more accurate tools for CAD aimed at power electronic converters using channel reverse conduction. Preliminary and en- couraging results were already obtained and will be the subject of a future contribution [I31 -

Acknowledaements

The authors wish to acknowledge their gratitude to Prof. M. LanCa and Prof. J. Costa Freire for their helpful comments on the manuscript.

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