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IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012 971 Noncontact Selective Laser-Assisted Placement of Thinned Semiconductor Dice Ross Miller, Val Marinov, Orven Swenson, Zhigang Chen, and Matt Semler Abstract— New laser-induced forward transfer (LIFT) techniques promise to be a disruptive technology by enabling high-volume placement of ultrathin bare dice. Limitations of current die-attach techniques such as pick-and-place are presented and discussed which inspired the development of this new placement method. The thermo-mechanical selective laser-assisted die transfer (tmSLADT) process is introduced as an application of the unique blistering behavior of a dynamic releasing layer when irradiated by low-energy-focused UV laser pulses. The potential for tmSLADT to be the next generation LIFT technique is demonstrated by the “touchless” transfer of 65-μm-thick silicon tiles between two substrates spaced 195 μm apart. Additionally, the advantages of an enclosed blister actuator mechanism over previously studied ablative and thermal releasing techniques are discussed. Finally, experimental results indicate that this nonoptimized die transfer process compares with, and may exceed, the placement precision of current assembly techniques. Index Terms— Embedded chips, flexible electronics, laser-induced forward transfer (LIFT), ultrathin semiconductor die. I. I NTRODUCTION T HE RESEARCH area of flexible electronics is a dynamic, evolving field of study and promises to enable the wide- spread use of highly anticipated low-cost wearable, confor- mal, and flexible electronic devices. Potential applications for these devices include the fields of healthcare, space missions, defense, document security, and mobile power harvesting, among others [1], [2]. The use of bare dice in flexible devices introduces a specific set of requirements, including reduced footprint, low profile, and flexibility of the silicon compatible to that of the Manuscript received September 20, 2011; revised December 31, 2011; accepted January 3, 2012. Date of publication February 10, 2012; date of current version May 29, 2012. This work was supported in part by the Defense Microelectronics Activity under Agreement H94003-09-2-0905. Recommended for publication by Associate Editor E. D. Perfecto upon evaluation of reviewers’ comments. R. Miller and M. Semler are with the Center for Nanoscale Science and Engineering, North Dakota State University, Fargo, ND 58102 USA (e-mail: [email protected]; [email protected]). V. Marinov is with the Center for Nanoscale Science and Engineering and the Department of Industrial and Manufacturing Engineering, North Dakota State University, Fargo, ND 58102 USA (e-mail: [email protected]). O. Swenson is with the Center for Nanoscale Science and Engineering and the Department of Physics, North Dakota State University, Fargo, ND 58102 USA (e-mail: [email protected]). Z. Chen is with Ashland Inc., Covington, KY 41011 USA (e-mail: zhi- [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2012.2183594 polymer substrate. These factors mandate the use of extremely thin bare dice in the next generation of RFID tags, electronic labels, bank cards, and other low-cost disposable electronic devices typically packaged on a flexible substrate [1] as well as in the traditionally tightly packaged conformal flexible circuits such as those used in, for example, portable consumer electronics. Fragile yet flexible enough, the ultrathin bare dice provide the flexibility required for these applications [3]. Additionally, thin wafers mean more slices from the ingot and smaller dice provide higher throughput from the wafer, ergo, less cost per die. The thinned dice are flip-chip bonded onto flexible substrates [4], [5] or embedded in flexible substrates [4], [6]–[8]. The embedded flexible silicon technology has been and is still being actively developed mostly in Europe, especially by the Fraunhofer group in Germany [1]. In the back-end processing sequence, the size of the bare die is mostly limited by two factors: the substrate tech- nology and die-handling techniques. For the same circuit functionality (i.e., the same number of I/Os), reducing the die size means ultra-fine pitch high-density dice with pitches of 70 μm or less for peripheral and 100 μm or less for area array pad configurations. The small pitch presents a clear challenge to the substrate technologies. Fine resolution, high-interconnect-density flexible substrates are possible by a number of technologies, but their cost may be prohibitive for low-cost, disposable electronics. Solutions involve the use of interconnect technologies designed to address the mismatch in the resolutions achievable by the front-end thin-film IC fabrication technology and those typical for the thick-film substrates, without compromising the production cost [9]. At present, there is no satisfactory technique for high- throughput handling and placement of ultrathin (<50-μm- thick) bare dice. Though capabilities exist both for placement of ultrathin dice and for placement of dice at high rates, there is a capability gap when both are required simultaneously. The placement precision of the fastest chip placement equipment is degraded as a result of the increased tool throughput [10] and is thus not suited for ultrathin die-handling or ultra-fine- pitch components. For applications pursuing high placement rates of ultrathin dice, the industry still relies on prototype equipment or adapted die bonders [6], [11]–[13] but the results are far from optimal and the equipment is unique and costly [7]. These dice are very fragile and tend to be easily damaged by a conventional direct chip attach pick-and-place equipment when used for high-volume placement [14], [15]. Additionally, for components smaller than 300 μm, stiction issues are a near certainty [16]. The small forces observed on surfaces such as 2156–3950/$31.00 © 2012 IEEE
Transcript
Page 1: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND ...dice (250 × 350 µm) using a series of very low-fluence UV laser pulses [27] as well as a single-pulse transfer of various electronic

IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012 971

Noncontact Selective Laser-AssistedPlacement of Thinned Semiconductor Dice

Ross Miller, Val Marinov, Orven Swenson, Zhigang Chen, and Matt Semler

Abstract— New laser-induced forward transfer (LIFT)techniques promise to be a disruptive technology by enablinghigh-volume placement of ultrathin bare dice. Limitationsof current die-attach techniques such as pick-and-place arepresented and discussed which inspired the development ofthis new placement method. The thermo-mechanical selectivelaser-assisted die transfer (tmSLADT) process is introduced asan application of the unique blistering behavior of a dynamicreleasing layer when irradiated by low-energy-focused UV laserpulses. The potential for tmSLADT to be the next generationLIFT technique is demonstrated by the “touchless” transferof 65-µm-thick silicon tiles between two substrates spaced195 µm apart. Additionally, the advantages of an enclosedblister actuator mechanism over previously studied ablative andthermal releasing techniques are discussed. Finally, experimentalresults indicate that this nonoptimized die transfer processcompares with, and may exceed, the placement precision ofcurrent assembly techniques.

Index Terms— Embedded chips, flexible electronics,laser-induced forward transfer (LIFT), ultrathin semiconductordie.

I. INTRODUCTION

THE RESEARCH area of flexible electronics is a dynamic,evolving field of study and promises to enable the wide-

spread use of highly anticipated low-cost wearable, confor-mal, and flexible electronic devices. Potential applications forthese devices include the fields of healthcare, space missions,defense, document security, and mobile power harvesting,among others [1], [2].

The use of bare dice in flexible devices introduces aspecific set of requirements, including reduced footprint, lowprofile, and flexibility of the silicon compatible to that of the

Manuscript received September 20, 2011; revised December 31, 2011;accepted January 3, 2012. Date of publication February 10, 2012; dateof current version May 29, 2012. This work was supported in part bythe Defense Microelectronics Activity under Agreement H94003-09-2-0905.Recommended for publication by Associate Editor E. D. Perfecto uponevaluation of reviewers’ comments.

R. Miller and M. Semler are with the Center for Nanoscale Science andEngineering, North Dakota State University, Fargo, ND 58102 USA (e-mail:[email protected]; [email protected]).

V. Marinov is with the Center for Nanoscale Science and Engineering andthe Department of Industrial and Manufacturing Engineering, North DakotaState University, Fargo, ND 58102 USA (e-mail: [email protected]).

O. Swenson is with the Center for Nanoscale Science and Engineering andthe Department of Physics, North Dakota State University, Fargo, ND 58102USA (e-mail: [email protected]).

Z. Chen is with Ashland Inc., Covington, KY 41011 USA (e-mail: [email protected]).

Color versions of one or more of the figures in this paper are availableonline at http://ieeexplore.ieee.org.

Digital Object Identifier 10.1109/TCPMT.2012.2183594

polymer substrate. These factors mandate the use of extremelythin bare dice in the next generation of RFID tags, electroniclabels, bank cards, and other low-cost disposable electronicdevices typically packaged on a flexible substrate [1] as wellas in the traditionally tightly packaged conformal flexiblecircuits such as those used in, for example, portable consumerelectronics. Fragile yet flexible enough, the ultrathin baredice provide the flexibility required for these applications [3].Additionally, thin wafers mean more slices from the ingot andsmaller dice provide higher throughput from the wafer, ergo,less cost per die. The thinned dice are flip-chip bonded ontoflexible substrates [4], [5] or embedded in flexible substrates[4], [6]–[8]. The embedded flexible silicon technology hasbeen and is still being actively developed mostly in Europe,especially by the Fraunhofer group in Germany [1].

In the back-end processing sequence, the size of the baredie is mostly limited by two factors: the substrate tech-nology and die-handling techniques. For the same circuitfunctionality (i.e., the same number of I/Os), reducing thedie size means ultra-fine pitch high-density dice with pitchesof 70 µm or less for peripheral and 100 µm or less forarea array pad configurations. The small pitch presents aclear challenge to the substrate technologies. Fine resolution,high-interconnect-density flexible substrates are possible by anumber of technologies, but their cost may be prohibitive forlow-cost, disposable electronics. Solutions involve the use ofinterconnect technologies designed to address the mismatchin the resolutions achievable by the front-end thin-film ICfabrication technology and those typical for the thick-filmsubstrates, without compromising the production cost [9].

At present, there is no satisfactory technique for high-throughput handling and placement of ultrathin (<50-µm-thick) bare dice. Though capabilities exist both for placementof ultrathin dice and for placement of dice at high rates, thereis a capability gap when both are required simultaneously. Theplacement precision of the fastest chip placement equipmentis degraded as a result of the increased tool throughput [10]and is thus not suited for ultrathin die-handling or ultra-fine-pitch components. For applications pursuing high placementrates of ultrathin dice, the industry still relies on prototypeequipment or adapted die bonders [6], [11]–[13] but the resultsare far from optimal and the equipment is unique and costly[7]. These dice are very fragile and tend to be easily damagedby a conventional direct chip attach pick-and-place equipmentwhen used for high-volume placement [14], [15]. Additionally,for components smaller than 300 µm, stiction issues are a nearcertainty [16]. The small forces observed on surfaces such as

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972 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012

van der Waals, surface tension, and electrostatic forces do notneed to be considered for large-scale components. However,when components reduce to the scale where the gravitationalforce exerted on them is comparable to the magnitude ofthese mentioned surface effects, mechanical placement beginsto fail as a high-precision, high-volume process [17], [18].The small down-force of a placement nozzle tends to eithercrack ultrathin components during pickup or placement and/orthe surface forces cause small perturbations in a component’sposition when the nozzle is near during either of those twoevents. This ultimately leads to degraded placement accuracy(this can possibly be mitigated during pickup by the useof a handling tape). This is not to say that the mechanicalplacement of ultrathin dice is not possible, but, clearly, there isa trade-off between throughput and placement accuracy whichis increasingly evident as die sizes scale down. For the ultra-thin, ultra-fine-pitch components required for flexible substratedevices, traditional mechanical assembly rates are severelylimited which presents an opportunity to reduce unit cost bydeveloping a high-throughput (>10 components/s) method.

Various methods, most of which are still in the early R&Dphase, have been suggested in the literature to overcome thislimitation [1], [3], [7], [15], [19]. This paper presents the prin-ciples of a unique laser-assisted packaging method developedat the NDSU’s center for nanoscale science and engineering(CNSE) in Fargo, ND [20], [21]. The development of thisprocess will potentially provide the means for high-volumecontactless assembly of ultrathin bare dice onto various rigidand flexible substrates. This technology can be used for flip-chip surface bonding of bumped dice or for embedding ofthinned dice in the substrate.

II. BACKGROUND—LASER-INDUCED

FORWARD TRANSFER (LIFT)

The basic concept of LIFT begins with a laser-transparentcarrier substrate which has a sacrificial layer deposited on itssurface. The components to be transferred are bonded to thesacrificial layer. Once ready for transfer, the sacrificial layeris heated or ablated by a laser pulse to generate gases thatpropel the component toward a receiving substrate placed inclose proximity.

In 1994, a team from IBM demonstrated releasing decalswith thin-film wiring patterns from a glass carrier by irra-diating the release layer through the glass carrier using apulsed laser beam [22]. The use of a laser for the transferand contactless placement of discrete components was firstreported by Holmes and Saidam [23], [24]. Recently, LIFThas been applied to the transfer of semiconductor bare dice.Karlitskaya et al. [25] have developed a simple model thatpredicts the fluence threshold for the release of 200 × 200-µmby 150-µm-thick Si tiles adhesively attached to a sacrificialPVC tape. In a subsequent study [26], the authors describedsimilar experiments for laser transfer in two distinct modes—ablative and thermal releasing—using relatively long-pulseinfrared and green lasers. In a number of publications, Piquéet al. have reported LIFT of individual InGaN LED baredice (250 × 350 µm) using a series of very low-fluence

UV laser pulses [27] as well as a single-pulse transfer ofvarious electronic components (bare dice and SMDs) withsizes ranging from 0.1 to over 6 mm2 in area [28]–[30].Recently, Sheats [31] has described a process in which,in order to release the die, the release layer is heated upto a temperature of 100–150 °C by optically irradiating itwith an intensity similar to that used in optical lithography.Although this process does not use a laser, it is very sim-ilar in nature to the thermal releasing process described byKarlitskaya et al. [26].

The ablative releasing method has been found to providehighly unpredictable component transfers and results in alocal system that behaves closely to a “confined ablation”configuration [32]–[34]. At the instant, the sacrificial layer isheated by a laser, it vaporizes. The vaporized materials areconfined between the carrier substrate and the bonded com-ponent on its surface. The rapidly expanding localized plumeof vaporized material projects the transfer component to theadjacent receiving substrate. By the nature of gas dynamics,the use of a relatively low-density gas to push a higher-densitycomponent such as a semiconductor die is highly sensitiveto initial conditions. Small variations in the heat absorptionmechanism, irregularities in the sacrificial layer thickness andhomogeneity, the presence of contamination as well as time-based variations in the profile of the laser beam used forablating the sacrificial layer all contribute to the ablativerelease process being highly unstable and unpredictable [23],[24]. Additionally, transfer velocities of components with thisapproach raise concern regarding the ability of componentsto land safely on a receiving substrate without sustainingdamage [23].

Depending on the type of component being transferred,the sacrificial layer in the ablative releasing method may beconfigured so that it absorbs or transmits the laser irradiationat the wavelength of the transferring laser. This distinctiondetermines whether absorption on the surface of the compo-nent heats the sacrificial layer to the point of vaporizationor if the absorption of the laser energy by the sacrificiallayer serves as the heating mechanism. When a semiconductorcomponent is transferred with a sacrificial layer which isnot absorbing at the laser wavelength, small configurationvariations will lead to drastically different heating conditionsbetween subsequent transfers as a result of the nonlinearabsorption of semiconductor materials at many wavelengths[25], [26]. However, this effect can be tempered by carefullyselecting the laser wavelength used [26].

The thermal release LIFT technique developed by Karlit-skaya et al. [26] is intended to address the transfer volatilityand unpredictability observed in the ablative transfer process.Under a thermal releasing configuration, the component tobe transferred is prepared in the same way as the ablativereleasing sample. However, the sacrificial layer behaves in adifferent manner. In this case, the sacrificial layer is heatedslowly with laser fluences significantly lower than thoseused in an ablative release. Like the ablative approach, inmost cases, the thermal release still relies upon the laserenergy being absorbed by the semiconductor component tobe transferred. The resulting process includes a more gradual

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MILLER et al.: NONCONTACT SELECTIVE LASER-ASSISTED PLACEMENT OF THINNED SEMICONDUCTOR DICE 973

Fig. 1. Thermo-mechanical response of DRL when irradiated with a scanninglaser beam in a spiral pattern [36].

heating of the sacrificial layer and provides for a less volatileand more predictable transfer process. The authors reportedsuccessful transfers of 300 × 300-µm by 130-µm-thick Sitiles utilizing the thermal releasing process. Reportedly, 95%of these transfers occurred within a release angle of 9°, whichcorresponds to a placement accuracy of ±35 µm assuming a195 µm transfer gap is used. Note that these release angleswere measured without the presence of a close proximityreceiving substrate. These results were achieved with a flat top,frequency doubled Nd:YAG laser which reduces the nonlinearabsorption at the semiconductor surface. Furthermore, thethermal releasing transfer velocities have been shown to besignificantly less than transfers of the ablative nature. Thiswill be required to ensure not only successful componentplacement but more critically the placement of a componentthat is functional once positioned. Though the reported thermalreleasing LIFT die release angles indicate the possibility ofvery good transfer precision, to the best knowledge of theauthors, successful laser transfer of an electronic component,such as a still functional after transfer bare die, to an exactlocation on a circuit substrate has not been reported.

Moving forward, focus should be on a particular LIFTtechnique’s precision and accuracy of placement and ability totransfer the die to the receiving substrate without degrading itsintegrity. Considering these factors, the ideal LIFT techniquewill place components:

1) smaller and thinner than pick-and-place capability;2) at a preselected, exact location and orientation;3) without exceeding their heating damage threshold;4) with energy below that which would cause damage

during either positive or negative transfer accelerations;5) with a throughput capable of high-volume manufactur-

ing (>10 components/s).

III. SLADT PROCESS

In the context of die transfer, the major problem with theexisting LIFT techniques is the accuracy and precision ofplacement. The experimental results indicate that projecting acomponent with an ablated plume of material makes it nearlyimpossible to accurately place it in the desired location. Themajor disadvantage of the ablative laser release, therefore,is the seemingly stochastic nature of the release dynamics

Fig. 2. Schematic illustrating of the principles of tmSLADT. The DRLabsorbs the laser pulse with energy below the blister rupture threshold ofthe absorbing layer. This contains the gasses generated during absorption andprovides an actuator mechanism to transfer the discrete component.

and flight instability that makes achieving any placementconsistency virtually impossible. On the other hand, thethermal release method may not be suitable for ultrathincomponents because the gravitational force alone that thismethod relies upon for the actual component transfer may notbe sufficient to overcome the surface forces of attraction andrelease the object.

The results of the LIFT technique depend to a great extenton the layer which bonds the material to be transferred tothe releasing substrate, known as the dynamic releasing layer(DRL). Most of the reported results rely on a single-layerDRL. Multilayer configurations of the DRL were describedin the patent literature [35] but it is not clear if these methodswere ever realized for component transfer. In all these cases,the absorbed laser energy causes a total or partial evaporationof the DRL. The kinetic energy of the evaporated material isthen utilized to carry out the actual component transfer withall negative consequences discussed in the previous section.The problems can be alleviated if the rapidly expanding gasis isolated from the actual transfer. Instead, the gas resultingfrom the laser ablation can be used to create a blister inthe DRL that in turn will serve as a mechanical actuator tomore gently push the transfer component toward the receiv-ing substrate. This approach, henceforth referred to as thethermo-mechanical selective laser-assisted die transfer process(tmSLADT—pronounced “T”–“M”–SLAD), was adopted byour group in our initial experiments in which the DRL was asingle layer of in-house developed material that would createa blister and at the same time soften enough to release thecomponent (Fig. 1) [36].

The absorbed laser energy only vaporizes a shallow regionof the DRL corresponding to the absorption depth, leavingthe rest of the layer intact. The confined gas exerts a forceon the surrounding structure (nonvaporized portion of thefilm). When the pressure inside the blister generates stress inthe surrounding layer that exceeds its yield strength, plasticdeformation occurs and a blister forms. The pressure of theheated, expanding gas drops as the volume of the blister

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974 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012

Fig. 3. tmSLADT experimental setup.

increases until steady-state equilibrium is reached. Thereclearly exists a delicate balance, in terms of absorbed laserenergy, absorbing layer thickness, and material properties,which dictates whether or not a blister forms, the size of theblister, and finally whether or not the blister ruptures. Since theblister actuator is fully enclosed, the hot gaseous environmentexperienced during the ablative LIFT and arguably, to adegree, the thermal LIFT process, is eliminated. In addition,the nonlinear absorption exhibited in semiconductor materialsis now removed from the process, which should provide amore repeatable transfer process.

In a similar approach but for a different application, a recentstudy published by a group at the University of Princetondetails the nature of enclosed blister formation in spin-coatedliquid polyimide DRL when irradiated by a UV laser [37]. ThePrinceton study focuses on the application of this process forpurposes of ink printing and even for biomedical purposes.The DRL in this case is comprised of a 100 nm to 10 µmpolyimide layer which has a relatively shallow UV absorptiondepth of 0.2–0.5 µm [38].

The single-layer DRL configuration proved to be very sensi-tive to the properties of the blister/release layer. Three types ofmaterial properties had to be precisely controlled for a single-layer DRL to work: laser absorption, mechanical properties atelevated temperatures, and adhesive properties. Consequently,the concept of a two-part DRL configuration was developedand implemented in which the first layer, adjacent to the glasscarrier, will provide the blister mechanism and the secondlayer will be used to bond the transfer component (Fig. 2). Thedual-layer DRL configuration allows for uniquely formulatingthe bonding layer’s adhesive strength while causing a minimal,or no, change to the dynamics of blister formation in theunderlying absorbing/actuating layer.

Before exploring the finer details of DRL configurationfor tmSLADT, we provide an overview of the entire transferprocess from start to finish which easily integrates into theexisting backend processing sequences. The discrete compo-nents used in this paper were mostly blank silicon tiles. Onewould not expect the transfer dynamics of a functional silicon-based IC to differ significantly from a silicon tile with thesame or nearly the same dimensions. The samples are preparedbeginning with a polished fused silica substrate, which hasrelatively high UV transmission compared with other glasses.

A polyimide layer is first spin-coated and cured, uponwhich a pressure-sensitive adhesive (PSA) layer is spin-coated

and cured. Next, a thinned silicon wafer on a backing tapeis bonded to the PSA layer after which the backing tape isremoved. The wafer is then diced with a laser (355 nm for thispaper). Wafer dicing can also be accomplished by diamondsawing. After dicing, the sample preparation for individualtile transfers is finished. The transfer gap (separation betweenreleasing and receiving substrates) is set accordingly and theDRL is irradiated with UV laser pulses in the appropriatelocation on the substrate polyimide interface to create theactuator blisters which move the selected tiles or dice fromthe releasing to receiving substrate.

IV. EXPERIMENTAL SETUP

The primary components of the tmSLADT experimentalsetup used for this paper are illustrated in Fig. 3. Theyconsist of a Spectra Physics HIPPO Nd:YVO4 laser whosethird harmonic (355 nm) beam passes through a half-waveplate dichroic polarizer variable attenuator. The waveplate ismounted in a rotational stage and a Labview interface is usedto control its angular position. Next, the beam is expandedand then passes through a refractive beam shaper to attain thetop-hat profile as seen in Fig. 4.

A pair of relay lenses enhances the uniformity of the top-hatbeam profile [39] prior to the beam entering the laser scanhead(SCANLAB hurryscan II). The scanhead is positioned on agantry mount and the scanned beam is directed down towardthe XYZ motion control stages. Prior to each use, a powermeter is placed after the scanhead to calibrate the beampower versus waveplate position on the sample. The tmSLADTsample is placed on the stages and the sample position isset, along the axis of the beam, so the beam waist is in thesame plane as the polyimide layer of the sample. Inspectionof laser scribe lines on a Si wafer indicates a scanned flat-top beam waist diameter of 10 µm is achieved with thissetup.

V. DRL CONFIGURATION AND

SLADT SAMPLE PREPARATION

The addition of a PSA on top of the absorbing/actuatinglayer introduces new factors to the process. In our experiments,a 4-µm-thick layer of polyimide with no PSA overcoat wouldgenerate single-pulse enclosed blisters with heights in the15–20-µm range (the size of the static blister long afterformation, the actual blister displacement may be greater than

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MILLER et al.: NONCONTACT SELECTIVE LASER-ASSISTED PLACEMENT OF THINNED SEMICONDUCTOR DICE 975

Fig. 4. Laser beam top-hat profile used for wafer dicing and tmSLADT. Thisprofile was captured where the beam exits the scanhead, before the waist.

that during formation due to the inertia of the expandingfilm and subsequent cooling of the contained gas). With theaddition of a PSA layer, which has its own unique elasticproperties, on top of the polyimide, the dynamics of blisterformation should change. Considering this, the PSA layer mustbe thinner than the underlying polyimide layer. According toour experiments, the thickness of the PSA layer should beno more than 25% of the polyimide layer, though this is anempirical benchmark. A PSA layer of greater thickness inhibitsblister formation of sufficient height to induce componenttransfer.

The PSA must be formulated so that its adhesive strength issufficient to hold the wafer securely on the releasing substrateduring processing and laser dicing, but not be so excessivelytacky that it inhibits the components’ release once the poly-imide blister forms. This formulation was identified after aseries of transfer attempts with different PSA formulations,which produced unsuccessful tile transfer attempts. First, eachformulation had a unique spin-coating curve. This led to manysamples being created with an excessively thick layer, whichhad no chance of allowing tile transfer. Second, the elasticproperties of a PSA are unique to its specific formulation.Even if a new formulation with an acceptable adhesive strengthis created, the elastic properties may have changed simultane-ously with the adhesion in such a way that the blister formationdynamics are changed. For example, our work has found thatrelatively weak adhesion strength is needed for this process.Most PSA formulations, which provided desirable tmSLADTperformance, were “drier.” However, drier films of this typetend to also be less elastic. As we iteratively moved towarddrier formulations, the PSA also restricted the expansion ofthe polyimide blisters. These factors must all be balanced inorder for successful transfers to occur and is the reason thePSA layer must be relatively thin compared to the underlyingpolyimide layer.

Considering the sensitivity to initial conditions of the LIFTprocess, sample preparation must be done with great care anddetail to ensure subsequent sample polyimide and PSA layersare as near to being identical as possible. Variations have anegative effect on transfer precision and rate. With this inmind, DRL formulating, deposition, and wafer bonding to theDRL were performed in a class-100 clean room environment

Fig. 5. Dark-field micrographs depicting the use of photoresist as a protectivecoating during Si wafer dicing. Top: debris adjacent to lased diced streets.Bottom: the same sample after photoresist was stripped and debris is no longerpresent.

when possible. A 3-in diameter by one-sixteenth-inch-thickpolished fused silica substrate was used as the carrier orreleasing substrate upon which the HD Microsystems PI2525liquid polyimide was deposited. The polyimide thickness of4 µm was achieved by a two-step spin cycle. First, a 500-rpmspin was run for 10 s followed by a 5000-rpm spin for 40 s.After deposition, the spin-coated liquid polyimide was soft-baked at 120 °C for 30 min followed by a 30-min ramp to350 °C for a final 30-min hard bake.

Once the polyimide was cooled to room temperature, thePSA was diluted 50% with methyl isobutyl ketone anddeposited with a two-cycle spin recipe. The first cycle was500 rpm for 3 s followed by a 4000-rpm cycle for 50 s. Thisprovided a uniform PSA layer which was no more than/break1-µm thick. It was then UV-cured under a high-intensityUV lamp for 1 min. Next, the thinned 65-µm Si wafer wasbonded to the substrate by gently placing it on the PSA.Under ideal circumstances, the weight of the wafer providessufficient pressure for adequate bonding to the PSA. However,impurities in either the polyimide or the PSA layers will inhibitthe bonding process. If contamination is present, completebonding may require delicate pressure on the portions of thewafer that are not in contact with the PSA. Note that thisaction can cause variations in the thickness of the PSA whichleads to different conditions for the eventual transfer process.Considering the sensitivity of the process to these smallchanges, a more suitable option for improving the bondedarea of the placed wafer is to place the sample in vacuum.In these small-scale experiments, wafer sections without abacking tape are bonded to the tmSLADT substrates. However,wafer sections with a backing tape have been bonded to theDRL after which the backing tape is removed demonstratingthe ability to easily integrate this into the existing industrywafer-handling practices.

After the wafer-bonding process was complete, the samplewas diced into 680 × 680 µm tiles. This was done via

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976 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012

Fig. 6. Two tmSLADT-ed 65-µm-thick Si tiles. The focus in this opticalphotograph is on the receiving substrate. The releasing substrate from whichthe tiles were transferred is in the background.

laser ablation along the streets of the bonded wafer with thesame 355-nm HIPPO laser used for the transfer process itself,however, with a different repetition rate and pulse energyconfiguration.

Depending on the sensitivity of the diced components todebris generated during dicing, the wafer may be spin-coatedwith a thin protective coating. This allows the recast Simaterial and the residual ablation debris to land on top of theprotective layer that is subsequently stripped by a short solventbath (Fig. 5). However, for the results reported in the nextsection, a protective coating was not used. After singulationwas complete, the sample was inspected via a backlit opticalmicroscope to ensure complete dicing was achieved. In somecases, nearly complete dicing can occur but small tabs of Siremain intact across the diced streets, which inhibit the transferprocess. This must be balanced with over-scanning duringdicing. Laser scanning well beyond that needed to singulatethe wafer affects the properties of the DRL and must bemonitored. Once the sample was fully diced, it was mounted inthe fixture used for laser transfer. Shims of 260-µm thicknesswere used to space the receiving and releasing substrates fromeach other (use of shims or any other physical contact betweenthe two substrates is not required but simplified the setup).The releasing substrate was placed on top of the receivingsubstrate with the DRL and wafer sample facing down. Priorto mounting the receiving substrate in the fixture, it was spin-coated with a PSA and cured in order to catch the transferredtiles. Since the average thickness of the wafer used in thesesamples was 65-µm thick, the transfer gap was slightly lessthan 195 µm. Once the substrates were mounted, the fixturewas positioned under the scanhead (Fig. 3).

Based on characterization experiments, the rupture thresholdof the DRL configuration used for our 10-µm flat top beamwas near 8.5 µJ. However, the presence of an object or amaterial on the DRL surface increases this rupture thresholdslightly as some of the energy is coupled to the transferredobject in the form of kinetic energy.

Operating with pulse energies just below the rupturethreshold of the configured transfer setup ensures maximumblister/actuator height while still containing the hot gasgenerated by the vaporized polyimide. Limitations of our

(a) (b)

Fig. 7. (a) Map of a diced Si wafer. Typical spacing of transferred tiles isdepicted with an x . (b) Radial displacement and rotation of transferred tileswere used to evaluate the tmSLADT process.

current setup do not allow for a single-pulse transfer mode.Consequently, a simple circular pattern was scanned on theback side of the tile which was selected for transfer. A scanspeed that allowed for subsequent laser pulses to hit the DRLwith nearly overlapping edges provided a continuous blisteralong the pattern of the laser scan. Other scan patterns wheremultiple locations on the substrate would be activated at thesame time, each with an individual pulse, may be more ideal.Fig. 6 illustrates a typical result from the tmSLADT process.

VI. RESULTS AND DISCUSSION

Transfer precision and accuracy, and transfer rate wererecorded to evaluate the tmSLADT process. The tiles trans-ferred to collect these statistics were not adjacent or diagonalon the releasing substrate [Fig. 7(a)], so as to limit possibleDRL changes due to heating when a transfer was performednearby. The precision of each transfer contains two data pointsas depicted in Fig. 7(b), one each for radial displacement andangular rotation of the tile from its original position on thereleasing substrate. This was recorded, before separating thereleasing and receiving substrates after transfer, by lookingthrough the releasing substrate via an optical microscope. Atransferred tile’s position was determined by observing itsradial translation and angular rotation relative to the dicedarray, which remained on the releasing substrate.

Initial efforts focused simply on tile transfer rate as thePSA formulation was iteratively modified to provide optimaladhesive and elastic properties. In these activities, a widerange of transfer rates were observed. Most notably, an earliertmSLADT sample yielded a tile transfer set where 29 of 30tiles transferred to the receiving substrate. Of these 29 tiles,two cracked, presumably caused by the blister actuator (Acircular blister actuator was scanned by the laser. The laserturned on at the center of the circle and scanned the lengthof the radius, then scanned 360° and returned to the center ofthe circle before turning off. The position of the tile crackswas along the double-scanned radius line as the laser beganand ended from the center of the circle). Omitting the twocracked tiles, 27 of 30 tiles were successfully transferredto the receiving substrate, or 90%. The one tile which didnot transfer after the laser scan remained on the releasingsubstrate, seemingly unchanged. General observations from

Page 7: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND ...dice (250 × 350 µm) using a series of very low-fluence UV laser pulses [27] as well as a single-pulse transfer of various electronic

MILLER et al.: NONCONTACT SELECTIVE LASER-ASSISTED PLACEMENT OF THINNED SEMICONDUCTOR DICE 977

Fig. 8. XY scatter plot of transferred Si tiles depicting lateral displacementin µ micrometers from the tiles’ release positions.

the experiment were that all tiles transferred with radialtranslations consistent with the measured tmSLADT precisionin the following paragraph.

Continuing the tmSLADT evaluation with a different sampleand with the same experimental setup, a total of 55 tiletransfers were attempted and 35, or 64%, of these tilessuccessfully transferred to the receiving substrate intact andwithout any visible signs of cracking or other damage. The 20tiles which did not transfer after the laser scan remained on thereleasing substrate, seemingly unchanged. Also, three transferoutliers were removed, leaving 32 transferred tiles to providethe accuracy and precision data. The measured tile radialdisplacement mean, median, and standard deviation were61.2, 50.0, and 46.3 µm, respectively. Fig. 8 shows a radialdisplacement scatter plot for the 32-tile transfer set with a195-µm transfer gap. The rotational displacement mean,median, and standard deviation were 4.2, 3.5, and 4.1°,respectively. Considering the 195-µm transfer gap used forthis experiment, the release angle mean, median, and standarddeviations were 17.0, 14.0, and 13.1°, respectively. The releaseangle values were calculated assuming the transferred tilestraveled along a straight path between the releasing andlanding positions.

Transfer rate is highly dependent on sample preparationand is not yet well understood. Experience to this point hasshown that particle contaminants of size comparable to theadhesive layer thickness play a significant role in reducingthe bonding layer uniformity after the wafer is bonded toits surface. A common observation during tmSLADT samplepreparation is the presence of thin-film chromatic variationin the adhesive layer surrounding particles trapped betweenthe wafer and absorbing layer when viewed through the fusedsilica substrate. When a contaminant particle rests between theabsorbing layer and the bonded wafer, it prevents the flexiblewafer from bonding flat on the adhesive layer. Due to thewetting characteristics of the adhesive layer and its tendencyto flow into subtle contours of a joint, particles of this scalelead to the adhesive layer being thicker in some areas of thesample and thinner in other areas. Considering the change inblister formation dynamics with different DRL configurations,

Fig. 9. Functional RFID chip was placed in a flexible polymer substrateusing tmSLADT.

this leads to different blister formation and ultimately transferconditions as a function of position on the releasing substrate.

The tmSLADT transfer precision results are comparable tothe thermal LIFT results previously published [26]. Thoseresults measured release angles and only speculated on thelanding positions of the transferred components. It is likelythat the flight dynamics of transferred components are changedby the close proximity of the receiving layer to the releasinglayer. Experiments should be done with various transfer gapsto determine if the flight paths of transferred tiles are infact straight between the release and landing positions. Also,further investigation will be done to determine the most likelydifferences between tiles that successfully transfer and thosethat do not.

The ability for tmSLADT to embed components in a flexiblesubstrate is demonstrated in Fig. 9. A functional RFID chipof the same dimensions as the Si tiles used in this paper wastmSLADT-ed into a receptor pocket in a polymer substrate.The chip was then interconnected to the antenna element andwas functional when interrogated by an RFID reader. Furtherdetails of this paper are reported in a separate publication bythis team [40].

VII. CONCLUSION

The use of lasers offers a unique opportunity to place small-sized individual electronic components, including ultrathinsemiconductor functional dice, on substrates that may notbe compatible with traditional pick-and-place equipment. Itis the most promising, if not the only feasible method forhigh-volume assembly of small size, ultrathin semiconductorbare dice, essential for the next generation of mass producedhigh-component-density miniature electronic devices. Thesecomponents can be easily damaged during standard pick-and-place releasing using a metal needle. The laser release is acontactless process and, if properly controlled, is expectedto provide the means for safely assembling components at ascale significantly smaller than pick-and-place capabilities. Assuch, the tmSLADT method can be described as an enablingtechnology providing capabilities not available today. Theresults presented in this paper demonstrate the concept’s ability

Page 8: IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND ...dice (250 × 350 µm) using a series of very low-fluence UV laser pulses [27] as well as a single-pulse transfer of various electronic

978 IEEE TRANSACTIONS ON COMPONENTS, PACKAGING AND MANUFACTURING TECHNOLOGY, VOL. 2, NO. 6, JUNE 2012

to transfer 680 × 680 µm and 65-µm thinned Si tiles across a195-µm transfer gap. In this experiment, a transfer rate of 64%was observed while median tile transfer rotation and releaseangles were 3.5° and 14°, respectively. In addition, a functionalRFID chip was embedded in a flexible polymer substrate todemonstrate the ability to place thin functional semiconductorcomponents with tmSLADT. The optimization and implemen-tation of this capability on an industrial scale should enablecheap, flexible electronic devices. The tmSLADT processdeveloped at the NDSU Center for Nanoscale Science andEngineering is a unique contribution to this pursuit and pro-vides several advantages over other LIFT techniques proposedto date. It has the potential to enable the assembly of thetechnological capabilities that users of tomorrow will demandwhile reducing the resources consumed per component andultimately should result in a cost reduction measured not inpercents, but in orders of magnitude.

ACKNOWLEDGMENT

The authors would like to thank F. Sarwar andM. Pavicic for their support in the development of thetmSLADT technique.

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