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CADSL
8051 Microcontroller: Serial Communication
Virendra Singh
Associate Professor Computer Architecture and Dependable Systems Lab
Department of Electrical Engineering Indian Institute of Technology Bombay
http://www.ee.iitb.ac.in/~viren/ E-mail: [email protected]
EE-309: Microprocessors Lecture 13 (18 Aug 2014)
CADSL
8051 Pin
Diagram
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21
P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST
(RXD)P3.0 (TXD)P3.1
(T0)P3.4 (T1)P3.5
XTAL2 XTAL1
GND
(INT0)P3.2 (INT1)P3.3
(RD)P3.7 (WR)P3.6
Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)
8051 (8031) (8751) (8951)
19 Aug 2014 EE-309@IITB 2
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Data Communication
19 Aug 2014 EE-309@IITB 3
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8051 and PC • The 8051 module connects to PC by using RS232. • RS232 is a protocol which supports half-‐duplex, synchronous/asynchronous, serial communicaLon.
• We discuss these terms in following secLons.
PC 8051
COM 1 port
RS232
MAX232 UART
19 Aug 2014 EE-309@IITB
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Parallel vs. Serial Data Transfer • Computers transfer data in two ways:
– Parallel • data is sent a byte or more a Lme (fast) • Only short distance between two systems • The 8-‐bit data path is expensive • Example: printer, hard disks
– Serial • The data is sent one bit at a Lme (slow) • Long distance (rarely distorLon) • cheap • The data can be transferred on the telephone line (by using modem.)
19 Aug 2014 EE-309@IITB
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Serial vs Parallel Data Transfer
Sender Receiver Sender Receiver
Serial Transfer Parallel Transfer
D0
D7
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Serial vs. Parallel Data Transfer
Sender Receiver Sender Receiver
Serial Transfer Parallel Transfer D0-D7 D0
Other control lines
Other control lines
19 Aug 2014 EE-309@IITB
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Serial Communication
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Serial Communication • How to transfer data?
– Sender: • The byte of data must be converted to serial bits using a parallel-‐in-‐serial-‐out shiV register.
• The bit is transmiWed over a single data line.
– Receiver • The receiver must be a serial-‐in-‐parallel-‐out shiV register to receive the serial data and pack them into a byte.
11101000001011
‘A’
register 8-bit character
register 8 1
parallel-in serial-out
serial-in parallel-out
19 Aug 2014 EE-309@IITB
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Asynchronous Serial Communication • With asynchronous communicaLon, the transmiWer and receiver do not share a common clock
Transmitter Receiver +
1 byte-wide Data
Data –
1 byte-wide Data
The Receiver ¨ Extracts the data using its own
clock
¨ Converts the serial data back to the parallel form after stripping off the start, stop and parity bits
The Transmitter ¨ Shifts the parallel data onto
the serial line using its own clock
¨ Also adds the start, stop and parity check bits
Add: Start, Stop, Parity Bits Remove: Start, Stop, Parity Bits
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Synchronous Serial Communication • In the synchronous mode, the transmiWer and receiver share a common clock • The transmiWer typically provides the clock as a separate signal in addiLon to
the serial data
Transmitter Receiver
Data
Clock
The Receiver ¨ Extracts the data using the
clock provided by the transmitter
¨ Converts the serial data back to the parallel form
The Transmitter ¨ Shifts the data onto the serial
line using its own clock
¨ Provides the clock as a separate signal
¨ No start, stop, or parity bits added to data
1 byte-wide Data 1 byte-wide Data
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Asynchronous vs. Synchronous • Serial communicaLon uses two methods:
– In synchronous communicaLon, data is sent in blocks of bytes.
– In asynchronous communicaLon, data is sent in bytes.
byte byte byte byte 01011111
preamble 01010101
sender receiver
byte
sender receiver start bit stop bit
byte byte
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UART and USART • It is possible to write soVware to use both methods, but the programs can be tedious and long.
• Special IC chips are made for serial communicaLon: – USART (universal synchronous-‐asynchronous receiver-‐transmiWer)
– UART (universal asynchronous receiver-‐transmiWer)
• The 8051 chip has a built-‐in UART.
19 Aug 2014 EE-309@IITB
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UART Block Diagram
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8051 Serial Communication • The 8051 has serial communicaLon capability built into it.
• How to detect that a character is sent via the line in the asynchronous mode? – Answer: Data framing!
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Framing • Framing: Each character is placed in between start and stop bits – Framing ASCII “A” (41H)
stop bit
start bit mark 0 0 0 0 0 0 1 1
D7 D0 goes out last goes out first
Time (D0 first)
mark
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Framing • We have a total of 10 bits for each character:
– 8-‐bits for the ASCII code – 2-‐bits for the start and stop bits – 25% overhead
• In some systems in order to maintain data integrity, the parity bit is included in the data frame. – In an odd-‐parity bit system the total number of bits, including the parity bit, is odd.
– UART chips allow programming of the parity bit for odd-‐, even-‐, and no-‐parity opLons.
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Data Transfer Rate • How fast is the data transferred? • Three methods to describe the speed:
– Baud rate is defined as the number of signal changes per sec. • The rate of data transfer is stated in Hz (used in modem).
– Date rate is defined as the number of bits transferred per sec. • Each signal has several voltage levels. • The rate of data transfer is stated in bps (bits per second).
– EffecLve data rate is defined as the number of actual data bits transferred per second. • Redundant bits must be removed
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Data Transfer Rate • The data transfer rate depends on communicaLon ports incorporated into that system. – Ex: 100-‐9600 bps in the early IBM PC/XT – Ex: 56 kbps in PenLum-‐based PC – The baud rate is generally limited to 100kHz.
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Example of Data Transfer Rate • Data is sent in the following asynchronous mode:
– 2400 baud rate – each signal has 4 voltage levels (-‐5V, -‐3V, 3V, 5V) – one start bit, 8-‐bit data, 2 stop bits
mark stop bit
start bit mark 00 10 01 10 00 11 11 11
Time (D0 first)
8-bit character
stop bit
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Example of Data Transfer Rate • 2400 baud = 2400 signals per second =2400 Hz • 4 voltage level: Log24=2
– 2 bits is sent in every signal change • Data rate = 2 * 2400 Hz = 4800 bps • EffecLve raLo = 8 / (1+8+2) =8/11 • EffecLve data rate = data rate * effecLve raLo = 4800 * 8 /11=3490.9
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RS232 Standard • RS232 is an interfacing standard which is set by the Electronics Industries AssociaLon (EIA) in 1960. – RS232 is the most widely used serial I/O interfacing standard.
– RS232A (1963), RS232B (1965) and RS232C (1969), now is RS232E
• Define the voltage level, pin funcLonality, baud rate, signal meaning, communicaLon distance.
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RS232 Voltage Level • The input and output voltage of RS232 is not of the TTL compaLble. – RS232 is older than TTL.
• We must use voltage converter (also referred to as line driver) such as MAX232 to convert the TTL logic levels to the RS232 voltage level, and vice versa. – MAX232, TSC232, ICL232
logic 0
-3V
-25V
3V
25V
logic 1
undefined
RS 232 Voltage
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MAX232 • MAX232 IC chips are commonly referred to as line drivers.
PC 8051
COM 1 port
RS232
MAX232 UART
RS232 voltage level
TTL voltage level
TTL voltage level
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RS232 Pins for DTE Pin Descrip0on 1 ProtecLve ground 2 TransmiWed data (TxD) 3 Received data (RxD) 4 Request to send (RTS) 5 Clear to send (CTS) 6 Data set ready (DSR) 7 Signal ground (GND) 8 Data carrier detect (DCD) 9/10 Reserved for data tesLng 11 Unassigned 12 Secondary data carrier detect 13 Secondary clear to send
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14
1
25
13
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RS232 Pins for DTE Pin Descrip0on 14 Secondary transmiWed data 15 Transmit signal element Lming 16 Secondary received data 17 Receive signal element Lming 18 Unassigned 19 Secondary request to sent 20 Data terminal ready (DTR) 21 Signal quality detector 22 Ring indicator 23 Data signal rate select 24 Transmit signal element Lming 25 Unassigned
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14
1
25
13
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RS232 Handshaking Signals • Many of the pins of the RS232 connector are used for handshaking signals. – DTR (data terminal ready) – DSR (data set ready) – RTS (request to send) – CTS (clear to send) – RTS and CTS are hardware control flow signals. – DCD (carrier detect, or data carrier detect) – RI (ring indicator)
• They are not supported by the 8051 UART chips. 19 Aug 2014 EE-309@IITB
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Thank You
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