7Midterm Examination Semester III 2008/2009

INTERNATIONAL ISLAMIC UNIVERSITY MALAYSIAMID-TERM EXAMINATION

SEMESTER III, 2008/2009 SESSIONKULLIYYAH OF ENGINEERING

Course Code: ECE 1231 Course Title: Electronics

Time

: 8:30 pm-10:00 pm Date: 04-June-2009Duration: 1 Hour 30 MinutesINSTRUCTIONS TO CANDIDATESDO NOT OPEN UNTIL YOU ARE ASKED TO DO SO

Do not use your own sheet.

A total mark of this examination is 60.

This examination is worth 30% of the total assessment. Answer ALL questions.Any form of cheating or attempt to cheat is a serious offence which may lead to dismissal.Question 1Question 2Question 3Question 4Total Marks

Marks1515151560

Marks Obtained

Q.1 [15 marks](a) The electron concentration in silicon at T = 300 K is n0 = 51015 cm-3 and the intrinsic carrier concentration is ni = 1.51010 cm-3. Determine the hole concentration. Is the material n-type or p-type? (4 marks)(b) A gallium arsenide pn junction has a diode current of ID = 12 mA when biased at VD = 1.10 V. Determine the reverse-bias saturation current. Using the result of the previous part, determine the diode current when the diode is biased at VD = 1.0 V. (5 marks)

(c) The diode cut-in voltage is V = 0.7 V in the two circuits shown in Fig. 1 (c). Find I and V0 in each of the circuits. (6 marks)

Fig. 1 (c)Q.2 [15 marks](a) The input signal voltage to the half-wave rectifier circuit in Fig. 2 (a) is V and the transformer turns ratio is N1/N2 = 6. If V = 0.7 V and rf = 0, determine (i) the peak diode current for R = 10 K and (ii) the average value of the output voltage.(5 marks)

Fig. 2 (a)(b) In the voltage regulator circuit in Fig. 2 (b), V, V, , and . Determine , , and . (6 marks)

Fig. 2 (b)(c) The diodes in the circuit in Fig. 2 (c) have piecewise linear parameters of V and . Determine the output voltage and the diode currents and for the input: V1 = V2 = 10 V. (4 marks)

Fig. 2 (c)Q.3 [15 marks](a) For the diode clipper circuit in Fig. 3 (a), plot versus time over two periods for sinusoidal input signal. Assume . (5 marks)

Fig. 3 (a)(b) A diode clamper circuit with sinusoidal input signal is shown in Fig. 3 (b). Assume . Plot (i) the capacitor voltage versus time and (ii) the output voltage versus time. (6 marks)

Fig. 3 (b)(c) Consider the diode AND logic circuit in Fig. 3 (c). Assume V for each diode. Determine the output for: (i) ; (ii) , V; (iii) V, ; (iv) V. (4 marks)

Fig. 3 (c)

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