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IEEE TRANSACTIONS O N ELECTKON DEVICES, VOL. ED-20, NO . 4, APRIL 1973 395
A CurrentlExcited Large-Signal Analysis of IMPATTDevices and Its Circuit mplications
MADHU-SUDAN GUPTA AND RONALD J. LOMAX
Abstract-A large-signal analysis of a Read-type IMPATT diodeis carried out with a sinusoidal current as the excitation. Th e resultsare compared with analy ses that assum e a sinusoidal voltage excita-tion. The large-signal impedance of the d iode with current excitationis expressed in closed form. The circuit implications of choosing volt-age or current as th e xcitation are discussed.
I dINTRODGCTION
ARGE-SIGNAL analyses f IMPATT diodes and othernegative-resistance devices may be classified intotwo groups [ l ] : self-consistent analyses, in which
the device terminal voltage and current are related to
each other not only hrough equations describing hedevice model, but also by equations describing the ter-minal characteristics of the circuit in which the deviceis mbedded, nd ideal ized-circui t nalyses, inwhicheither the voltage or the current waveform is assumedin advance and the other is calculated through deviceequation s, implying that there exists some circuit th atwill support this p air of voltage a nd curre nt wavef ormsa t its erminals. While here is no restriction on thenatu re of wavefor ms that m ay be chosen as the excita-tion in idealized-circuit analyses, the difficulty of calcu-lating the device response usually dictates the choice.Typically, he waveform chosen is a sinusoid ( s ing le -f r e q u e n c y a n a l y s i s ) , or the sum of several sinusoids ofarbitrary mplitudes nd elative phases, bu twithharmonically elated requencies norder to nsureperiodicity (mul t i f reque ncy na lys i s ) , although therwaveforms, such as rectangular ones Z ] , also have beenused.
The single-frequency nalyses remost ommonbecause heir results (impedance or admittance planeplots as a function of the excitation frequency and am-plitude) can be more compactly expressed, easily inter-preted , and are in a more genera lly usable form (com-pare, for instance, the results obtained for a Read-typeIMPATT diode rom a ingle-frequency analysis [ S I , amultifrequency nalysis [4], an delf-consistent
analysis [1 ).Manuscript received June 12, 1972; revised November 14, 1972.
This work was supported by he National Aeronautics and SpaceAdministration under Grant NGL 23-005-183.
R. J. Lomax is with the Electron Physics Laboratory, Depart-ment of Electrical and Computer Engineering, University of Michi-gan, Ann Arbor, Mich. 48104.
M. S. Gupta was with the Electron Physics Laboratory, Depart-ment of Electrical and Computer Engineering, University of Michi-gan, Ann Arbor, Mich. He is now with the Depa rtment of ElectricalEngineering, Queens University, Kingston, Ont., Canada.
There rewomet hods of car ryin g ut singlefrequency analyses of IMPATT diodes arld other negative-resistance evices. Th e first s the voltage-excitation( V E ) method, in which a sinusoidal voltage is assumedto be applied across the device, the current response iscalculated arld Fourier analyzed, and the device imped-ance is found using the fundamental component of cur-re nt. The second method s current-exci tat ion ( C E ) , inwhich a sinusoidal current is assumed to flow throughthe device, voltage response s calculated, and the deviceimpedance is found from it. The first of these methodshas been used almost exclusively in the case of IMPATT
diodes. In th e mall-signal case, t does not mat ter whichapproach is used because the voltage and current areboth sinusoidal; either method therefore gives the samediode mpedance. n a arge-signal analysis, he har-monic content of the calculated response may be high,and the impedance calculated by the two met hods willnot be identical, in general. Some caution s necessary inestablishing whether the harmonic content is high forthe following reasons. When the diode response s experi-menta lly deter mined by means of a probe [SI, single-fre quen cy ou tput may be observed in spite of t he pres-ence of strong higher harmonics a t th e device ter minalsbecause the diode package is equivalent to a low-pass
L Cfilter [ I ] that reduces the high-frequency ields out-
side the diode package. Further, the fact that the cur-re nt response of th e device to a sinusoidal voltage ap-pears almost sinusoidal may be misleading ince th elargest component of the current is a capacitive compo-nent that may well be sinusoidal. The tota l term inalcurr ent of a n IMPATT diode (i.e,, the external current) isgiven by [3]
where C d is the deplet ion region capac itanc e of thediode, I/ s the ac terminal voltage,l and , s the termi-nal current induced by the transport f carriers through
the diode (see Fig. 1) . For a sinusoidal voltage excita-tion, the first term is sinusoidal, while the second is usu-ally far from sinusoidal for large signals. s the negativeconduc tance of the device st ems from the conduct ivecompone nt of the cur rent , the econd ter m is of primar yimportance.
appears because of th e sign convention chosen in [3].I The minus sign before V in his and ubsequent equations
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396
r-
Fig. 1. Terminal voltage and current for an IMPATT diode showingth e separation of the depletion region capacitance C d from thediode admittance Yd. Y , is the circuit admittance including thediode package.
When the harmonic content of th e response is high, t:becomes necessary o pecify he assumed harmonic:terminations (i.e., the impedance of the c i rcui t a t har-monic frequencie s) with he results of the large-signalanalysis. The ssumptio n concerning the armonictermina tions is mplied in the method of the large-signalanalys is. The res ults of several large-signal analyses bythe V E method are already available in the literature.The purpose of this pape r is to present a arge-signal
single-frequency analysis with current excitati on. Theresults of the two analyses are compared, and the iffer-ences are explained. The circuit implicat ions f the t w omethod s of analysis are then discussed.
LARGE-SIGNAL NALYSIS F IMPATT DIODESWITH CURRENT XCITATION
Th e primary purp ose of this analysis s he corn.parison of the ca lcula ted di ode im pedanc e usi ng the E,method with that obtaine d using the V E method. Fcrl.simplicity, the diode model and the set of assum ption!;to be made here are o chosen that the anal ysis emain!;algebraically tractable. More exact analyses, of course,can be carried out numerically. T o avoid duplication,th e descr iption of assum ptions made concerning thl:diode and t he deri vation of the carrier transport equa-tions re omitted. The following equati ons elati n;;V ( t ) , he ac component of the termi nal voltage , and h::total ac plus dc) erminal current I ( t ) are direct!,;adopted from [3].
dl&) 2%_ _ - -- c ( l ) E a ( t )at 7,Ec
and
* J ( T d - + )I,(t)dtf-d
where the following nomenclature is used.
I c ( t ) Carrier current n he avalanche egion.
Qi Ionization ateorarriers.E , Critical breakdown field so t h a t a (E , ) = I/&.l d , 1, Drift region and avalanche region lengths.T d , T , Corresponding ransit imes.A, Cross-sectional ar ea of t he diode.
E ( t ) Tot al (a.c plus dc) electric field stre ngth in t he
YYI = fCc~(EC)/a(Ec).
E Permittivity of the emiconductor aterial.
avala nche region.E , t ) E ( t )- ,.E b A constant.
The prime denotes differentiation with respect o heelectric ield, and he assumption T, / T ~ < < I as beenmade. From (1), th e diode admittance including hedepletion region capacitance cd) at th e oscillation fre-quency w is given in ter ms of the fundame ntal freque ncycompone nts of curre nt and voltage by
The set of ( 2 ) , (3), and (4) has been solved ana lyti -cally for l e ( $ )ssuming V ( t ) - V sin ut, with the addi-tional assumption of a small transit angle 3] . Presently,i t will be solved for V ( t ) assuming2
I e ( t ) = Id 0 + I R p sin u t. ( 6 )The small transit-angle assumption s unnecessary in theCE met hod of analysi s, as the equa tions c an be solvedanalytically without i t a s follows. Sub st it uti on of (6)into ( 2 ) gives
where
With this, the solution of (3) and (4) for V(tj gives
V(1) =-
o ld c o s W ( t + ; ) - 2 A , 4 sin ( W T d / 2 )- os ut
EW A , W T d E A ,
where the dc equations have been satisfi ed by settingthe constant
to be a part of th e passive circuit (see Fig. 1).a d,(t) can be considered as the terminal current f Cd is taken
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G U P TA ANDOMAX: SIGNAL ANALYSIS OF IMPATT DZVICES 39
0 1 5 r
4 0' ''4 0 r
w t , ra d w t , ra d
( a ) ( b )Fig. 2. Comparison of voltage and c urrent wavefo rms in the (a) V E
an d (b ) C E single-frequency large-signal analyses.
The periodic waveforms f l e ( t ) I , ( t ) , nd V ( t ) given by( 6 ) , ( 7 ) ,and (9 ) are plotted in Fig. 2(b) for a typical setof parameters. For the same diode structure and operat-ing oint, hewaveform s btainable from th e VE
method of analys is are ncluded n Fig. 2(a) for com-parison.
The fundamental frequency component of th e ter mi-nal voltage V ( t ) ound by a Fou rier anal ysi s of (9) is
A ol d c o s w ( l + ; - 2 A , k sin ( W T d / 2 )VI@) =
-UAr d T & A
cos w t
After I e ( t ) and V l ( t ) n (6 ) and (11) are represented asphasors and substituted into ( 5 ) , the diode admittanceis found o be
tion of 11, he ampli tude of the fundament al freque ncycompone nt of I ( t ) .
For the purp ose of direct comparison, the diode ad-mittance has been calculated by the 'VE method3 andthe CE method and plot ted n Fig. 4 for a fixed valu e ofV I , he amplitude of the fundamental frequency compo-nent of termin al vol tage, and fo r the same device param-eter s and bias curr ent density . It is clear from Fig.
t h a t a single device at one operating point ( bias curr entdensity, voltage level, and frequency) ill have differentadmittance values depending upon he ssumptionsmade in the method of ana lysis . This is to be expectedbecause th e device is a nonlinear circuit element, andits admittance depends upon the nature f the circuit inwhich i t is imbedded. The two methods of large-signalanalysis, V E an d CE, tacitly assume two different cir-cuit s, as discussed in the next section, and hence yieldtwo different diode admittances.
RIODEL O F THE PASSI VE OSCILLATOR C I R C U I T
With two different methods resulting in two different
impedances, i t is necessary to establi sh the conditi onsof applicability of the wo method s and result s. I t iswell established both theoretically [4], [ 6 ] and experi-mentally [ 7 ] that the performance (and impedance) othe diode is influenced by the value of the circ uit im-pedance presented to i t a t harmonic frequencies. Th edifference between th e VE and C E analyses lies in thedifferent harmonic-frequency circuit mpedances hathave been acitly assumed. n he V E analysis, hesinusoidal voltage across the circuit is accompanied bya current hat contains harmonics with finite ampli-tudes. The method therefore should be used for deter-mining diode impedance when the harmonic frequencies
where w a is the avalanche frequency defined by
2 m I d c
6 A rTaEow a 2 = ~ .
In the small-signal limit, the admittance becomes
Y d , w= w c d
1 - exp ( - j W T d )
exp ( - j O T d ) - 1 + w , 1 - -+w c a
( 3 (14)T h e large-signal ad mit tanc e given b y (12) is plotted inFig. 3(a) as a functi on of frequencyw/2w a nd amp li tud eA, f the carrier current l c ( t ) [which is related to th eamplitud e of I e ( t ) by (S) ] . The actual terminal currentI ( t ) , which is nonsinusoidal, also can be f ound by thesub sti tuti on of (6) and (9) into (1). The admittanceplane plot of Fig. 3(a) is redrawn in Fig. 3(b) as a func-
are terminated essentially by a short circuit. Similarly,the results of th e CE meth od of analysis are valid whenthe harmonic frequency terminations are, in effect, opencircuits.
There are many situations in which i t is essential tohave a model for the external circuit of an aval anch ediode and other negative-resistance device oscillators.Th e most straightforward me tho d of model ing s bymea ns of lum ped or distributed equivalent networksrepresenting the diode package and cavity. This leadst o abroad-band charact erizati on of the circuit [I]However, for many analytical purposes, such model itoo omplicated ecause i t doesnot nsure ingle-frequency operation of the nonlinear device, and becauseits impedance is a complicated function of frequency.
[4] was used; a complete admittance plane plot for this diode andA numerical solution of (2), (3 ) , an d (4) s described elsewhere
current density is given in [ I , fig. 71.
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5 0 0
4 00
N
5\
o 3 00
E
W
5 20 0aWULo3v)
I O 0
0
c
I V VJ
-50 -40 -30 - 2 0 -10 0
CONDUCTANCE, m n o / c m 2
(a )3 0 0
2 5 0
N
2 20 0.cE
W
Y 15 06ULo
2 100
5 0
O-50 -40 -30 - 2 0 - I O 0CONDUCTANCE, rnho/cm*
(b9
Fig. 3. Admittance plane plot or he Read-type silicon IMPATIdiode. (a) As a funct ion of AD. (b) As a unction of 11. Ava1anch.Eregion length = 1 pm, total depletion region length = 5 pm , andbias current density 500 A/cm2.)
For these reasons, the circuit commonly has been repre.sented by a lumped RLC series, or a parallel resonanlnetwork with requency-independent elements whoseimpedance is therefore a simple function of frequency,I t is imp ort ant to recognize th at th e choice of either aseries or a parallel resonant network cannot be madearbitrarily; i t aIready has been made n carrying outth e large-signal analysis, and once the device impedancehas been calculated in one way, there is only one circuitmodel th at may be used with t. I n the VE ana1ysi:jthe circuit impedance should be zero a t harmonic f r equencies, a condition approached by the parallel reso-nant circuit, while for the C E typ e of analysis, the cir.cuit mpedance hould be nfinite a t harmonic fre.quencies, mplying that a series esonant ircuit i:
250
200
N
E
-ciI 5 0
w0z6 00
50
C
r
L
A = 16 GHz= 14
I 12
8 = 100 . 8
) -30 -x ) - 10 0CONDUCTANCE, mho/cm2
Fig. 4. Comparison of the admittances of the IMPATT diode of Fig. 3obtained using VE and CE analyses a t a dc bias of 500 A/cm2and 10-V amplitude at the fundamental frequency.
n e c e s ~ a r y. ~ hese restrictions on the choice of a circuit
model are applicable only when the circuit behavior a tharmonic frequencies is of concer n; when the behaviorof the circuit impedance as a funct ion of frequ ency inthe neigh borho od of th e oscillation frequency alone isof interest, as, or example, n njection ocking andnoise studies [SI, no restrictions are mplied, and hechoice of a circuit model should be consistent with thestability requirements [SI .
In the analysis presented, the current e ( t ) ather thanI ( t ) was taken to e sinusoidal. Therefore, its results areapplica ble when the admitta nce of the passiv e circuit ,including he depletion egion capacitance, Yc+jwCd,is zero a t harmonics of th e oscillation frequency, i.e., the
circuit admittance Y , is inductive (see Fig. 1) .
RESULTS
Th e following conclusions ma y be drawn from Fig. 4.1) Th e frequency of maximum negative conductance
is lower in the C E anal ysis than in th e VE analysis . Thi simplies that the opti mum fre quen cy of operation of adiode is lower when the harmon ic voltag es are termi-nated in a high mpedance han when hey are shortcircuited. This result can be understood from Fig. 2(b).The phase relationships of harmonic voltages in V ( t ) resuch that the total voltage V ( t ) becomes small sho rtlyafter the avalanche buildup starts. As a result, the in -jected current o ( t ) ncreases slowly (sinusoidally insteadof almost exponentially) when approaching ts maxi-mum value. Consequently, the avalanching phase delay[i.e., the phase shift of I c ( t ) with espect to V, ( t ) ] slarger in the CE analysis than in the VE analysis. A
known stability requirement hat instantaneous negative resis4 This condition s ndepend ent of and unrelated to th e well-
tances with N-type and S-type I- V characteristics only can be con-nected with parallel and series resonant networks, respectively [SI.
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IEEE TRANSACTIONSN ELECTRON DEVICES, VOL. ED-20, NO. 4, APRIL 1973 399
smaller transit-time delay s therefore needed for maxi-mum negative conductance. Hence it occurs t a lowerfrequency.
2) At large signals, a larger negative conductance(and hence power output) is avail able with he VEanalysis than with the C E analysis a t all frequencies.Thi s also can be explained by Fig. 2(b). At large signallevels, the injected current I,(t) in the VE analysis be-comes pulsive, and its fundamental frequency compo-nent approach es a p eak value f 2 1 d , in the limi t of th elarge signal. In th e CE ana lys is, no harmonics of w ar eavailable n I c ( t ) to maximize the undam ental fre-quency component; the limiting value of the amplitudeof the fu ndam ental compo nent s therefore only d o .T h egeneration of a arger fundament al frequency compo-nent of I c ( t ) n the VE analysis results in a larger nega-tive conductance.
CONCLUSIONS
Th e large-signal admit tance of a Read -typ e IMPATTdiode has been calculated, assuming the induced currentwaveform o be sinusoidal, and analytical esults orthis model were obtained. The calculated admittanceplane plo t has bee n compare d with the result s of earlieranalyses that assumed a sinusoidal voltage across thedio de. The difference ies n the assumpti on regardingthe impedance at harmonic frequencies in the passiveoscillator circuit, which is inherent in carrying out theanalysis with sinusoidal current and voltage excitations,respectively. The large-signal nalysis given here is
applicable when he passive circuit ogether with hedepletion region capacitance C d behave like a seriesresonant circuit at harmonic requencies, i.e., they havea large impedance.
ACKNOWLEDGMENT
The aut hor s would like to thank Prof. G. I. Haddadand Dr. W. E. Schroeder or helpful discussions and
comments on this paper.
REFERENCES[ l ] M . S. Gupta and R. J . Lomax, A self-consistent arge-signal
Electron Deu+, vol. ED-18, pp. 544-550, Aug. 1971.analysis of a Read-type IMPATT diode oscillator, EEE Trans.
[ Z ] F. Sellberg, Large-signal heory for rectangular-voltage opera-tion of a uniform avala nche zone in INIPATT diod es, Electron.
[3] W. J . Evans an d G. I.Haddad, A large-signal analysis ofLett., vol. 7, pp. 154-156, Apr. 8, 1971.
IMP ATT diodes, IEEE Trans. Electron Devices, vol. ED-15,
141 W. E. Schroeder and G. I. Haddad, Effect f harmonic and sub,;harmonic ignals onavalanche-diode oscillator performance,IEEE Trans. Microwave Theory Tech. (Corresp.), vol. MTT-18,DD. 327-331. Tune 1970.
pp. 708-717, Oct. 1968.
,~ ~ ~ ~YQ.J. Evans, Circuits for high-efficiency avalanche-diode oscil-lators, IEEE Trans. Microwave Theory Tech., vol. IT-17,pp. 1060-1067, DZC. 1969.C. A . Brackett, Circuit effects in second-harmonic uning of
pp. 147-150, M ar. 1971.IMPATT diodes, IE EE Trans. Electron Devices, vol. ED-18,
second-harmonic tuning, Proc. IEEE (Lett.), vol. 56, pp. 1616-C. B. Swan, IMPATT scillator performance improvement with
1617, Sept. 1968.K. Kurolrawa. Some basic characteristics f broadband nerrative-resistance oscillator circuits, ell Syst. Tech. J., ol. 48, p71937-
[9] J . W. Alexander, Nonlinear negative esistance, he essentialeleme nt in norm al amplifiers and oscillators, In t. J . Electron.,VOI. 28, pp . 245-257, Mar . 1970.
1955 , July-Aug. l3i59.
Technology for M on olith ic High -Pow er Integrated Circuits
Using Polycrystalline Si for Collector and Isolation Wal l s
ISAMU KOBAYASHI
Absfracf-The fabricatio n technology for a high-power mono-lithic I C improved the breakdown characteristics and the output cur-rent capability. The maximum output power increased to 50 W an dthe supplied voltage of 110 V was ealized. Highly doped poly-crystalline Si was used as the collector walls and the isolation wallsof tran sistors. Electrical and physical properties of the polycrystallinestructure used in the power I C and the fabricatio n technology arealso described.
hlanuscript received July 3 , 1972; revised Octob er 30 , 1972.Th e author is with he Sony Corpo ration Research Center,
Hodogaya-ku, Yokohama, Japan.
AI. INTRODUCTION
N OU T LI NE of the fabrication echnology for apolycrystalline high-power IC ha s been reportedbefore [ l ] . n this paper, the details f the tech-
nology, the mproved electrical charact eristi cs of thenewly developed ICs, and the properties of the poly-crystalline Si used in the IC are reported. The polycrys-talline Si was used as th e collector walls connecting theelectrodes to ,the buried layers, and also as the isolationwalls in he IC chips. It was possible t o construct a
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