Implementation of DC-DC Converters into the CMS Tracker at Super-LHC

Implementation of DC-DC Converters intothe CMS Tracker at Super-LHC

ATLAS / CMS Power Working GroupCERN, March 31st, 2010

Katja Klein1. Physikalisches Institut BRWTH Aachen University

Outline

Katja Klein 2DC-DC Conversion for CMS Tracker Upgrade

DC-DC converters for• CMS phase-1 pixel upgrade• CMS track trigger layers• CMS outer tracker upgrade

Caveat:can present only a snap shot of current ideas; outcome of Chamonix Workshop and consequences are still being discussed...

Powering the CMS Tracker Upgrade


In 2008 a task force, led by Peter Sharp, was set up to look into the two options: Serial Powering and DC-DC conversion.

As a result of this review process, the CMS tracker has chosen DC-DC conversion as baseline solution, and maintains Serial Powering as back-up (January 2009).

Reasons:- closer to today‘s parallel powering scheme (modularity, failure modes,

grounding & shielding, ...)- only one new component required (the DC-DC converter)- less consequences on system design (classical grounding, no AC-coupling etc.)

CMS Pixel UpgradeThe easy application


Phase-1 Pixel Upgrade


BPIX: 3 barrel layers 4 layers r = 3.9, 6.8, 10.9, 16.0cm

FPIX: 2 x 2 disks 2 x 3 (larger) disks(3rd disk had been staged)

• Number of ROCs increases: BPIX: 11 520 19 456; FPIX: 4 320 10 756• Modifications to PSI46 ROC to reduce data losses (buffer size ...)• Reduction of material (light-weight mechanics, CO2 cooling ...)• DC-DC conversion... more radical changes are under discussion

Current pixel detector:

Cell size: 100µm x 150µm

Pixel Power System

Katja Klein 6Pixel PowerSystem Developments

• PSI46 ROC needs two supply voltages: Vana 1.5V and Vdig 2.5V• On-chip voltage regulators compensate for differences in supply voltage due

to voltage drops on cables, and improve power noise rejection• Supplied by 56 CAEN A4603 power supply modules (EASY 4000 system)

- Want to keep power supplies, if possible (perhaps with light modifications)

• 40m + 5m long multi-service cables to pixel supply tube – cannot be exchanged• Cables run along supply tube to pixel detector

pixel det.

Why DC-DC Converters?


• More readout chips per cable and per power supply• FPIX: might cope without DC-DC converters (cables for 3rd disk already installed)

• BPIX: - Increase of heat load in cable channels by a factor of 3- Required power cannot be delivered by todays’ power suppliesÞ Need to reduce supply currents and thus power losses in supply cablesÞ Decision in June 09 to go for buck converters, located on far end of supply tube

- Low conversion ratio (~ 2:1) to be compatible with voltage specification of PS

• Note: DC-DC converters needed even if PS would be replaced, to reduce heat load in cable channels

DC-DC Converters: BPIX Scheme


A4603PSU

PSU

Vana

Vdig

4-5 converters 4 barrel modules per converter

DC-DCdigital

DC-DCanalog

4-5 converters

FPIX: 2 blades per DC-DC converter

4 barrel modules per converter

Converter Integration - BPIX


• Multiservice cables arrive at point 0• PCB with DC-DC converters in region 1• Embedded standard cables in region 2• PCB in region 3 & thin wires to modules at 4

Mock-up in preparation

0

2

3

4

Silvan Streuli, 28/10/2009

1

Pixel PowerSystem Developments 10

“Specs“ for Pixel DC-DC Converters (I)

Katja Klein

Numbers are still subject to changes.

Converter type: Inductor-based non-isolated step-down converter, probably of buck-type, integrated on a separate PCB.

Conversion ratio Vin/Vout: 2 - 3

Output voltage Vout: Vana = 2.3V Vdig = 3.5V

Input voltage Vin (for 1:2): Vana = 4.6VVdig = 7.0V

Output current Iout: < 2.8A (in some detector regions up to 4.9A – adapt modularity?)

Switching frequency: 1 - 2 MHz Low frequency to maximize the efficiency.

Efficiency: 80%

Pixel PowerSystem Developments 11

“Specs“ for Pixel DC-DC Converters (II)

Katja Klein

Dissipated power: 2-3W per converter for 80% efficiency. Active cooling has to be foreseen.

Dimensions of PCB: Length = 3.2cm , width = 2cm, height <1.4cmSmall piggy-board with board-to-board connectors

Material budget / Weight: Since these converters are at z = 2.0-2.3m and r ~ 19cm they are absolutely outside of the tracking region and therefore uncritical in mass and material budget. The only concern is the use of material with little activation.

Output voltage ripple: Since the PSI46 ROC has rather fast on-chip regulators, the requirements for ripple are very relaxed.

Radiation environment: 19cm radius, z = 2.3m, 700fb-1, safety factor = 2: Fast hadrons fluence: 6-7 x 1014 /cm2

Dose: 200kGy

Specific requirements: Behaviour for very fast load variations due to orbit gaps. Stability of operation together with long pixel cables and the CAEN A4603 power supply modules.

Prototype: AC_PIX_V4 Buck Converter


Chip: AMIS2 by CERNVIN < 12VIOUT < 3AVOUT = 3.3VfS ≈ 1.3MHz

PCB:2 copper layers a 35mFR4 1mmA = 18mm x 25mm for QFN32

Input and output π-filtersL = 12.1nH, C = 22µF

Air-core toroid:Custom-made toroid, 6mm,height = 7mm, L = 600nH, RDC = 80mΩ

25mm18

mm

m = 2.7g

Cooling contact

AC_PIX_V4 Efficiency


0.0 0.5 1.0 1.5 2.0 2.5 3.050

55

60

65

70Vin=10V, Vout = 1.2V, Iout =1A

Frequency [MHz]

Effic

ienc

y [%

]

• ~ 75% for 3A and conv. ratio of 2-3• Res. losses (Ron, wire bonds, coil ) ~ 1/fs;

switching & driving losses ~ fs

• Further improvements are expected: Move from 1.3MHz to 1.0MHz Gain few % with cooling Move to flip-chip package On-chip routing? PCB layout, capacitors etc.?

PIX_V4, Vout = 3.3V, f = 1.3MHz

0.00 10.00 20.00 30.00 40.00 50.00 60.00 70.00 80.000.69

0.70

0.71

0.72

0.73

Vin = 10V, Vout = 3.3V, Iout = 2.8A

Chip package temperature [°C]

Effic

ienc

y [%

]

AC_PIX_V4 Noise Behaviour


Vin = 10V, Vout = 3.3V, Iout = 1.4A, fs = 1.3MHz

Differential Mode

Common Mode

L = 12.5nHC = 22µF fcut 600kHz

• On-board pi-filter Þ DM noise reduced wrt. CM• However, performance of filter to be improved• Recall: PSI46 has Linear Regulators• Tests with real pixel modules in preparation for

FPIX (Fermilab) and BPIX (Aachen)

Enpirion withexternal pi-filter

System Aspects


• Operation with 40m long cables and A4603 CAEN power supplies• Remote sensing of CAEN power supplies at input of DC-DC converters• Stability of Vout (both from converter & CAEN PS) during fast load variations

on digital line- Digital activity lower during orbit gaps (3µs)- Idig = 2.7A 1.9A for L = 21034/cm2/s

- Changes within one to few bunch crossings- Current supplied by capacitors on pixel module?

• System test activities & simulations started (FNAL, Aachen)

CMS Track Trigger LayersThe most demanding application


Track Trigger Layers


α

J. Jones (~2005)CMS Tracker SLHC Upgrade Workshops

• Tracking information needed in L1 trigger, to preserve trigger rate at nominal value• All ideas based on discrimination between low and high pT tracks due to bending

- Cluster width approach OR stacked, closely spaced, pixelated layers• Worst case in terms of power consumption: “Long Barrel Double Stack“ layout

Þ whole tracker constructed out of double-stacked layers (~ 300m2)

The “Long Barrel Double Stack“ layout

4 layers

Track Trigger Power Requirements


Estimates for stacked layers FE power consumption from CMS:• Power/channel: 0.1mW for 100µm x ~2mm pixel• Power per unit area: ~100mW/cm2

• Power per double module: 2W – 9W

More relevant: supply currents• 130nm or 90nm technology: 1.2V (analogue) or 0.9V (digital)• Total current at 1.2V: 1.6 ... 8A. Note: buck supply current 3-4A.• Digital power consumption ~ 50-75% of total; lowering Vdig to 0.9V halfes Pdig

Need up to 2 x 2A at 1.2V and 2 x 2A at 0.9V per double module

Þ Two buck converters (1 x 1.2V, 1 x 0.9V) per double module- Currents at 0.9V too large for switched capacitors- Linear regulator for 0.9V: efficiency = 0.75%

Link Power Requirements


• Power per GBT link: 2W• Power per pixel (50% usage of bandwidth): 150µW• 1 GBT per double module for trigger data: 2W• Separate GBT links for readout

• GBTIA, GB Laser Driver: 280mA at 2.5V• GBTX: 1.0A at 1.5V

Various options:1) One buck (1.5V) plus one step-up switched capacitor conv. (2.5V) per GBT2) As 1), but 1.5V buck converter delivers in addition Vana to module (25% more P)

3) Two buck converters (1.5V, 2.5V) per 1-3 GBT(s)

P. Moreira, GBTX SPECIFICATIONS V1.2

Requirements for CMS Stacked Layers


Quantity Requirement CommentsRadiation level Fast hadron fluence: ~9x1015/cm2;

Dose: ~1.3MGyFor R > 20cm, z < 3m, 5000fb-1, safety factor of 2

Output voltage Vana = 1.2VVdig = 0.9V

Assuming 130 or 90nm(+ Vopto = 2.5V, 1.5V)

Output current 3-5A 2 converters per double module

Conversion ratio Up to 10:1, depends on proposal Max. current in cable channels 15kAAssuming ~100kW & 80% efficiency

Efficiency 70-80% Losses need to be cooled

Conductive noise(DM, ripple)

Depends on PSRR of the ROC (still to be studied);but fs well below (or ideally above) system susceptibilty, i.e. ~ 1MHz

Can be filtered

Common mode noise ? As low as possible... Notoriously hard to control

Radiated noise(magnetic near field)

Ideally none Minimize with distance, shielding, module design

Material budget Critical since installed at low R Expect 1-2g per converter

Real estate No space on FE-hybrid 2-4cm2 per converter must be found

Prototypes: AC_AMIS2 and AC2


Chip: AMIS2 by CERN (QFN48)VIN = 3 - 12VIOUT < 3AVOUT = 1.2V (also 2.5V)fS ≈ 1.3MHz (V1) or programmable (V2)

Input and output π-filtersL = 12.1nH, C = 22µF

25mm

19m

m

Air-core toroid (both converters): 6mm, height = 7mm, L = 600nH, RDC = 80mΩ

19mm

12mm

m = 1.1g Chip: Enpirion EQ5382DVin = 2.4-5.5V(rec.)/7.0V(max.)Iout 0.8Afs 4MHz

Standard filters (C1||C2)

Power Efficiency Pout/Pin


Enpirion chip, Vout = 1.3V

• Efficiency drops with conversion ratio and current• Efficiency not yet sufficient• Ohmic losses in transistor, wire bonds, PCB, coil; switching losses etc.• Improvements possible, but need to be careful not to add more material...

AMIS2, Vout = 1.2V, fs = 1.3MHz

Noise


• Noise of prototypes has been studied in system test with current strip modules

Þ Noise increases with conversion ratio Þ Noise increases for lower switching frequency (as required for efficiency)• Further R&D required to make noise emissions compatible with trigger layers

1 1( ) outin out

in

VI V V

V fs L -

1 1U I ESR Ifs C

• AMIS2 (QFN32) with input & output pi-filter: 25mm x 18mm... but LDO for 3.3V and some passives will vanish • Enpirion converter: 19mm x 12mm ... but pi-filter at output desirable• Height ~ 10mm, dominated by inductor (to be optimized)

Þ Final size will be inbetweenÞ Will be hard to squeeze below 2cm2 without compromising performanceÞ Trade-off between redundancy and size (e.g. input pi-filter)

If two converters (1.2V/0.9V) needed per double module:• can of course be installed on one PCB• size increases by a factor of 1.5

Space Requirements


25mm

18m

m

Space Requirements


80mm

26mm

Enpirion converter, to scale

pT-module by Geoff Hall et al.

pT-module by Sandro Marchioro

A Possible Implementation


Converters could be integrated into support structure: no space on hybrid required height/shape of coil no issue larger distance less magnetic field easier shielding (e.g. by existing Carbon Fibre structures) much easier cooling Kapton bus between converter and modules - needed anyway: GBT, by-pass caps decoupling of module & converter R&D, QA etc. straight-forward in double-stack proposal (less obvious in others)

20cm

Per 100cm2 double-module:1 GBT 1 DC-DC a 1.2V for module power1 DC-DC a 0.9V for module power1 DC-DC a 1.5V for GBT1 DC-DC a 2.5V for GBT

Þ 2 PCBs a 4cm2 ~ ok

100cm2 1 PCB

1 PCB

A lot of space inside – is it usable?

Marvin Johnson, CMS Upgrade WS, 2009

CMS Outer Tracker UpgradeThe classical application


Upgrade of the CMS Tracker for SLHC 28

Outer Tracker Upgrade

Katja Klein

• Some proposals combine a minimalistic trigger configuration with a “classical“ outer strip tracker

• Successor of APV25, the CMS Binary Chip (CBC), foreseen as readout ASIC (under development)

• 1 CBC (128 channels) needs P = 64mW (for 1.2V supply voltage)

Two stacked trigger layersR = 25cm & 35cm27m2 active area12kW FE-power (0.1mW/pixel)

Tracking layers2.5/5.0cm strips85m2 active area10kW FE-power(0.5mW/strip)double-sided

single-sided

z [cm]

R [c

m]

Pixel

DC-DC Converters for Outer Tracker


• Power requirements: only 1.5W per module• Idea: use 1.2V buck converter (requ. conv. ratio ~ 4)

plus maybe on-chip charge pump (currents are low)• Space is again tight – various ideas:

- move into 3rd dimension- integrate into support structure

• Tests have to wait for CBC and module prototypes

Top Bottom

sensor

CBC

cooling block TPG stripshybrid

DC-DC converter

Summary


• Earliest and best understood application: pixel detector at “phase-1“• Some noise tolerable, due to on-chip regulators• Space and mass not so critical ( 4)

• Most demanding and most speculative application: stacked layers for trigger • Large currents at high conversion ratio with high efficiency required• No space available and material budget very critical

• Converters for trigger layers probably also fine for Outer Tracker layers• On-chip charge pump is an option to be explored • After Chamonix workshop upgrade plans need to be refined, but R&D on

DC-DC conversion will for sure stay on the agenda

Back-up Slides


AC_AMIS2 Schematics


W. Karpinski, I. Özen (RWTH Aachen)

On-Chip Common Mode Subtraction• 128 APV inverter stages powered from 2.5V via common resistor (historical reasons)

Þ mean common mode (CM) of all 128 channels is effectively subtracted on-chip • Works fine for regular channels which see mean CM• CM appears on open channels which see less CM than regular channels• CM imperfectly subtracted for channels with increased noise, i.e. edge channels


inverter

V125V250

VSS

V250R (external)

vIN+vCM

vCM

vOUT = -vIN

Node is common to all 128 inverters in chip

pre-amplifier

strip

V125

V250

VSS=GND

APV25 pre-amplifier

[Mark Raymond]

Katja Klein DC-DC Conversion for CMS Tracker Upgrade 34

Module Edge Strips

bias ring

[Hybrid]

strip

• Edge strips are capacitively coupled to bias ring• Bias ring is AC coupled to ground• Pre-amplifier is referenced to 1.25V• If V125 is noisy, pre-amp reference voltage

fluctuates against input• This leads to increased noise on edge channels

Material Budget (MB)


Motivation for new powering schemes is to save material inside the tracker

ChipC‘s & R‘s ToroidCopper layersConnectorFR4 of PCB

Without DC-DCWith DC-DC- 30.9%

MB of electronics & cables

• Detailed study of Enpirion-converter, 1 per Tracker End Cap module, located on FE-hybrid• Assumptions: 80% efficiency, r = 8, Iout = 2A per module, Uout = 1.2V• Simulation of current tracker layout with CMS software based on GEANT4

Þ Converter adds 10% of strip module, but still saves 30% in electronics & cables MB of End Cap buck converters

Date post:	26-Feb-2016
Category:	Documents
Upload:	vevina
View:	38 times
Download:	0 times

Implementation of DC-DC Converters into the CMS Tracker at Super-LHC

Documents