Imprint lithography for integrated circuit fabricationD. J. Resnick,a) W. J. Dauksher, D. Mancini, and K. J. NordquistPhysical Sciences Research Laboratories, Motorola Labs, Tempe, Arizona 85284
T. C. Bailey, S. Johnson, N. Stacey, J. G. Ekerdt, and C. G. WillsonTexas Materials Institute, University of Texas at Austin, Austin, Texas 78712
S. V. Sreenivasan and N. SchumakerMolecular Imprints, Austin, Texas 78712
~Received 24 June 2003; accepted 18 August 2003; published 4 December 2003!
In the fields of micro- and nanolithography, major avancements in resolution have historically been achiethrough use of shorter wavelengths of light. Using phashift mask technology, it has already been demonstrated193 nm photolithography can produce sub-100 nm featuAlong this path, such improvements come with an evincreasing cost for photolithographic tools. As conventioprojection lithography reaches its limits, Next generationthography~NGL! tools may provide a means to further patern shrinks, but are expected to have price tag that ishibitive for many companies.
The development of both light sources and optics to sport the sources are primarily responsible for the rise incost of an NGL tool. 157 nm lithography, for example, rquires the use of CaF2 as a lens material. In the caseextreme ultraviolet lithography, no source with sufficient oput has yet been identified that will meet the industrthroughput requirements.
Imprint lithography is essentially a micromolding procein which the topography of a template defines the pattecreated on a substrate. Investigations by this group anders in the sub-50 nm regime indicate that imprint lithograpresolution is only limited by the resolution of the templafabrication process. It possesses important advantagesphotolithography and other NGL techniques since it doesrequire expensive projection optics, advanced illuminatsources, or specialized resist materials that are central totolithography and NGL technologies.1 There are three basi
2624 J. Vac. Sci. Technol. B 21 „6…, Nov ÕDec 2003 1071-1023Õ200
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approaches to imprint lithography. Each technique ispicted in Fig. 1 and is briefly described below.
Soft lithography generally refers to the process of traferring a self-assembled monolayer using a flexible temp@see Fig. 1~a!#. Whitesideset al.2 have formed a template bapplying a liquid precursor to polydimethylsiloxane overmaster mask produced using either electron beam or oplithography. The liquid is cured, and the particle desorptmass spectrometry~PDMS! solid is peeled away from theoriginal mask. The PDMS template can then be coated wa thiol solution, which is subsequently transferred to a sstrate, coated with a thin layer of gold. To prevent adhesbetween the master and daughter masks, the master surfapassivated by the gas phase deposition of a long-chainorinated alkylchlorosilane@CF3(CF2)6(CH2)2SiCl3#.
Because the PDMS is easily deformable, the technolis not well suited for devices requiring precise pattern plament. Nanoimprint lithography~NIL !, developed by Chouet al.3 uses a solid mold, such as silicon or nickel. The iprint process is accomplished by heating a resist aboveglass transition temperature and imparting a relatively laforce to transfer the image into the heated resist@see Fig.1~b!#. Features as small as 10 nm have been imaged uNIL. In addition, a variety of different devices have beefabricated by a number of different researchers usingapproach. The elevated temperatures and pressures nefor this approach may limit its use for applications requiritight overlay, however.
Devices that require several lithography steps and preoverlay will need an imprinting process capable of addreing registration issues. A derivative of NIL, ultraviole
2625 Resnick et al. : Imprint lithography for IC fabrication 2625
nanoimprint lithography~or UV-NIL ! addresses the issue oalignment by using a transparent template, thereby faciliing conventional overlay techniques@see Fig. 1~c!#. In addi-tion, the imprint process is performed at low pressures anroom temperature, which minimizes magnification and dtortion errors. Two types of approaches are being considefor UV-NIL. The first method uses conventional spin-otechniques to coat a wafer with a UV curable resist.4 Al-though it is possible to uniformly coat the wafer, there aconcerns that the viscosity of the resist will be too highfacilitate the formation of very thin residual layers. If thresidual layer is too thick, the critical dimension~CD! uni-formity may suffer as a result of the subsequent pattern trafer process. This problem is addressed by locally dispena low viscosity resist in a single stepper field. This secoapproach was first disclosed by Colburnet al.5 in 1999 and isgenerally referred to as step and flash imprint lithographyS-FIL.
S-FIL appears to be the most suitable imprint techniqfor fulfilling the stringent requirements of silicon integratecircuit ~IC! fabrication. The purpose of this article is to summarize the progress made in S-FIL. Because a tool, a tplate, and a resist are necessary for the fabrication proceach of these subjects is discussed in detail. Followingdiscussion, open issues, such as defects and overlay, arplored.
II. STEP AND FLASH IMPRINT LITHOGRAPHYTOOL
Imprint lithography relies on the parallel orientationimprint template and substrate. Inaccurate orientation myield a layer of cured etch barrier that is nonuniform acrothe imprint field. Thus, it is necessary to develop a mechacal system whereby template and substrate are broughtcoparallelism during etch barrier exposure. This was ornally achieved in S-FIL by way of a two-step orientatioscheme. In step one, the template stage and wafer chucbrought into course parallelism via micrometer actuatiThe second step uses a passive flexure-based mechanismtakes over during actual imprint.6,7
FIG. 1. Fabrication sequence for three different varieties of imprint lithraphy.
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The step and repeat system was built at the UniversityTexas in Austin by modifying a 248 nm Ultratech steppthat was donated by IBM@see Fig. 2~a!#. Key system at-tributes include a microresolutionz stage that controls theimprint force, an automatedx–y stage for step and repeapositioning, a precalibration stage that enables parallel alment between the template and substrate, a fine-orientaflexure stage that provides a highly accurate automaticallel alignment of the template and wafer, an exposure southat is used to cure the etch barrier, and an automateddelivery system that accurately dispenses known amountthe liquid etch barrier.
A commercialized version of an S-FIL tool is now avaable from Molecular Imprints Inc.~MII !. It is interesting tonote that although nanoimprint lithography is still in thearly stages of development, there are several vendorsare now offering imprint tools. In addition to Molecular Imprints, EVGroup~Austria!, Nanonex~U.S.!, Obducat~Swe-den!, and Suss Microtec~Germany! have systems ready fopurchase. This is quite different from previous NGL devopment efforts in which a vendor only becomes interestedbuilding a system after the technology matures to somegree.
Although the Imprio 100 from MII is a substantial improvement relative to the first University tool, it has neiththe throughput nor the overlay specifications necessarysilicon IC fabrication. Instead, the system was primarily dsigned and manufactured to address the compound semductor and photonics markets. These markets require hresolution features but are typically less sensitive to defeThey also operate at low volumes of wafers and are hemore sensitive to costs; particularly tool costs. The tool hathroughput capacity of approximately six 200 mm wafers phour. As a result, it will be possible to collect enough stattical information of performance characteristics of S-FILallow the design of a fully engineered high volummanufacturing tool in the future.
The Imprio 100 was developed in partnership with sevekey original equipment manufacturer suppliers for the statechnology, the UV source, and the control architecture. Textremely complicated and costly imaging optics, sourand step and scan mechanical systems associated with
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FIG. 2. ~a! First step and repeat UV-based nanoimprint tool.~b! The Imprio100, from Molecular Imprints, Inc. The system is designed to pattern waas large as 200 mm in diameter.
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2626 Resnick et al. : Imprint lithography for IC fabrication 2626
NGL techniques are not required in S-FIL technology. Itessentially a precise mechanical system with specialfluid mechanics subsystems and a mercury arc lamp asource. Therefore, it is a much simpler system with signcantly smaller footprint, and its cost structure has the pottial to be an order of magnitude lower than high-end lithoraphy tools.
Of particular interest is the resist delivery system, whincorporates a microsolenoid nozzle capable of dispendrops less than 5 nl in volume. This type of control is esstial for the control of the residual layer formed during thimprint process. When integrated with a well designed flure stage and wafer chuck it is possible to print an ebarrier with residual layers well under 100 nm. Figure 3~a!depicts the data for residual layer uniformity in a single dIn this case, a mean thickness of 70 nm was achieved, w30 nm 3s variation.
III. STEP AND FLASH IMPRINT LITHOGRAPHYS-FIL TEMPLATE
Early template fabrication schemes started with a 636 in.30.25 in. conventional photomask plate and usedtablished Cr and phase shift etch processes to define feain the glass substrate.8 Although sub-100 nm geometriewere demonstrated, CD losses during the etching of the tCr layer etch make the fabrication scheme impractical fortemplates. It is not unusual, for example, to see etch biasehigh as 100 nm.9
More recently, two methods have been employed to fricate templates.10,11 The first method uses a much thinn~15 nm! layer of Cr as a hard mask. Thinner layers s
FIG. 3. Residual layer thickness and uniformity in a printed die.
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suppress charging during the electron-beam exposure otemplate, and have the advantage that CD losses encounduring the pattern transfer through the Cr are minimizBecause the etch selectivity of glass to Cr is better than 1in a fluorine-based process, a sub-20 nm Cr layer is asufficient as a hard mask during the etching of the glsubstrate. The second fabrication scheme attempts to adsome of the weaknesses associated with a solid glassstrate. Because there is no conductive layer on the final tplate, scanning electron microscopy~SEM! and defect in-spection are compromised. By incorporating a conductand transparent layer of indium tin oxide~ITO! on the glasssubstrate, charging is suppressed during inspection, andtransparent nature of the final template is not affected. Texperimental details of the processes have been covereprevious publications.11,12
The Cr-based template pattern transfer process consof an exposure in a Leica VB6 and development of the ZE520 positive resist, followed by an oxygen descum, Cr etresist strip, quartz etch, and a Cr wet etch. It is interestingnote that it was necessary to remove the resist prior toquartz etch. If left in place during the CHF3-based quartzetch, the amount of polymer deposited during the etch pcess is substantial enough to impact the fidelity of the qufeatures. Additional amounts of oxygen may be necessarminimize polymer formation. The process sequence fornm features is depicted in Fig. 4.
Widespread use of imprint lithography will require ththe template be both inspectable and repairable. For apptions requiring sub-100 nm lithography, it will likely becomnecessary to inspect the templates using electron beamthis is the case, the template will need a charge reduclayer to dissipate charge during the inspection processfabrication scheme that incorporates a transparent conding oxide, such as ITO, into the final template addressesproblem. A thin layer of plasma enhanced chemical vadeposition~PECVD! oxide is deposited over the ITO andefines the thickness of the imprinted resist layer. Featuare formed on the template by patterning an electron-beresist, transferring the pattern via reactive etching intooxide, and stripping the resist.
The ITO must have sufficient conductivity to avoid charing effects first during resist exposure and later during teplate inspection. The resistivity of the as-deposited ITO fiis on the order of 2.03106 ohm/sq. The resistivity decreasesubstantially, however, after the films are annealed at a tperature of 300 °C. In its annealed state, the ITO film res
FIG. 4. Template pattern transfer sequence for 30 nm features.
2627 Resnick et al. : Imprint lithography for IC fabrication 2627
FIG. 5. 100, 60, 30, and 20 nm features defined using the ITO-based process.
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tivity is about 3.53102 ohms/sq. Charge dissipation durinelectron-beam writing and SEM inspection is realized at tconductivity level. The ITO must be also be very transparat the actinic wavelength used during the S-FIL exposprocess~365 nm!. It is possible to achieve transmission weabove 90% at 365 nm.13 The ITO has the additional attributof performing as an excellent etch stop during the patttransfer of the PECVD oxide layer. Examples of final teplate features formed using this process are shown in Fig
An even simpler way to make a template is to useelectron-beam sensitive flowable oxide, such as hydrosilsequioxane~HSQ!. While the primary use of HSQ is aslow-k dielectric, several investigators have demonstratedusefulness as a high-resolution electron-beam resist. Incured state, HSQ becomes a durable oxide making it a vconvenient material for direct patterning of S-FIL templarelief structures. Processing of HSQ as an electron-beamsist is less complicated since it is not chemically amplifieand can be developed in the standard tetramethyl ammonhydroxide-based developers used commonly for convtional resists. All that is required to make a template iscoat and bake the HSQ directly on the ITO layer, and thexpose and develop the HSQ.14
It is interesting to note that the methods described insection can also be used sequentially to form multilastructures that can be used to fabricate devices sucT-gates or optical grating couplers.15 SEM pictures depictingtwo-tiered and three-tiered structures are shown in FigFigures 6~a! and 6~b! are tiered structures produced usialternating layers of ITO and PECVD oxide. Figure 6~c! wasproduced by patterning a bottom oxide film and subsequecoating, exposing, and developing an HSQ layer.
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The final step in the template fabrication process istreatment designed to lower the surface free energy. Alktrichlorosilanes form strong covalent bonds with the surfaof fused silica, or SiO2 . In the presence of surface watethey react to form silanol intermediates that undergo a cdensation reaction with surface hydroxyl groups, and adcent silanols to form a networked siloxane monolayer. Whthis functional group is synthetically attached to a long florinated aliphatic chain, a bifunctional molecule suitable atemplate release film, is created. The silane terminatedbonds itself to the surface of a template, providing the dubility necessary for repeated imprints. The fluorinated chawith its tendency to orient itself away from the surfacforms a tightly packed comblike structure and provideslow-energy release surface. Annealing further enhancescondensation creating a highly networked, durable, low sface energy coating.
IV. RESIST
The resist stack typically consists of a silicon containietch barrier over an antireflective coating~also referred to asthe transfer layer!. The etch barrier is patterned via the imprint process. The subsequent pattern transfer processvolves an etch of the remaining residual layer~;100 nm inthickness!, followed by an anisotropic etch of the transflayer.
The etch barrier material is subject to several design cstraints. The etch barrier liquid must be dispensable fromautomatic fluid dispense system, and must not changenificantly in composition between dispensing and imprintiby, e.g., component evaporation. It must be readily displa
FIG. 6. Multitiered structures formed by iterating the fabrication process.
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2628 Resnick et al. : Imprint lithography for IC fabrication 2628
FIG. 7. Printed features in the acrylate-based etch barrier.~a! Top-down SEMs.~b! Cross-sectional images of both single tier and multitiered features
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during the imprint step and photopolymerize rapidly duriexposure. Shrinkage due to polymerization must be ctrolled. The polymer must release from the template whadhering to the transfer layer, and it must exhibit sufficierigidity to avoid feature collapse. It must exhibit some levof temperature stability to withstand the etching tempetures, and it must exhibit sufficient etch selectivity during tO2 reactive ion etching step to allow for high aspect ratiosbe generated in the transfer layer.
The S-FIL process relies on photopolymerization of a lviscosity acrylate-based solution. Acrylate polymerizationknown to be accompanied by volumetric shrinkage that isresult of chemical bond formation. Consequently, the sshape, and placement of the replicated features may befected. Volumetric shrinkage was found to be less than 1~v/v! in most cases.16
The current etch barrier liquid is a multicomponent sotion that has been previously been described in detail.16 Thesilylated monomer provides etch resistance in the O2 transferetch. Crosslinker monomers provide thermal stability tocured etch barrier and also improve the cohesive strengtthe etch barrier. Organic monomers serve as mass-persicomponents and lower the viscosity of the etch barrier fmulation. The photoinitiators dissociate to form radicaupon UV irradiation, and these radicals initiate polymeriztion.
SEMs of this etch barrier are shown in Fig. 7~a! 20 nmfeatures have been resolved with both types of templdescribed earlier. Cross sectional images are shown in7~b!. The profiles closely replicate the relief image in ttemplate for both single and multitiered structures. CD uformity studies have also been performed. In one study838 array of features were defined on a template. The tplate was then used to print a die on a wafer. The CD vation was measured using a Hitachi 7800 CD-SEM for bthe template and the etch barrier. The results for 30 nm
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tures are shown in Fig. 8. As expected, there is only a smadditional variance in the CD caused by the printiprocess.17
Prior to etching the underlying transfer layer, it is necesary to remove the residual etch barrier material formed ding the imprint process. Because the silicon content is at le12%, best selectivity between the etch barrier and the trafer layer is achieved by using a combination of CF4 andoxygen. Once the transfer layer is exposed, the gas chemis comprised only of O2 . Recent studies indicate that seletivities greater than 6:1 may be possible for both etchFigure 9 shows the pattern transfer sequence. More detaithis process can be found in a previous publication.18
It is interesting to note that the presence of oxygen dsolved in the etch barrier and in the ambient environmcauses two undesirable effects on the curing of the acryetch barrier. Oxygen dissolved in the etch barrier consumphotoinitiated radicals, resulting in an inhibition period bfore polymerization begins. Furthermore, oxygen diffusiinto the etch barrier limits the curing reaction around tperimeter of the template. While it may be possiblemodify the ambient, other chemistries, such as vinyl eth
FIG. 8. CD variation plots of 30 nm features for both the template andetch barrier. The 3s values for the template and the printed field are 4.5 nand 4.4 nm, respectively.
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2629 Resnick et al. : Imprint lithography for IC fabrication 2629
FIG. 9. Pattern transfer sequence showing the etch barrier over the transfer layer, the residual layer etch, and the etch of the transfer lay
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may be more suitable for the imprint process.18 This ap-proach eliminates the oxygen inhibition effect and may afurther reduce the viscosity of the etch barrier, thereby fther reducing the residual layer formed during the imprprocess.
V. ISSUES
Several other issues need to be addressed before Scan be considered as a viable technology for silicon IC frication. The two biggest issues are defects and overlay.cause imprint lithography is a ‘‘contact’’ lithography, theare concerns associated with defects generated duringprocess. As a 1X technology, there are also concerns relato template to wafer alignment. Each of these topics is dcussed below.
A. Defects
The low surface energy monolayer applied to the tempacts effectively as a self-cleaning agent. This attributebeen reported in several publications.5,8 A dirty template wasused to imprint several die on a silicon wafer. The progrsion of pictures indicated that defects that start on the tplate embed themselves in the etch barrier, and by theenth imprint, there were no detectable particles. It is ainteresting to note that there does not appear to be anyradation of the release layer over time. Contact angles msurements show no change after more than two months5
While the data clearly illustrate a self-cleaning effect, this not sufficient evidence to prove that defects are not adafter many imprints. A more convincing study involves prining wafers, and having the defects tracked using an insption tool. To this end, a study of imprinted wafers was coducted on a KLA-Tencor 2139 wafer inspection toolcollaboration with KLA-Tencor.18 Initial inspection of 96consecutive imprints shows relatively high levels of detecdefects, but no significant upward trend in defects over timas shown in Fig. 10~a!. Although the data are noisy and thnumber of defects is relatively large, there does not appeabe an increase in defects. Statistical analysis of these datbeen performed. Figure 10~b! depicts the relationship between the number of defects added per imprint and the nber of imprints. As the size of the data set increases, thea change in the data that shifts the slope and its confidedownward to capture zero.
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A more recent study examined the surface of a 320mm2
imprinted field containing 30 nm, 40 nm, and 50 nm linwith varying pitches. The results for the 50 nm featuresshown in Fig. 11. Scanning electron micrographs depictfield after imprint numbers 1, 169, and 300. The resultsnominally the same for each picture: The 50 nm lines remintact, and no defects are visible in the field of view.
B. Image placement and overlay
Two concerns are worth addressing.~1! Does the templatefabrication process result in image placement errors that cnot be removed using conventional correction techniq
FIG. 10. ~a! Defect levels vs imprint number.~b! Number of defects addedper imprint as a function of imprint number.
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2630 Resnick et al. : Imprint lithography for IC fabrication 2630
such scale and orthoganality corrections?~2! If image place-ment is good, can the imprint tool align and make the crections necessary to meet the stringent requirements forcon processing?
To examine image placement, a 6025 photoplate wasterned over a 5 in.35 in. area with alignment marks. Imagplacement was measured using a Leica LMS 2020 du
FIG. 11. Imprinted field containing 50 nm lines with varying pitches. Scaning electron micrographs depict the field after imprint number 1, 169,300. The results are nominally the same for each picture: the 50 nmremain intact, and no defects are visible in the field of view.
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each step of the Cr/Quartz template fabrication processscribed in a previous publication.10 The resultant imageplacement errors has a maximum error of approximatelynm. This error can be attributed to the stress of the chromfilm. The image placement errors experimentally observagree very well with finite element models.19
To determine what type of overlay error would result frothe patterning process, a second plate was written, usinopposite tone resist. The center 1 in.31 in. ~a typical fieldsize! areas of both plates were then compared. The resafter correcting for scale and orthoganality are shown in F12~a!.20 The displacement vectors are typically less thannm and are randomly directed, indicating that the error vtors are mostly limited to the sensitivity of the LMS 2020
The issue of overlay comes down to the capabilities ofimaging system and the method used for imprinting. BecaS-FIL is a room-temperature and low-pressure~<1 psi! pro-cess, the real concern becomes the ability of the tool to olay different mask levels. Tool capability has two major components: The first is related to the alignment method aalignment optics. The second is the ability to correctdistortion errors such as magnification and orthoganality.
The current method of alignment on the Imprio 100 takadvantage of the transparent template, and a through theplate alignment system is used to align marks on bothwafer and template. This type of system may actuallyadvantageous relative to reduction systems, since distorerrors from the lens elements are eliminated. It is importto note the differences between alignment in an S-FIL tosuch as the Imprio 100 and a typical contact aligner. Fialignment in the S-FIL tool is performed for each dithereby minimizing runout errors. Second, alignment adjuments can be made with the template and wafer in contAcross most of the die, the template and substrate are aally separated by the liquid etch barrier. In the area ofalignment mark, however, there is no etch barrier. Thisimportant distinction, since the etch barrier and the tempare closely index matched. If the etch barrier was allowedthe alignment mark area, it would not be possible to imathe mark. Alignment adjustments are possible in this schebecause the etch barrier is still a liquid. It should bestraightforward task, therefore, to align within a few hundrnanometers. An example of an aligned template and wafeshown in Fig. 12~b!.
The real challenge, then, is to be able to correct for dtortion between the template and wafer. One possible waaccomplish this is to set a series of piezos around the tplate. To date, modeling21 and preliminary experiments suggest that the use of a template whose thickness is substially larger than the depth of the etched features allowsmagnification corrections that are independent of the featuetched into the template. Also, very uniform strain fields cbe obtained using mechanical means. Experimental verifition of these magnification systems as part of a compimprinting step and repeat tool still remains to be done.
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2631 Resnick et al. : Imprint lithography for IC fabrication 2631
VI. CONCLUSIONS
NIL has come a long way in a very short period of timResolution seems limited to the ability to form a relief imain the template and sub-10 nm printing has already bdemonstrated. To be considered as a method for fabricasilicon ICs, several concerns still need to be addressed.NIL, and in particular S-FIL, seem the best imprinting optifor meeting the stringent requirements of future generatiof silicon-based circuitry. Tools, templates, and resistsreadily available to start exercising the technology and wbe used to answer the open issues, such as defectivityoverlay. If these issues can be solved, imprint lithograpmay be the right NGL, since extendibility to at least 10 nseems viable. The last consideration, then becomes theporting infrastructure. Reduction lithography has been inmainstream now for over 20 years, and the ability to wrinspect, and correct a IX template will need to be developElectron-based inspection and repair tools, as well as faGaussian-based electron-beam writing systems may prothe pathway for template fabrication in the future.
FIG. 12. ~a! Distortion map comparing the center 1 in.31 in. areas from twodifferent templates.~b! An example of aligned verniers for the S-FIL overlaprocess.
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ACKNOWLEDGMENTS
The authors gratefully acknowledge Phil Schumaker,McMackin, Kathy Gehoski, Jeff Baker, Eric Ainley, StevSmith, Dolph Rios, Eric Newlin, and David Standfast ftheir process help. They would also like to thank Annie Dinmore, Lyndi Noetzel, Lester Casoose, Kathy Palmer, DiaConvey, Andy Hooper, and Yi Wei for their characterizatiowork. The authors are also grateful for contributions froStephen Chou and George Whitesides. Finally, they thLaura Siragusa and Sal Mastroianni for their support. Twork was partially funded by DARPA~N66001-98-1-8914,N66001-01-1-8964, and N66001-02-C-8011! and SRC~96-LC-460!.
1S. V. Sreenivasan, C. G. Willson, N. E. Schumaker, and D. J. ResnProc. SPIE4688, 903 ~2002!.
2Y. Xia and G. M. Whitesides, Angew. Chem., Int. Ed. Engl.37, 550~1998!.
3S. Y. Chou, P. R. Krauss, and P. J. Renstrom, J. Vac. Sci. Technol. B14,4129 ~1996!.
4M. Otto, M. Bender, B. Hadam, B. Spangenberg, and H. Kurz, Micelectron. Eng.57, 361 ~2001!.
5M. Colburn, S. Johnson, M. Stewart, S. Damle, T. Bailey, B. Choi,Wedlake, T. Michaelson, S. V. Sreenivasan, J. Ekerdt, and C. G. WillsProc. SPIE 379~1999!.
6B. J. Choi et al., ASME DETC2000/MECH 14145, Baltimore, MD2000.
7B. J. Choiet al., Proceedings of the ASPE 1999 Annual Meeting~1999!.8M. Colburn, T. Bailey, B. J. Choi, J. G. Ekerdt, and S. V. SreenivasSemicond. Sci. Technol.67, ~2001!.
9K. H. Smith, J. R. Wasson, P. J. S. Mangat, W. J. Dauksher, and DResnick, J. Vac. Sci. Technol. B19, 2906~2001!.
10D. J. Resnick, W. J. Dauksher, D. Mancini, K. J. Nordquist, E. Ainley,Gehoski, J. H. Baker, T. C. Bailey, B. J. Choi, S. Johnson, S.Sreenivasan, J. G. Ekerdt, and C. G. Willson, Proc. SPIE4688, 205~2002!.
11T. C. Bailey, D. J. Resnick, D. Mancini, K. J. Nordquist, W. J. DaukshE. Ainley, A. Talin, K. Gehoski, J. H. Baker, B. J. Choi, S. Johnson,Colburn, S. V. Sreenivasan, J. G. Ekerdt, and C. G. Willson, Microeltron. Eng.61, 461 ~2002!.
12W. J. Dauksher, K. J. Nordquist, D. Mancini, D. J. Resnick, J. H. BakA. E. Hooper, A. A. Talin, T. C. Bailey, A. M. Lemonds, S. VSreenivasan, J. G. Ekerdt, and C. G. Willson, J. Vac. Sci. Technol. B20,2857 ~2002!.
13A. E. Hooper, A. A. Talin, D. J. Resnick, J. H. Baker, D. Convey,Eschrich, H. G. Tompkins, and W. J. Dauksher, Proc. Nanotech 2003
14D. P. Mancini, K. A. Gehoski, K. J. Nordquist, D. J. Resnick, T. C. BaileS. V. Sreenivasan, J. G. Ekerdt, and C. G. Willson, J. Vac. Sci. Techno20, 2896~2002!.
15S. Johnson, D. J. Resnick, D. Mancini, K. J. Nordquist, W. J. DauksK. Gehoski, J. H. Baker, L. Dues, A. Hooper, T. C. Bailey, S.Sreenivasan, J. G. Ekerdt, and C. G. Willson, Microelectron. Eng.67, 228~2003!.
16M. Colburn, I. Suez, B. J. Choi, M. Meissl, T. Bailey, S. V. SreenivasaJ. G. Ekerdt, and C. G. Willson, J. Vac. Sci. Technol. B19, 2685~2001!.
17D. P. Mancini, K. A. Gehoski, W. J. Dauksher, K. J. Nordquist, D.Resnick, S. C. Johnson, T. C. Bailey, S. V. Sreenivasan, J. G. Ekerdt,C. G. Willson, Proc. SPIE5037, 187 ~2003!.
18S. C. Johnson, T. C. Bailey, M. D. Dickey, B. J. Smith, E. K. Kim, A.Jamieson, N. A. Stacey, J. G. Ekerdt, C. G. Willson, D. P. Mancini, WDauksher, K. J. Nordquist, and D. J. Resnick, Proc. SPIE5037, 197~2003!.
19C. J. Martin, R. L. Engelstad, E. G. Lovell, D. J. Resnick, and E.Weisbrod, J. Vac. Sci. Technol. B20, 2891~2002!.
20K. J. Nordquist, D. P. Mancini, W. J. Dauksher, E. S. Ainley, K. AGehoski, D. J. Resnick, Z. S. Masnyj, and P. J. Mangat, Proc. SPIE4889,1143 ~2002!.
21D. L. White and O. R. Wood, J. Vac. Sci. Technol. B18, 3552~2000!.
