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INF4420 - Forsiden · Course content From the course webpage: "The course provides the know-how and...

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INF4420 Introduction Jørgen Andreas Michaelsen ([email protected]) Spring 2012
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INF4420Introduction

Jørgen Andreas Michaelsen ([email protected])Spring 2012

OutlinePractical information about the course. Context (placing what we will learn in a larger context) Outline of the curriculum.

Lectures Jørgen Andreas MichaelsenRoom: 5405, Phone: 22840840Email: [email protected] Lectures on mondays in OJD 2453, Perl

Problem solving class Kin Keung Lee (Kody)Room: 5122, Phone: 22840136Email: [email protected] Assignments for each week (not mandatory)Fridays in OJD 2465, Prolog

Labs Weekly labs to learn design tools Details are not yet available ...

WebpageCourse webpage:http://www.uio.no/studier/emner/matnat/ifi/INF4420/v12/

important mesages will be posted on the course webpage. Slides for the lectures and assigments for the problem solving class are posted.

Teaching and examinationLectures (2-3 hours)Problem solving class (2 hours)Lab exercises (2 hours) 4 hour written exam (60 %)Project (design, layout, 40 %)

Course contentFrom the course webpage: "The course provides the know-how and skills needed to design analogue and mixed-signal integrated circuit modules using modern program tools. The main focus of the course is complex systems such as data converters (A/D, D/A) and phase-locked loops (PLL). An introduction is given to CMOS technology and methods in order to implement passive components such as transistors, condensers and coils. In addition, matching, optimisation and noise deflection are all key aspects. The execution of project tasks will be a central part of the teaching."

Learning outcomesFrom the course webpage: "Students will have the skills needed to design an integrated mixed-signal circuit in CMOS using modern design tools."

Student reference group1 or 2 students

What is expected of you?Basic understanding of analog CMOS (INF3410). We will build on this for most of the circuits and systems we discuss. Linear circuits (transfer functions, Laplace). Important to ask questions.

Integrated circuitsIntegrated circuits are found everywhere in our daily lives. Cost is a driver. Reduced feature size, smaller dies, CPF decreases, more features on the same die (SoC). Larger wafers. Reduced feature size also helps performance. Is scaling good for analog?

Mixed-signal in DSMDigital content dominate. Process development is geared towards reducing cost-per-function (CPF). Analog and RF functions have to keep up (cost benefits of placing all functions on one die)

Mixed-signal circuits

Analog + Digital? Time/Value Discrete Continuous

Discrete Digital ?Continuous ? Analog

What are mixed-signal circuits?

Why mixed-signal circuits?Digital circuits are more robust and can be designed more systematically. Usually, most of the system and signal processing will be digital content. We need circuits for regulating supply voltage, clocking digital circuits, interfacing with the (analog) world (filtering and converting to/from digital), communication circuits.

Uses of mixed-signal Analog and mixed-signal circuits are prevalent even in "digital" systems ● clocking and timing circuits● digital i/o (high speed bus)● supply voltage regulation● wireless communication● sensor interfacing● ...

Mixed-signal in DSMNew ideas and different designs are needed to keep up with new process technology, and new trends (e.g. portable applications). Important to have a good understanding of analog and mixed-signal circuits. Know what the limitations are and what can be improved. DALLAS, Aug. 23 /PRNewswire/ -- Texas Instruments Incorporated (TI) (NYSE: TXN) today introduced a dual-channel, single-lane serial-ATA (SATA) redriver and signal conditioner, featuring the lowest active power and lowest automatic low-power (ALP) mode of any 6-Gbps redriver/equalizers available today. The SN75LVCP601 has a maximum active power consumption of 290 mW, or approximately 50 percent less than the nearest competitor, extending critical battery life in portable electronics, such as notebook PCs. ...

Design flowTop-down designSpecification + different levels of abstractionMeeting specs accross PVT with min powerUsually, big savings are in the architecture

Levels of abstractionSystem level (block diagrams, MATLAB)Schematics (SPICE)Layout (CAD, DRC, ERC, LVS)

Curriculum

http://www.springerlink.com/content/l30184/#section=342950&page=1

Reference circuitsEvery analog and mixed signal circuit needs biasing and/or a reference independent of PVT.

Layout and mismatchDrawing layout needs careful attention in order to get predictable results.Ensuring drawn layout is manufactureable (DRC).Ensuring drawn layout is coherent with schematics (LVS, post layout simulation, but this does not reveal every problem, assumptions made by schematics)Ensuring drawn layout is robust against manufacturing imperfections.

Switched capacitorVery important technique for analog signal processing. Discrete time, continuous value.

Data convertersConverting between analog and digital representations of the signal. General data converter considerationsDifferent architectures suited to different specifications (speed, resolution).Oversampling and noise shaping

Oscillators and PLLsClock and data recovery (from serial data)Clock generation (from external crystal reference)Demodulation (e.g. frequency modulated signals)

ProjectCounts 40 % towards the final gradeFinal report is very important Last year: SAR ADCThis year: Bandgap + Current steering DAC Work in groups of twoKody will follow up on the projectMore details to follow

Design toolsHands on with high quality IC design tools in the labs and for completing the project. Virtuoso IC6.1.4 (Cadence)Virtuoso Spectre 7.2.0 (Cadence)Calibre 2010.3 (Mentor Graphics)

Process design kit (PDK)TSMC 90 nm MS/RF LP 1.2 V with 2.5 V I/Ohttp://www.europractice-ic.com/technologies_TSMC.php?tech_id=90nm

Provides simulation modelsPCells for generating component layoutRule decks for DRC, ERC, and LVS

Final exam7. June, 14:30, 4 hours written examCounts 60 % towards the final grade.

Schedule

ReferencesIn addition to the curriculum, these references have been consulted when preparing the lectures.CMOS: Circuit design, Layout, and Simulation (Baker, IEEE Press).Analog Design Essentials (Willy Sansen, Springer).IDESA (www.idesa-training.org/About.html)Analog Integrated Circuit Design (Johns and Martin, Wiley).

Next lecture 23. January Reference circuits ("Bandgaps")


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