Infineon CoolMOSTM C7 7th generation Superjunction MOSFET Infineon has improved the epitaxy process with a direct impact on Rdson, 20% lower. The CoolMOSTM C7 from Infineon is the 7th generation high-voltage Superjunction structure power MOSFET. With a breakdown voltage of 650V for a current of 7A (100°C), the C7 is optimized for hard switching topologies such as Power Factor Correction, solar boost circuit applications. The CoolMOSTM C7 offers a very low on-resistance (between 19mΩ and 225mΩ), and a fast switching speed, more than 100KHz. The C7 differs from the C6 via a new multi-epitaxy technology and an original contact solution. The C7 wafer cost is 10% higher than the C6 but the current density is 25% higher and the power losses 20% lower. This reverse costing report provides an estimation of the production cost of the IPD65R225C7, a discrete CoolMOSTM transistor. More information on that report at http://www.i-micronews.com/reports/Infineon-CoolMOS-C7-7th-generation-Superjunction-MOSFET/12/440/
DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners.
• This full Reverse Costing study has been conducted in order to give insight on technology data,manufacturing cost of the CoolMOS 650V MOSFET used in the IPD65R225C7 from Infineon.
• The IPD65R225C7 package contains 1x CoolMOS 650V. The IPD65R225C7 drives 11A at 25°C for225mohms and 7A at 100°C.
• The component is provided in a standard 3-pins DPAK package, compatible with SMD process.
• The MOSFET has a current density of 1.06A per mm² at 100°C under 650V.
• The power component is designed and manufactured by Infineon.• The manufacturing of the MOSFET is assumed to take place in a 200mm wafer fab unit in
Malaysia.• The packaging and final test are realized by Infineon and are assumed to take place in a plant
in Malaysia.
• The component can be used for :• PFC stages,• Hard switching PWM stages,• Computing, Server,• Telecom,• UPS,• Solar inverters.
The reverse costing analysis is conducted in 3 phases:
Teardown analysis
• Package is analyzed and measured• The dies are extracted in order to get overall data: dimensions, main blocks, pad number and pin out, die marking• Setup of the manufacturing process.
Costing analysis
• Setup of the manufacturing environment• Cost simulation of the process steps
Selling price analysis
• Supply chain analysis• Analysis of the selling price
Reverse costing analysis represents the best cost/price evaluation given the publically available data, and estimates completed by industry experts.
Given the hypothesis presented in this analysis, the major sources of correction would lead to a +/- 10% correction on the manufacturing cost (if all parameters are cumulated).
These results are open for discussion. We can reevaluate this circuit with your information. Please contact us:
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