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Instruction Sets: Characteristics and FunctionsAddressing Modes and Formats

CE204 Computer Architecture and Organizationby

Dr. Ahmet ÖZKURT

William Stallings, Computer Organization and Architecture6th Edition

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What is an instruction set?

• The complete collection of instructions that are understood by aCPU

• Machine Code• Binary• Usually represented by assembly codes

Elements of an Instruction• Operation code (Op code)

– Do this• Source Operand reference

– To this• Result Operand reference

– Put the answer here• Next Instruction Reference

– When you have done that, do this...

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Instruction Representation• In machine code each instruction has a unique bit pattern• For human consumption (well, programmers anyway) a symbolic

representation is used– e.g. ADD, SUB, LOAD

• Operands can also be represented in this way– ADD A,B

Instruction Types• Data processing• Data storage (main memory)• Data movement (I/O)• Program flow control

Simple Instruction Format

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Number of Addresses • 3 addresses

– Operand 1, Operand 2, Result– a = b + c;– May be a forth - next

instruction (usually implicit)– Not common– Needs very long words to hold

everything• 2 addresses

– One address doubles as operand and result

– a = a + b– Reduces length of instruction– Requires some extra work

• Temporary storage to hold some results

• 1 address– Implicit second address– Usually a register

(accumulator)– Common on early machines

• 0 (zero) addresses– All addresses implicit– Uses a stack– e.g. push a– push b– add– pop c

– c = a + b

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How Many Addresses• More addresses

– More complex (powerful?) instructions– More registers

• Inter-register operations are quicker– Fewer instructions per program

• Fewer addresses– Less complex (powerful?) instructions– More instructions per program– Faster fetch/execution of instructions

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Design Decisions (1)

• Operation repertoire– How many ops?– What can they do?– How complex are they?

• Data types• Instruction formats

– Length of op code field– Number of addresses

• Registers– Number of CPU registers available– Which operations can be performed on which registers?

• Addressing modes (later…)

• RISC v CISC

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Types of Operand• Addresses• Numbers

– Integer/floating point• Characters

– ASCII etc.• Logical Data

– Bits or flags• (Aside: Is there any difference between numbers and characters? Ask a C

programmer!)

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Pentium Data Types• 8 bit Byte• 16 bit word• 32 bit double word• 64 bit quad word• Addressing is by 8 bit unit• A 32 bit double word is read at addresses divisible by 4

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Specific Data Types• General - arbitrary binary contents• Integer - single binary value• Ordinal - unsigned integer• Unpacked BCD - One digit per byte• Packed BCD - 2 BCD digits per byte• Near Pointer - 32 bit offset within segment• Bit field• Byte String• Floating Point

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Pentium Floating Point Data Types

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PowerPC Data Types• 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) length data

types• Some instructions need operand aligned on 32 bit boundary• Can be big- or little-endian• Fixed point processor recognises:

– Unsigned byte, unsigned halfword, signed halfword, unsigned word, signed word, unsigned doubleword, byte string (<128 bytes)

• Floating point– IEEE 754– Single or double precision

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Types of Operation• Data Transfer• Arithmetic• Logical• Conversion• I/O• System Control• Transfer of Control

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Branch Instruction

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Nested Procedure Calls

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Use of Stack

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Byte Order• What order do we read numbers that occupy more than one byte• e.g. (numbers in hex to make it easy to read)• 12345678 can be stored in 4x8bit locations as follows

• Address Value (1) Value(2)• 184 12 78• 185 34 56• 186 56 34• 186 78 12

• i.e. read top down or bottom up?

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Byte Order Names• The problem is called Endian• The system on the left has the least significant byte in the lowest

address• This is called big-endian• The system on the right has the least significant byte in the highest

address• This is called little-endian

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Example of C Data Structure

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Alternative View of Memory Map

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Standard…What Standard?• Pentium (80x86), VAX are little-endian• IBM 370, Motorola 680x0 (Mac), and most RISC are big-endian• Internet is big-endian

– Makes writing Internet programs on PC more awkward!– WinSock provides htoi and itoh (Host to Internet & Internet to

Host) functions to convert

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Addressing Modes• Immediate• Direct• Indirect• Register• Register Indirect• Displacement (Indexed) • Stack

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Immediate Addressing• Operand is part of instruction• Operand = address field• e.g. ADD 5

– Add 5 to contents of accumulator– 5 is operand

• No memory reference to fetch data• Fast• Limited range

OperandOpcode

Instruction

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Direct Addressing• Address field contains address of operand• Effective address (EA) = address field (A)• e.g. ADD A

– Add contents of cell A to accumulator– Look in memory at address A for operand

• Single memory reference to access data• No additional calculations to work out effective address• Limited address space

Address AOpcode

InstructionMemory

Operand

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Indirect Addressing• Memory cell pointed to by address field contains the address of

(pointer to) the operand• EA = (A)

– Look in A, find address (A) and look there for operand• e.g. ADD (A)

– Add contents of cell pointed to by contents of A to accumulator• Large address space • 2n where n = word length• May be nested, multilevel, cascaded

– e.g. EA = (((A)))• Draw the diagram yourself

• Multiple memory accesses to find operand• Hence slower

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Indirect Addressing Diagram

Address AOpcode

Instruction

Memory

Operand

Pointer to operand

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Register Addressing• Operand is held in register named in address filed• EA = R• Limited number of registers• Very small address field needed

– Shorter instructions– Faster instruction fetch

• No memory access• Very fast execution• Very limited address space• Multiple registers helps performance

– Requires good assembly programming or compiler writing– N.B. C programming

• register int a;• c.f. Direct addressing

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Register Addressing Diagram

Register Address ROpcode

Instruction

Registers

Operand

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Register Indirect Addressing• C.f. indirect addressing• EA = (R)• Operand is in memory cell pointed to by contents of register R• Large address space (2n)• One fewer memory access than indirect addressing

Register Address ROpcodeInstruction

Memory

OperandPointer to Operand

Registers

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Displacement Addressing• EA = A + (R)• Address field hold two values

– A = base value– R = register that holds displacement– or vice versa

Register ROpcodeInstruction

Memory

OperandPointer to Operand

Registers

Address A

+

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Other Addressing Modes• Relative Addressing

– A version of displacement addressing– R = Program counter, PC– EA = A + (PC)– i.e. get operand from A cells from current location pointed to by PC– c.f locality of reference & cache usage

• Base-Register Addressing– A holds displacement– R holds pointer to base address– R may be explicit or implicit– e.g. segment registers in 80x86

• Indexed Addressing– A = base; R = displacement; EA = A + R– Good for accessing arrays - EA = A + R; R++

• Stack addressing– Operand is stored on top of the stack

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Pentium Addressing Modes• Virtual or effective address is offset into segment

– Starting address plus offset gives linear address– This goes through page translation if paging enabled

• 12 addressing modes available– Immediate– Register operand– Displacement– Base– Base with displacement– Scaled index with displacement– Base with index and displacement– Base scaled index with displacement– Relative

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Pentium Addressing Mode Calculation

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PowerPC Addressing Modes• Load/store architecture

– Indirect• Instruction includes 16 bit displacement to be added to base

register (may be GP register)• Can replace base register content with new address

– Indirect indexed• Instruction references base register and index register (both may be

GP)• EA is sum of contents

• Branch address– Absolute– Relative– Indirect

• Arithmetic– Operands in registers or part of instruction– Floating point is register only

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PowerPC Memory Operand Addressing Modes

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Instruction Formats, Instruction LengthInstruction Formats• Layout of bits in an instruction• Includes opcode• Includes (implicit or explicit) operand(s)• Usually more than one instruction format in an instruction set

Instruction Length• Affected by and affects:

– Memory size– Memory organization– Bus structure– CPU complexity– CPU speed

• Trade off between powerful instruction repertoire and saving space

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Allocation of Bits• Number of addressing modes• Number of operands• Register versus memory• Number of register sets• Address range• Address granularity

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PDP-8 Instruction Format

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PDP-11 Instruction Format

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VAX Instruction Examples

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Pentium Instruction Format

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PowerPC Instruction Formats (1)

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PowerPC Instruction Formats (2)