8/11/2019 Intel P5 http://slidepdf.com/reader/full/intel-p5 1/13 Intel P5 (microarchitecture) From Wikipedia, the free encyclopedia Jump to: navigation, search "Intel Pentium" redirects here. For current processors marketed as Pentium or Pentium Dual- Core, see Pentium Dual-Core . The Intel Pentium family Produced From 199 to 1999 Common manufacturer(s) Intel Max. CPU clock rate !" #$% to "" #$% FSB speeds &" #$% to !! #$% Min. feature sie "'()m to "'*&)m Instruction set +(! Microarchitecture P& Cores 1 Socket(s) ocket -, ocket &, ocket . Core name(s) P&' P&-, P&-/, P&&/, Tillamook
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8/11/2019 Intel P5
http://slidepdf.com/reader/full/intel-p5 1/13
Intel P5 (microarchitecture)
From Wikipedia, the free encyclopedia
Jump to: navigation, search"Intel Pentium" redirects here. For current processors marketed as Pentium or Pentium Dual-
The P5 microarchitecture is the implementation of the original Intel Pentium microprocessor ,
0hich 0as introduced on #arch **, 199 as the first superscalar +(! processor '12*2 The
microarchitecture 0as a direct e+tension of the ("-(! architecture and included dual integer pipelines, a faster FP3, 0ider data 4us, separate code and data caches and features for further
reduced address calculation latency' In 199!, the Pentium MM! 0as introduced 0ith the same
4asic microarchitecture complemented 0ith ##5 instructions, larger caches, and some otherenhancements'
The name Pentium 0as derived from the 6reek pente 78;<=, meaning >five>, and the ?atin
ending -ium, a name selected after courts had disallo0ed trademarking of num4er@4ased names
like Ai&(!A or A("&(!A' Intel filed a 3'' trademark for the name >Pentium> on July *, 199*, morethan ( months 4efore the pu4lic release of the Intel Pentium chip 0ith the description >computer
hard0areB namely, microprocessors>'2 In 199&, Intel started to employ the registered Pentium
trademark also for +(! processors 0ith radically different microarchitectures 7Pentium Pro C II CIII C - C D C #=' In *""!, the Pentium 4rand 4riefly disappeared from Intel>s roadmaps,-2&2 only to
re@emerge in *"".'!2
Einod Dham is often referred to as the father of the Intel Pentium processor ,.2(2 although many
people, including John $' /ra0ford 7of i(! and i-(! alumni=, 0ere involved in the design anddevelopment of the processor'
• uperscalar architecture K The Pentium has t0o datapaths 7pipelines= that allo0 it to
complete more than one instruction per clock cycle' Hne pipe 7called 3= can handle anyinstruction, 0hile the other 7called E= can handle the simplest, most common instructions'
ome I/ proponents had argued that the AcomplicatedA +(! instruction set 0ould
pro4a4ly never 4e implemented 4y a tightly pipelined microarchitecture, much less 4y adual pipeline design' The -(! and the Pentium demonstrated that this 0as indeed possi4le
and feasi4le'
• !-@4it e+ternal data4us 0idth K This dou4les the amount of information read or 0ritten
on each memory access' This doesn>t mean that the Pentium can e+ecute !-@4it
applicationsB its main registers are still * 4its 0ide'
• Faster floating point unit'
• ##5 instructions 7later models only= @ L 4asic I#D instruction set e+tension designed
for use in multimedia applications'
• Eirtuali%ed interrupt to speed up virtual ("(! mode'
• nhanced de4ug features 0ith the introduction of the Processor@4ased de4ug port 7ee
Pentium Processor Debugging in the Developers #anual, Eol 1='
• nhanced self test features like the ?1 cache parity check 7see Cache Structure in the
Developers #anual, Eol 1='
Pentium architecture chips offered Must under t0ice the performance of a -(! processor per clockcycle' The fastest Intel -(! parts 0ere almost as po0erful as a first@generation Pentium, and the
L#D Lm&+(! 0as roughly eNual to the Pentium .&'
The Pentium 7A/lassicA= series 0ere designed to run at over 1"" million instructions per second
7#IP=,92 0ith the .& #$% model running at 1*!'& #IP'1"2
"edit# Models
The Pentium 0as Intel>s primary microprocessor for personal computers during the mid@199"s'
The original design 0as reimplemented in ne0er processes and ne0 features 0ere added to
maintain its competitiveness as 0ell as to address specific markets such as porta4le computers'Ls a result, there 0ere si+ variants of the Pentium'
The original Pentium microprocessor 0as code@named AP&A' Its product code 0as ("&"1 7("&""
for the earliest steppings= and it operated at !" #$% and !! #$%' It contained '1 million
transistors and measured 1!'. mm 4y 1.'! mm for an area of *9'9* mm*'112 It 0as fa4ricated ina "'( )m Gi/#H process'
"edit# P5%C
The P& 0as follo0ed 4y the P&-/ 7("&"*=, 0hich operated at .&, 9" and 1"" #$%' It employedan internal clock multiplier to let the internal circuitry 0ork at a higher freNuency than the front
side 4us, as it is much more difficult to increase the front side 4us freNuency' It also allo0ed t0o@
0ay multiprocessing' It contained ' million transistors and measured 1! mm*'1*2 It 0asfa4ricated in a "'& )m 7descri4ed 4y Intel as A"'! )mA= Gi/#H process' 1*2
"edit# P5%CS
The P&-/ 0as follo0ed 4y the P&-/ 0hich operated at 1*" #$%' It 0as fa4ricated in a
"'& )m Gi/#H process, unlike early rumors of it 4eing a /#H design, and 0as the firstcommercial microprocessor to 4e fa4ricated in a "'& )m process'1*2 It had an identical transistor
count to the P&-/ and despite the ne0er process, it had an identical area as 0ell' The reason forthis 0as 4ecause of time@to@market reNuirements' The chip 0as connected to the package using
0ire 4onding, 0hich only allo0s connections along the edges of the chip' L smaller chip 0ould
have reNuired a redesign of the package, as there is a limit on the length of the 0ires and theedges of the chip 0ould 4e further a0ay from the pads on the package' The solution 0as to keep
the chip at the same si%e, retain the e+isting pad@ring, and only reduce the si%e of the Pentium>s
logic circuitry to ena4le it to achieve higher clock freNuencies'1*2
"edit# P5%CS
The P&-/ 0as follo0ed 4y the P&-/, 0hich operated at 1, 1&", 1!! and *"" #$%' It
contained ' million transistors, measured 9" mm* and 0as fa4ricated in a "'& )m Gi/#H process 0ith four levels of interconnect'
"edit# Bus and pro*lems
The early versions of !"@1"" #$% Pentiums had a pro4lem in the floating point unit that resulted
in incorrect 74ut predicta4le= results from some division operations' This 4ug, discovered in 199-
4y professor Thomas Oicely at ?ynch4urg /ollege, Eirginia, 4ecame kno0n as the PentiumFDIE 4ug and caused em4arrassment for Intel, 0hich created an e+change program to replace
the faulty processors' oon after0ards, a 4ug 0as discovered 0hich could allo0 a malicious program to crash a system 0ithout any special privileges 7the f""f 4ug=B fortunately, operatingsystems 0ere a4le to implement 0orkarounds to prevent crashes'
The !" and !! #$% "'( )m versions of the Pentium processors also had 7for the time= high heat
production due to their &E operation, and 0ere often kno0n colloNuially as Acoffee 0armersA or
some similar nickname'citation needed 2 The P&-/ used 'E and had significantly lo0er po0er dra0
7a Nuadratic relationship=' P& Pentiums used ocket -, 0hile P&-/ started out on ocket & 4efore
moving to ocket . in later revisions' Lll desktop Pentiums from P&-/ on0ards used ocket .'
"edit# Pentium +$er,ri$e
Main article: Pentium !erDri!e
The P*-T Pentium HverDrive for -(!@systems 0ere released in 199&, 0hich 0ere 4ased on 'E
"'! )m versions using a ! or ( #$% clock' ince these used ocket *C, some modifications
had to 4e made to compensate for the *@4it data 4us and slo0er on@4oard ?* cache of -(!@
mother4oards' They 0ere therefore eNuipped 0ith a *G ?1 cache 7dou4le that of pre@P&&/Pentiums='
"edit# P55C- illamook
Pentium logo, 0ith ##5 enhancement
Intel Pentium ##5 microarchitecture'
Pentium ##5 1!! #$% 0ithout cover
The P&&/ 7or ("&"= 0as developed 4y Intel>s esearch Q Development /enter in $aifa, Israel'It 0as sold as Pentium /ith MM! echnolo0 7usually Must called Pentium MM!=B although
it 0as 4ased on the P& core it featured a ne0 set of &. A##5A instructions intended to improve performance on multimedia tasks, such as encoding and decoding digital media data' The
Pentium ##5 line 0as introduced on ** Hcto4er 199!'12
The ne0 instructions 0ork on ne0 data types: !-@4it packed vectors of either eight (@4it integers,
four 1!@4it integers, t0o *@4it integers, or one !-@4it integer' o, for e+ample, the PLDD3G7Packed LDD 3nsigned aturated Gyte= instruction adds t0o vectors, each containing eight (@4it
unsigned integers together, pair0iseB each addition that 0ould overflo0 saturates, yielding *&&,
the ma+imum unsigned value that can 4e represented in a 4yte' These rather speciali%ed
instructions generally reNuire special coding 4y the programmer for them to 4e used' The performance of the P&&/ 0as improved over previous versions 4y a dou4ling of the ?evel 1
/P3 cache from 1! G to * G'
It contained -'& million transistors and had an area of 1-" mm*' It 0as fa4ricated in a "'*( )m/#H process 0ith the same metal pitches as the previous "'& )m Gi/#H process, so Intel
descri4ed it as A"'& )mA 4ecause of its similar transistor density'1-2 The process has four levels
Pentium P&&/ note4ook /P3s used a Amo4ile moduleA that held the /P3' This module 0as a
P/G 0ith the /P3 directly attached to it in a special smaller form factor' The module snapped to
the note4ook mother4oard and typically a heat spreader plate 0as installed and made contact0ith the module' uch note4ooks freNuently used the Intel -"#5 chipset, a feature@reduced
-"F5' $o0ever, 0ith the "'*& )m illamook #o4ile Pentium ##5 7named after a city in
Hregon=, the module also held the -"T5 chipset along 0ith the system>s &1* G L# cachememory'
While the P&&/ is compati4le 0ith the common ocket . mother4oard configuration, the voltage
reNuirements for po0ering the chip differ from the standard ocket . specifications' Due to
certain manufacturers not preparing for the introduction of ##5 technology most mother4oardsmanufactured for ocket . previous to the esta4lishment of the P&&/ standard are not compliant
0ith the dual intensity reNuired for proper operation of this chip' The Intel /orporation
temporarily manufactured a conversion kit called the Hverdrive that 0as designed to correct thislack of planning on the mother4oard manufacturers part'
