Chapter 7

Peripheral ICs and their Interfacing

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Lesson 4

8259- Programmable Interrupt Controller

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Request• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• 8 External interrupt requests with priority levels 0-7 extendable to 0-63 by cascading

• Each request separately maskable• Priority Resolver• TTL level output compatible with

Intel processors

Programmable Interrupt Controller 8259 Features

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Requests• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• 8 External interrupt requests • Normal priorities are IRQ0highest,

IRQ7 lowest• Each request separate mask bit• Each request separate level of

interrupt

8259 Features

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• In 8086, level is a byte,which multiplies by 00004H to define a vector address from where the processor fetches the CS and IP for a routine needed for servicing a interrupt request by a routine

8259 Features

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• In 8085, address is a 16-bit word,which defines a vector address by 2nd and 3rd fetched bytes in 2nd and 3rd Interrupt ACK cycles. 1st fetched byte is a code for instruction(jump code or call code)

8259 Features

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Requests• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

ICW4 (an initial command word) is for programming the priority resolver.

Nested mode for priority resolver

Specific rotation mode for priority resolver

Automatic mode for priority resolver

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Nested mode

IRQ0 Highest, IRQ 7 lowest

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Auto or Specific rotation mode for priority resolver

Auto rotate,any IRQ after the service becomes of lowest priority

Specific rotate, change priority by define a device of lowest priority, next to it will be highest. Let us define IR3 lowest. Priorities are now IRQ4, 5, 6, 7, 0, 1, 2, 3

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Requests• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• Define whether an IRQ serviced or being serviced.

• b7 = 1 means IRQ7 request pending and is being serviced

• 0 means serviced and not pending the service

In Service register

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Requests• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

8259

Inte

rrup

t R

eque

st

Reg

iste

r

In-S

ervi

ce

Reg

iste

r

RD/WR logic

Data Buffer

Prio

rity

Res

olve

r

Cascade Buffer

Interrupt Mask Register

CS

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

8259

VCCCS

IORD

SP/EN

IRQ7-0

GND D5-D7

A0IOWR

D7-D0INTR

CSA1CSA0

INTA

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Table 7.17 - Each Pin signals

Table 7.16 - Block Functions

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

8259

VCCCS

IORD

SP/EN

IRQ7-0

GND CAS2

A0IOWR

D7-D0INTR

CSA1CSA0

INTA

Dec

oder

A1-An

Latch

AD0 to AD7

A0 to An

ALE

(WR, IOWR or P3.7) and (RD, IORD or P3.6) or R/W and NOT(R/W) to IOWR and IORD

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Table 7.18 - Exemplary Addresses

Initial Command Words ICW2, ICW3 and ICW4

20H 21HInitial Command Word ICW1 and sequences of types for IRQ0-7

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Figure 7.14 for details

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Outline• Programmable Interrupt Controller• 8259 Interrupt Requests• 8259 Interrupt Priorities Resolution• 8259 In-Service register• 8259 Block Diagram, Pins and

Interfacing• 8259 Programming

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

ICW1 Programming is for defining the interrupt levels for each IRQ

ICW3 programming for automatic or manual end of interrupt

ICW4 for programming nested or specific rotation or automatic mode for priority resolver

ICW2 programming is for cascade or normal mode

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

Summary

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

• Programmable Interrupt Controller• masks for requests(interrupts)

programmable• priorities for requests(interrupts)

programmable• Programmable interrupt service

routine an 8-bit level or 16-buitaddress for each request

8259

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

End of Lesson 4

8259- Programmable Interrupt Controller

Ch07L4 -"Microcontrollers.........", Raj Kamal, Pearson Education, 2005

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