Introduction toRF VCO Design

Sung Tae MoonNov. 2004

Analog and Mixed-Signal Center

A M S C

2

Contents

n Introductionn VCO design proceduren Quadrature generatorsn Measurementn Inductor measurement using microprobe

3

Introduction to VCO

n VCO stands for Voltage Controlled Oscillator.n VCO is an Oscillator of which frequency can

be Controlled by external Voltage stimulus.

Vc Vo

control voltage output signal

VCO

4

VCO in Frequency Synthesizer

n One of major applications for VCO is a frequency synthesizer.

n Frequency synthesizer provides sinusoidal/pulse signals at predetermined frequencies that is precisely controllable by digital words.

n Frequency synthesizer is a core building block of any system that has to work at multiple frequencies such as wireless communication transceivers.

5

VCO in Frequency Synthesizer cont.

n Frequency synthesizer usually consists of a VCO, a PLL and a frequency divider.

Vc Vo

phase lock loop

output signal

VCO

PLL

%N

frequency divider

fref

6

Requirements for VCO Design

n Frequency tuning rangeq Tuning range must cover the entire band of operation.

n Phase noiseq Close to the oscillation frequency due to spontaneous jitter.

n Harmonic distortionq Spectral impurity of the signal

n Signal powerq Must be high enough to drive the load.

n Power consumption

7

VCO for Bluetooth transceiver

n Frequency tuning range : 2.402 ~ 2.479GHzn Phase noise : -128dBc/Hz@3MHzn Harmonic distortion : less than 20dBn Signal power : more 0dBmn Power consumption : less than 8mA

8

Procedure 1. Specification Study

n Relatively low tuning range : 3.3%n High frequency of oscillation : >2.4GHzn Very high phase noise requirement

à LC tuned oscillator is most suitable

9

Procedure 2. LC Tuned Oscillatorn Oscillation frequency is

tuned by resonant frequency of LC tank.

n Cross-coupled transistors work as a negative resistance that sustains oscillation by compensating loss in the LC tank.

n Frequency is controlled by varying the capacitance of the tank.

gm

L C R -R

LC

M1 M2LC

o1

≈ω

10

Procedure 3. On-chip Inductor

n Specificationsq L = 2nHq Q > 5

n On-chip spiral inductor must be simulated with EM(Electro-Magnetic) simulator such as ASITIC.

RL

Qω

≈RL

ß ASITIC EM simulator

11

Inductance and Q

area Metal1 widthMetal

area Totalarea Metal

_ ∝∝∝

resonantselffQL

n Q can be improved by increasing metal width.n To keep L same, total area has to be increased.n Increased metal area reduces self resonant

frequency

12

Procedure 4. MOSFET Varactor

n Back gate controlled PMOS varactorn Accumulation mode

n Depletion mode

VBG < 0G

p+ p+

n

B

G

B

Cox

G

B

0 < VBG < Vth

G

p+ p+

n

B

G

B

Cox

G

B

Cd

13

Procedure 4. MOSFET Varactor (cont.)

n Inversion mode VBG > Vth

G

p+ p+

n

B

G

B

Cox

G

B

14

Procedure 4. MOSFET Varactor (cont.)

n Accumulation/Depletion only varactor

n Inversion only varactor

G

n+ n+

n

B

GVB = VDD

15

Procedure 5. Active Elements

n gm of the cross-coupled MOS pairs must be high enough to compensate the loss of the tank.

n It is a good idea to have plenty of margin in design.

n The length of the transistors must be minimum in order to minimize parasitics.

16

Procedure 5. Active Elements (cont.)

n Sources of the lossq Quality of L (QL)q Quality of C (QC)q Output impedance of the

transistor. (go)

n Gm of the transistor must be larger than total loss.

n α is safety margin for starting oscillation.

gm

C

1/go

-RL

RL RC

3

1,

1

>

==

++>

αω

ω

ωω

α

CoC

L

oL

C

o

oLom

CRQ

RL

Q

QC

LQgg

17

Series-parallel conversion

n Only valid close to resonant frequency

C

L

RS

CL RP

2

2)(

L

P

P

oS Q

RR

LR ==

ωSL

S

oP RQ

RL

R 22)(

==ω

18

Phase Noise

n Phase noise is uncertainty of center frequency of VCO output

n The spectrum looks as if it has finite power in certain frequency offset away from the center frequency

n In time domain, phase noise is also referred to as timing jitter

19

Phase Noise (cont.)

n Signal amplitude

n Noise power

n Phase noise

SLtailS

otailPtailA RQI

RLI

RIV 22)(

===ω

22

2

2

22

44

∆=

∆=

ωω

γω

ωγ oSLm

o

L

Pmn RQgkT

QRgkT

v

2

222

2 88

∆==

ωωγ o

tail

m

A

n

LQIgkT

Vv

PN

20

Phase Noise (cont.)

n Signal power can be increased either by higher Q or by higher L

n Only high Q improves phase noisen High power dissipation also improves phase

noise

21

Quadrature Signal Generation 1

n Two identical coupled oscillatorsq Immune to mismatch -

the coupled oscillators synchronize to exactly the same frequency

q Large area and power dissipation

−I +I

+Q−Q

n Lam, C.; Razavi, B. “A 2.6 GHz/5.2 GHz CMOS voltage-controlled oscillator”, ISSCC, 1999, pp. 402-403

22

Quadrature Signal Generation 2

n RC-CR networkq Low power : passive

element onlyq Sensitive to mismatchq Amplitude mismatch

INV

2OUTV

1OUTV

n Orsatti, P.; Piazza, F.; Huang, Q., “A 20-mA-receive, 55-mA-transmit, single-chip GSM transceiver in 0.25 CMOS”, JSSC, vol 34, Dec. 1999 , pp. 1869-880

23

Quadrature Signal Generation 3

n Polyphase networkq Low powerq Amplitude matchingq Insertion loss

−I

+I

+Q

−Q

+IV

−IV

n Parssinen, A.; Jussila, J.; Ryynanen, J.; Sumanen, L.; Halonen, K.A.I., “A 2-GHz wide-band direct conversion receiver for WCDMA applications,” JSSC, vol. 34, Dec. 1999, pp. 1893-903

24

Quadrature Signal Generation 4

n Divide-by-two circuitq Relatively immune to

mismatchq Requires 2x frequency

oscillation which leads to high power dissipation

Latch

Latch

INV2OUTV 1OUTV

25

Layout of Bluetooth VCO

MOSDrivers

Varactor

Spiral Inductors

Phase shifter

26

Chip Microphotograph

27

Another Layout (for 802.11b+BT)

28

PC Board

29

Using Spectrum Analyzer

Device Under Test Matching NetworkSpectrum Analyzer

FSE-K4 Phase noisemeasurement software

on PCB

n A matching network to make the output impedance of the VCO to match 50Ω is recommended

n The phase noise measurement can be automated by using FSE-K4 software

30

Testing Results

n Since the frequency of oscillation is too high for any oscilloscope available in the lab, the spectrum analyzer is the only option for testing the circuit.

n Measured parameters:q Frequency tuning range : 2.37 ~ 2.72GHzq Signal power : -12dBmq Phase noise : -130dBc/Hz @ 3MHz

31

Testing Results

n Tuning Rangeq 2.37 ~ 2.72GHz

n Phase noiseq -130dBc/Hz @ 3MHz

offset

32

Inductor Measurement using Microprobe

n Measurement instrumentsq Probe Mount Stationq Microprobe (150µm pitch)q Network Analyzer (HP 8719ET)q SMA Coaxial cable

SpiralInductorPads for

microprobes

G S G

33

Calibrating Network Analyzer

Calibration

Standards(open, short, 50Ω,

through)

ProbeStation

NetworkAnalyzer

Coax

n Calibration is required to compensate the effect of microprobes, coaxial cables and network analyzer itself.

n The effect of pads for microprobe landing cannot be calibrated out. De-embedding after measurement is required.

34

Measurement Setup

2221

1211

ssss

s-parameters

Chip(TSMC 0.35u

Spiral inductor)

ProbeStation

NetworkAnalyzer

Coax

n The device under test is measured after calibrationn Network analyzer extracts the s-parameters

35

s-parameter to y-parameter Conversion

21122211

2112221122

2121

1212

2112221111

)1)(1(

)1)(1(

2

2

)1)(1(

ssss

Zssss

y

Zs

y

Zs

y

Zssss

y

o

o

o

o

−++=∆∆

+−+=

∆−

=

∆−

=

∆++−

=

36

Modeling Inductor from y-parameter

z

L

Y1

Y2 Y3

1i 2i

1v 2v

31

02

222

1

01

221

1

02

112

21

01

111

1

2

1

2

YYvi

y

Yvi

y

Yvi

y

YYvi

y

v

v

v

v

+==

−==

−==

+==

=

=

=

=

37

Conclusion

n Basic concept of VCO is discussed.n Design procedure of a 2.4GHz VCO for

Bluetooth application is presented.n Testing result of the circuit is provided.