This paper is a postprint of a paper submitted to and accepted for publication in IET Generation, Transmission and
Distribution, and is subject to Institution of Engineering and Technology Copyright.
Keywords: Distribution Networks, Power Convertors, Renewable Energy Sources, Power System Protection, Power System
Stability, Power System Transients.
Abstract
This paper contains an investigation into sympathetic tripping - the undesirable disconnection of Distributed Generators (DGs)
(in accordance with the recently-introduced G83/2 undervoltage protection) when a network fault occurs in the vicinity of the
DG and is not cleared quickly enough by the network protection (i.e. before the DG’s undervoltage protection operates). An
evaluation of the severity of and proposal of solutions to the problem of sympathetic tripping on a typical UK distribution power
network is presented. An inverter model (as the majority of DGs will be inverter-interfaced) that characterises the fault response
of the inverter and its associated protection functions has been developed for use in simulation through exhaustive laboratory
testing of a commercially-available 3 kW inverter for DG application; the observed responses have been modelled and
incorporated in a power system simulation package. It is shown, when using presently-adopted DG interface and network
protection settings, that the risk of sympathetic tripping is high in several future scenarios. To mitigate this risk, the impact of
modifying network protection settings is evaluated. This paper has two key findings – determination of the conditions at which
the risk of sympathetic tripping is high and evaluation of a technique to mitigate this risk.
1 Introduction
The number of DGs connected to power systems is increasing. In the European Union, there is a 2020 target of 20% of final
energy consumption from renewable sources [1] and a target to reduce greenhouse gases from energy production by 80-95% by
2050 [2]. Attractive feed in tariffs for small scale renewables have also resulted in a significant increase in the number of small
scale DG installations in the UK in recent years [3]. The trend of increased connections of DGs is likely to continue in the
future. The majority of modern DGs connected to the power system are inverter-interfaced i.e. nearly all photovoltaics, most
modern fully converter-interfaced wind turbines and nearly all emerging wave and tidal power technologies [4]. The connection
of DGs has the potential to create problems for power system protection. Reported problems include protection grading failure
Investigation of the Sympathetic Tripping Problem in Power Systems
with Large Penetrations of Distributed Generation
Kyle I. Jennett, Campbell D. Booth, Federico Coffele and Andrew J. Roscoe
2
[5, 6], unwanted islanding [7, 8] and sympathetic tripping [9, 10]. The severity of these problems is likely to increase as
Distributed Generation proliferates in future. This paper focuses on the particular problem of sympathetic tripping.
Sympathetic tripping is widely quoted as representing a challenge for protection of networks with DGs [11-13]. However, there
appears to be a lack of objective and quantitative studies of this problem. This paper addresses this shortcoming in the literature
by simulating conditions that may lead to sympathetic tripping on a UK power network with great accuracy, using
experimentally-derived and validated models. The premise of the sympathetic tripping problem is illustrated in Fig. 1. If the
fault on feeder 2 results in a voltage of 80% or less at the terminals of the inverters on the 400 V network and the fault on feeder
2 is isolated with a delay of longer than 0.5 s from fault inception to clearance, then the DG interface protection will trip
according to the undervoltage requirements specified in the Engineering Recommendation (EREC) G83/2 [14].
Fig. 1 Simplified distribution network with DG at risk of sympathetic tripping
G83/2 [14] applies to electrical sources rated up to and including 3.68 kW, connected in a single-phase configuration, and up to
and including 11.04 kW for three phase connections (ratings based on a nominal phase-earth voltage of 230 V). G83/2 states that
DG units must remain connected for 0.5 s when the measured phase-phase voltage is less than 80% of nominal, and must remain
connected (or “ride-through”) for a duration of 2.5 s when the measured voltage lies between 80% and 87% of nominal. In the
UK there are three other publications that prescribe inverter fault operation, the EREC G59/3 [15], the UK Distribution Code
[16] and the UK Grid Code [17]. G59/3 applies to higher capacity DG (3.68-17 kW per phase or 11.04-50 kW three phase),
however, the undervoltage requirements specified in G59/3 are the same as G83/2 so the findings presented in this paper are
applicable to DG installations up to 17 kW single-phase or 50 kW three phase. In the event of conflict between the ERECs and
33/11kV
CB AFee
de
r 1
Fee
de
r 2CB C
Single phase inverter-interfaced generation (<3.68kW per phase)
Fault
CB B
0.4/11kV
~~~
~~~
33/11kV
3
the Distribution/Grid Code, the Distribution/Grid Code supersedes the ERECs. However, with regards to the undervoltage
protection requirements evaluated and reported upon in this paper there is no conflict.
This paper builds on the work of [9] by evaluating the response of a single-phase 3 kW inverter to faults in a laboratory
environment (section 2). The observed responses have subsequently been used to create a model of the inverter within the
PSCAD simulation package [18]; this allows the behaviour of several small inverter installations to be characterised accurately.
The 11/0.4 kV power system within which the inverters are modelled reflects an actual UK power network, with the network
data and protection settings being supplied by a UK DNO (section 3). A solution to the problem of sympathetic tripping by
modifying existing network protection settings is then presented (section 7).
2 Laboratory testing of inverter
In the laboratory experiments, faults have been placed on to the power system in the vicinity of the inverter; the magnitude of the
voltage depression at the inverter’s terminals was controlled using a fault thrower and a voltage divider implemented using an
inductor bank as shown in Fig. 2.
Fig. 2 Experimental arrangement to test inverter’s response to network faults
Inverter
XL=2.0576 ohmsper phase at 50Hz
Impedanceto Fault
Isolation Amplifier
PMC analogue
input board
RTX
Desktop PC
Fault Thrower
A
V
~
A V
A V
11kV
400V
Advantage GUI
MicrogridDisconnected during fault
Configurable Fault
4
Several experiments were conducted, with terminal voltages of 0.83 pu, 0.66 pu, 0.47 pu, 0.22 pu and 0.15 pu as a consequence
of local faults being synthesised at the inverter’s terminals using the voltage divider arrangement. As one would expect, the
inverter’s fault current contribution varies in terms of both magnitude and phase as the impedance to the fault is varied (as shown
in Fig. 3). It is interesting to note that the fault current magnitude and phase angle do not remain constant during the fault, as
evidenced by the inverter’s response to faults causing voltages of 0.22 pu and 0.15 pu at the inverter’s terminal (as shown in the
final two graphs in Fig. 3). At these terminal voltages, the phase angle between the supplied voltage and current is larger than
for the higher voltages of 0.83 pu, 0.66 pu and 0.47 pu. Without having access to the confidential software controlling the
inverter’s fault response, the authors can only speculate on the behaviour of the inverter at voltages 0.22 pu and 0.15 pu.
However, it is probable that the phase locked loop in the inverter may be maloperating due to the low magnitude of the system
voltage that is used as a reference.
The maximum recorded fault current from the inverter was 1.08 pu rms when the terminal voltage level was 0.15 pu (on a 3 kW
and 230 V rms base). This is lower than that suggested by the majority of the literature: for example, [19] suggests 2 pu fault
current could be supplied by a 3-phase 15 kVA inverter-interfaced DG, [20] states that 2 pu is typical as a “rule of thumb” for
industry, but records a 4-5 pu fault current in a laboratory test of an inverter and [21] states that 1.6 pu is typical for inverters
employed in shipboard applications. The authors can only speculate on the difference between the recorded results and the
results in the literature; however it may be due to the nature of the inverter application. Higher rated semiconductor switches
capable of withstanding fault currents greater than the rating of the inverter tend to be more expensive. It is therefore
economically inadvisable to design the inverter to be capable of producing fault currents far in excess of its rating. Many of the
fault tests in the literature are performed on specialised inverter equipment that may be overrated for shipboard [21] or research
applications [19].
As the inverter terminal voltage decreases (as would be the case for faults progressively closer to the inverter’s location), the
fault current supplied by the inverter increases. It can be observed from Fig. 3 that the reactive component of the inverter’s fault
contribution becomes more significant at lower voltages. To investigate the degree to which the inverter’s control and protection
functions comply with G83/2 undervoltage requirements, the inverter terminal voltage and the duration of the inverter’s supply
of fault current (or “connection time”) at each voltage level were recorded. It can be seen that at low voltages, the inverter tends
to disconnect faster than the 0.5s requirement in G83/2.
5
Fig. 3 Inverter’s fault response during network faults
-1.5
-1
-0.5
0
0.5
1
1.5
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e an
d C
urr
ent
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.83pu inverter terminal voltage
Voltage (pu)
Current (pu)
Fault inception
-1.5
-1
-0.5
0
0.5
1
1.5
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e an
d C
urr
ent
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.76pu inverter terminal voltage
Voltage (pu)
Current (pu)
Fault inception
-1.5
-1
-0.5
0
0.5
1
1.5
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e an
d C
urr
ent
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.66pu inverter terminal voltage
Voltage (pu)
Current (pu)
Fault inception
-1.5
-1
-0.5
0
0.5
1
1.5
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e an
d C
urr
ent
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.47pu inverter terminal voltage
Voltage (pu)
Current (pu)Fault inception
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e an
d C
urr
ent
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.22pu inverter terminal voltage
Voltage (pu)
Current (pu)
Fault inception
-2
-1.5
-1
-0.5
0
0.5
1
1.5
2
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Vo
ltag
e a
nd
Cu
rre
nt
(pu
)
Time (s)
Voltage and current (pu): 3 phase fault, 0.15pu inverter terminal voltage
Voltage (pu)
Current (pu)
Fault inception
6
The inverter manufacturer advised that the inverter must turn off quickly to avoid internal damage when severe undervoltages are
encountered. This safety mechanism prevents the inverter from complying with G83/2 when the voltage is particularly
depressed (this can be observed in Fig. 3 at voltage 0.22 pu and 0.15 pu). The inverter manufacturer also confirmed that the
inverter will not produce higher than 1.2 pu fault current, even for a bolted short circuit at the inverter terminals. Based on this
information, the inverter fault response was approximated as shown in Fig. 4 for subsequent use in simulation. Fig. 4 shows the
maximum recorded fault current and the corresponding inverter terminal voltage for each fault test. It is assumed that the
inverter transits from being compliant with G83/2 to being non-compliant at the midpoint between data point (0.22, 0.98) and
(0.47, 0.68), corresponding to a voltage of 0.35 pu. The phase angle between voltage and current for the inverter’s fault response
was simulated as the averaged phase angle over the duration of the fault as shown in Fig. 3.
Fig. 4 Modelled inverter fault response
The laboratory inverter fault tests were repeated in simulation to evaluate the fidelity of the simulated inverter model. For
comparison, the simulated inverter fault response and the laboratory fault response are shown in Fig. 5 (for a fault resulting in a
voltage of 0.83 pu at the inverter’s terminals). To simplify the model, the inverter outputs zero current before the fault is applied.
This simplification does not influence this investigation as pre-fault current has no impact on sympathetic tripping. The model is
configured to continuously output the maximum fault current recorded over the duration of the fault in the laboratory test, even
though the actual device’s current reduces with time. This sustained response was chosen in order to evaluate the maximum
potential impact the inverter could have on sympathetic tripping, in terms of fault current and system voltage support.
0.90, 0.56
0.83, 0.57
0.76, 0.60
0.66, 0.65
0.47, 0.68
0.35, 0.72
0.35, 0.87
0.22, 0.98
0.15, 1.09
0.00, 1.20
0.5
0.6
0.7
0.8
0.9
1
1.1
1.2
1.3
1.4
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
Fau
lt c
urr
ent
(rm
s) (
pu
)
Voltage at inverter terminals (rms) (pu)
7
Fig. 5 Comparison between inverter's simulated and laboratory fault response
3 Investigation of Sympathetic tripping using the developed model
The sympathetic tripping problem has been evaluated, using the inverter model, on a model of an actual urban UK distribution
system (data provided by a UK DNO), shown in Fig. 6. The network topology and electrical parameters (including impedances,
load data and protection settings) were provided by the DNO. The network data are shown in Table 1 and Table 2 and the
protection settings are given in the following section.
Fig. 6 Simulation model for evaluating sympathetic tripping based on UK DNO 11 kV system
-1.5
-1
-0.5
0
0.5
1
1.5
0 0.02 0.04 0.06 0.08 0.1 0.12 0.14 0.16 0.18 0.2
Cu
rre
nt
(pu
)
Time (s)
Measured and simulated current (pu): 3 phase fault, 0.83pu inverter terminal voltage
Measured current (pu)
Simulated current (pu)
Fault inception
11kV
33kV 33kV
11kV
CB A
Feeder 1 Feeder 2
CB B
~~
~~
~~
~~
~
1
2
3
4
5
6
8
7
9
Grid infeed fault level485 MVA at 33kV, X/R = 4.9
10
11
12
13
14
15
16
17
18
19
2021 22 23 24 25
Normal open point
0.4/11kV
194 customers
156 customers
212 customers
196 customers
171 customers
156 customers
226 customers
213 customers
288 customers
26
Junction 1
Junction 2
1
2
3
4
5
6
8
9
8
Table 1 Feeder 1 network data
Table 2 Feeder 2 network data
Faults were applied on feeder 1 at 17 different locations corresponding to each of the 11 kV spurs (numbered 10-26 on the
diagram) connected to feeder 1. On feeder 2, the loads and aggregated capacities of the inverters on each spur (1-9) were based
upon the number of customers on each spur. The maximum per-phase load current measured on feeder 2 was 160A (equating to
just over 3MVA) and the minimum load was 40A (0.75MVA) in the year 2011. The average load on feeder 2 over the course of
2011 was 100A (1.9MVA); this load has been assumed to be distributed evenly across all customers on each LV spur. To
evaluate the sympathetic tripping problem, the number of customers with 3kW inverters installed on feeder 2 was varied. The
combined fault contribution of the inverters on each spur was modelled as a single three-phase inverter unit, e.g. 100 customers
would equate to a three-phase inverter with a capacity of 300 kW, with the response based on the developed inverter model and
scaled appropriately.
From To R (W ) X (W ) Distance (m)
Feeder 1 10 0.2417 0.1276 1501.29
10 11 0.2395 0.1264 1487.49
11 12 0.1092 0.0448 246.80
12 13 0.0494 0.0203 253.35
13 14 0.0272 0.0143 168.78
14 15 0.0005 0.0003 1.56
15 16 0.2223 0.0682 284.42
16 17 0.0013 0.0007 3.52
17 18 0.0595 0.0290 28.99
18 19 0.1692 0.0498 206.19
19 20 0.0238 0.0063 15.85
20 21 0.0589 0.0311 310.09
21 22 0.0026 0.0014 16.37
22 23 0.0509 0.0253 53.84
23 24 0.0658 0.0422 438.31
24 25 0.0020 0.0012 6.82
25 26 0.0871 0.0559 513.37
From To R (W ) X (W ) Distance (m)
Feeder 2 Junction 1 0.5043 0.2662 3132.01
Junction 1 1 0.0018 0.0006 6.92
1 2 0.1723 0.0466 520.36
2 3 0.1484 0.0420 468.62
3 4 0.1699 0.0441 496.95
4 Junction 2 0.0252 0.0058 66.99
Junction 1 5 0.2260 0.0677 782.68
5 6 0.0041 0.0025 32.44
6 7 0.0612 0.0211 248.93
7 Junction 2 0.1365 0.0385 445.90
Junction 2 8 0.0199 0.0055 60.62
8 9 0.0725 0.0252 302.44
9
3.1 Protection settings
The protection settings for feeders 1 and 2, in accordance with the DNO’s protection policy, are given in Table 3.
Table 3 Feeder protection settings
Feeder protection settings
CB A CB B
Primary pickup current (A)
400 400
Time Multiplier
0.2 0.1
3.2 3 kW inverter model
The inverter model’s control diagram is shown in Fig. 7.
Fig. 7 Control diagram for inverter model’s fault response
The inverter monitors its terminal voltage and outputs a corresponding Id and Iq setting value to the three phase current source as
shown in Fig. 4. During faults, the inverter control block performs a lookup function based on data recorded from the laboratory
fault tests. The voltage measured at the inverter/grid point of common coupling in simulation is used to determine the inverter’s
current response based on the data shown in Fig. 4 and the inverter’s disconnection time based on the data shown in Fig. 3.
4 Simulation Results
The network presented in section 3 was simulated to evaluate the risk of inverters sympathetically tripping for faults on an
adjacent feeder. The number of customers with inverters was varied from 25% to 100% in 5% increments and from this point
forward, the percentage of customers with inverters will be referred to as the “penetration level”. The only condition when the
PLL
q
Inverse Park Transform
Inverter controlfrom Fig. 4 and Fig. 5
Vabc
Fault response
3 wire inverter 400V gridconnection
Id, Iq
10
feeder relay operated faster than the inverter’s protection, i.e. sympathetic tripping did not occur, was when 100% of customers
had inverters installed. At 100% penetration sympathetic tripping did not occur for faults at positions 10 and 26 but did occur for
fault positions 11-25. In this case, two factors contributed to the avoidance of sympathetic tripping: at fault position 10 the
impedance (distance) between the fault and the relay is low meaning the fault current measured by the relay is high causing the
relay to trip quickly enough to avoid sympathetic tripping occurring; at fault position 26 the voltage at the inverters (increases
with distance/impedance to fault) is high enough such that the undervoltage protection doesn’t operate and once again
sympathetic tripping is avoided. At positions 11-25 neither of these conditions are met so sympathetic tripping occurs.
By changing the feeder protection settings, the risk of sympathetic tripping can be reduced. Table 4 shows the protection
operation times if the time multiplier (TM) on the protection relay on feeder 1 was changed from 0.2 to 0.1 for an inverter
penetration level of 25%. In the last two columns of Table 4 the transient fault voltage at the inverter and the operation time of
inverter 4 are included. Where the feeder protection operates before the inverter, the inverter operation time is listed as ‘-‘, as the
inverter will not operate after the fault is cleared and the voltage restored. The results from inverter 4 were chosen to be
representative of all the inverters on the network due to its position in the middle of the network (shown in Fig. 6). Note that in
Table 4 and Table 5 the following symbols are used: = inverter never operates (it would operate in 0.5s if the fault was
sustained), = inverter never operates (it would operate in 2.5s if the fault was sustained), = inverter never operates,
= inverter operates before relay.
Table 4 Protection (feeder 1) and inverter responses, with reduced TM (=0.1)
1 2 3 4 5 6 7 8 9 time (s) V (pu)
10 0.24 - 0.36
11 0.26 - 0.53
12 0.27 - 0.59
13 0.27 - 0.61
14 0.27 - 0.62
15 0.27 - 0.62
16 0.29 - 0.70
17 0.29 - 0.70
18 0.30 - 0.72
19 0.31 - 0.76
20 0.31 - 0.76
21 0.32 - 0.77
22 0.32 - 0.77
23 0.32 - 0.78
24 0.33 - 0.79
25 0.33 - 0.79
26 0.34 - 0.80
Fault
location
Feeder protection
time (s)
Inverter response Inverter 4 response
11
It can be observed that in this instance the feeder protection, with a modified setting, operates before the inverter protection at all
fault locations. In this case, a small change to the feeder protection settings has removed the risk of sympathetic tripping. This is
unlikely to be a viable solution in most protection schemes. Changing the TM of one protection relay will change the grading
margin between protection devices and could potentially lead to loss of coordination between the feeder protection and
downstream (or upstream) devices.
5 Impact of inverter response on risk of sympathetic tripping
The inverter fault response also has an influence on the risk of sympathetic tripping. To evaluate the impact of an inverter with
increased fault current contribution the simulation was repeated with an idealised inverter model capable of providing 2 pu fault
current. It is assumed that the inverter supplied 2 pu current for all voltages levels less than 0.9 pu and that the active and
reactive components of the fault current were 1.6 pu and 1.2 pu respectively (i.e. in this scenario the inverter generates reactive
power to support the grid voltage). The relative magnitudes of real and reactive power will depend on the impedance to fault and
the inverter’s controller action. It is also assumed that, unlike the previous inverter, this inverter complies with G83/2 with
respect to tripping times at all undervoltage levels. The feeder protection operating times (assuming 100% inverter penetration)
are shown in Table 5. As in Table 4 the parameters of inverter 4 during the fault are given in the last two columns in Table 5.
Table 5 Protection (feeder 1) and inverter responses – inverter with 2 pu fault current contribution
1 2 3 4 5 6 7 8 9 time (s) V (pu)
10 0.46 - 0.46
11 0.49 - 0.66
12 0.51 0.50 0.72
13 0.52 0.50 0.75
14 0.53 0.50 0.76
15 0.53 0.50 0.76
16 0.56 - 0.85
17 0.56 - 0.85
18 0.57 - 0.87
19 0.59 - 0.91
20 0.59 - 0.91
21 0.60 - 0.92
22 0.60 - 0.92
23 0.61 - 0.93
24 0.62 - 0.95
25 0.63 - 0.95
26 0.64 - 0.96
Inverter 4 responseFault
location
Feeder protection
time (s)
Inverter response
12
In this case, the higher fault rating of the inverter means the inverter is better able to support its terminal voltage. Consequently,
there are fewer fault locations that result in the inverter sympathetically tripping before the adjacent faulted feeder’s protection.
At the electrically “closest” faults i.e. fault locations 10 and 11, the fault current is high enough to trip the feeder protection
before the inverters on the non-faulted feeder disconnect. At ‘distant’ faults i.e. fault locations 16-18, the undervoltage at the
various inverters’ terminals is between 0.8 pu and 0.87 pu so the inverter would disconnect according to the upper G83/2 setting
of 2.5 s (long after the feeder protection operates, so sympathetic tripping will not occur). At the fault locations furthest along
feeder 1 i.e. 19-26, the voltage at the terminals of the inverters remains above 0.87 pu, so the inverter will remain connected
regardless of the fault duration. For fault locations 12-15 the voltage at the inverters’ terminals is below 0.8 pu so the inverters’
undervoltage protection operate within 0.5s and before the feeder protection, i.e. a manifestation of the sympathetic tripping
problem. In summary, increasing inverter fault current capacity will reduce the risk of sympathetic tripping as shown in Table 5.
This could be achieved by increasing the number of inverters (although this is not practicable, and the sympathetic tripping
would still occur at lower penetrations) or by modifying the inverter control algorithm. In the latter case the limiting factors in
increasing the inverters fault current contribution would be the availability of the primary energy source supplying the inverter
(in an urban network this is likely to be solar radiation) and the rating of the inverter itself.
6 Analysis
For the network considered in this study, the results indicate that sympathetic tripping can occur at many inverter-interfaced DG
locations, for a wide range of fault locations on the faulted feeder. It has also been established that changes to protection settings
and inverter behaviour (which is likely to differ between manufacturers) has a large influence on the likelihood of sympathetic
tripping occurring. This makes it difficult to predict the risk of sympathetic tripping without running a detailed simulation of a
specific network with specific network protection settings. Due to the difficulty in predicting the occurrence of sympathetic
tripping, a solution independent of the settings of the individual network protection scheme or the inverter penetration (or fault
responses) is desirable, and candidate solutions will now be described.
7 Solutions to the sympathetic tripping problem
The instances of sympathetic tripping could potentially be reduced significantly through use of instantaneous feeder protection,
but perhaps at the expense of greater numbers of customers being disconnected and loss of ability to provide time-graded
protection. However, for areas of the feeder that are not protected by instantaneous protection, e.g. at the “downstream ends” of
feeders and for instances when backup protection operates, sympathetic tripping could remain an insurmountable issue.
Furthermore, instantaneous protection is only applicable on long feeders where the fault level reduces significantly between
13
protection locations, so many feeders do not have instantaneous protection applied. In the short term, there are incremental
solutions that can be used to reduce the occurrence of sympathetic tripping. These solutions include changing protection
settings, changing the employed overcurrent protection characteristic curves and changing the relevant standards for DG
interface protection, but of course one must remain mindful of the possibility of negative consequences arising from these
actions.
7.1 Solution option 1: modified protection settings or use of communicating protection
As has already been shown in section 4, changing the settings of the feeder protection can reduce the risk of sympathetic
tripping. However, as has already been discussed, changing the settings of one relay within a protection scheme will most likely
lead to loss of coordination between protection devices [22]. The entire protection scheme would need to be updated to
accommodate the addition of inverter-interfaced DG and this could lead to unacceptable fault clearance times [23]. Furthermore,
the intermittent nature of DG might mean that the network protection system would not operate correctly for all operational
scenarios.
An alternative solution could be to change the nature of the overcurrent protection relays’ characteristic curves, which is readily
achievable with modern numerical relays, where standard (SI), very (VI) and extremely (EI) inverse characteristics may be
selected. Changing the protection characteristic can modify the speed of operation of the protection relay for a given fault
current and act to reduce the risk of sympathetic tripping of DGs connected to the network. To evaluate the impact of the relay
characteristic on sympathetic tripping the simulation was repeated with a penetration level of 25% and the protection relay
characteristic changed from SI to EI. The response (in terms of the inverter protection operation) was the same as in Table 4, but
the network protection operated faster for all fault locations. However, this solution may also result in grading problems
between protection devices, so may not be viable in all cases.
Finally, communicating protection (e.g. current differential, or schemes employing blocking or accelerating signalling) could
provide a solution, but this would be complex, costly, perhaps compromise reliability and such solutions are not deemed to be
economically justifiable in many cases.
7.1 Solution option 2: modified G83/2 settings
An alternative solution to modifying protection response or type would be to alter the G83/2 policy. If G83/2 were updated so
that the undervoltage time settings were delayed by 0.5s i.e. for voltages less than 80% the inverter would be controlled to
disconnect after 1s and for voltages between 80 and 87% the inverter would be controlled to disconnect after 3s, then the risk of
14
sympathetic tripping could be reduced. The impact of relaxing the G83/2 time delay settings in increments of 0.1s is shown in
Fig. 8.
Fig. 8 Impact of changing G83/2 settings on sympathetic tripping
The results shown in Fig. 8 are for an inverter penetration level of 100% and the times correspond to the behaviour of inverter 5.
Due to the small line impedance between the inverters they effectively operate at the same time. Inverter 5 was chosen
arbitrarily as a representation of the typical operation time of most inverters. It can be seen that if both the lower and upper
settings are increased by 0.1 s, then sympathetic tripping is avoided for fault positions 19-26. If the setting is increased by 0.2 s,
then sympathetic tripping is avoided at all fault positions. However, relaxing undervoltage settings may have negative physical
impact on the DG and/or inverter performance. However, increasing the “ride through” capabilities of DG, and reflecting this in
standards, may be the preferred solution in the longer term.
8 Conclusions
This paper has quantified the risk of sympathetic tripping under a variety of scenarios and investigated the impact of network
protection settings and inverter fault behaviour on this risk, evaluating the effectiveness of changing protection settings,
protection relay characteristic curves and undervoltage settings as specified in G83/2 to reduce the risk of sympathetic tripping
occurring. The results suggest that the only short term solution that does not lead to loss of protection coordination or require the
inverter fault response to be modified is to change the settings stipulated in G83/2. The undervoltage protection settings of
G83/2 exist so that during a sustained undervoltage, inverters do not continue to supply loads at a voltage outside normal
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
Pro
tect
ion
op
era
tio
n t
ime
(s)
Fault position
Relay
Standard G83/2
G83/2 + 0.1s
G83/2 + 0.2
G83/2 + 0.3
G83/2 + 0.4
15
operating conditions. The impact on generators and loads needs to be considered extensively before any changes are made to
undervoltage protection settings and this investigation should be conducted as future work.
9 References
[1] "The EU's Target for Renewable Energy: 20% by 2020," European Union Committee, London, October 2008,
[2] "EU Energy Policy to 2050: Achieving 80-95% emissions reductions," European Wind Energy Association, March 2011,
p. 68.
[3] Ofgem, "Feed-in Tariff Annual Report 2012-13," Dec 2013, pp. 2-3.
[4] L. Freris and D. Infield, "Renewable Energy in Power Systems," 1st ed Chichester: John Wiley & Sons Ltd, 2008, pp.
122, 128, 133, 192, 144-145.
[5] A. Dysko, et al., "UK distribution system protection issues," Generation, Transmission & Distribution, IET, vol. 1, pp.
679-687, 2007.
[6] A. F. Naiem, et al., "A Classification Technique for Recloser-Fuse Coordination in Distribution Systems With Distributed
Generation," Power Delivery, IEEE Transactions on, vol. 27, pp. 176-185, 2012.
[7] D. Salles, et al., "Nondetection Index of Anti-Islanding Passive Protection of Synchronous Distributed Generators," IEEE
Transactions on Power Delivery, vol. 27, pp. 1509-1518, 2012.
[8] H. H. Zeineldin and J. L. Kirtley, "A Simple Technique for Islanding Detection With Negligible Nondetection Zone,"
Power Delivery, IEEE Transactions on, vol. 24, pp. 779-786, 2009.
[9] K. I. Jennett, et al., "Analysis of the Sympathetic Tripping Problem for Networks with High Penetrations of Distributed
Generation," presented at the The International Conference on Advanced Power System Automation and Protection,
Beijing, 2011.
[10] F. Coffele and C. D. Booth, "Detailed analysis of the impact of distributed generation and active network management on
network protection systems," presented at the 21st International Conference on Electricity Distribution, Frankfurt, 2011.
[11] P. K. Naik, et al., "IEC 61850 based smart distribution protection: Solutions for sympathetic tripping," in Innovative
Smart Grid Technologies Asia (ISGT), 2011 IEEE PES, 2011, pp. 1-7.
[12] A. B. Othman, et al., "Prevention of sympathetic tripping phenomena on power system by fault level management," in
Transmission and Distribution Conference and Exposition, 2008. IEEE/PES, 2008, pp. 1-14.
[13] S. Mladenovic and A. A. Azadvar, "Sympathetic trip prevention by applying simple current relays," in Power and Energy
Society General Meeting, 2010 IEEE, 2010, pp. 1-7.
[14] "Recommendations for the Connection of Type Tested Small-scale Embedded Generators (Up to 16A per Phase) in
Parallel with Low-Voltage Distribution Systems," Operations Directorate of Energy Networks Association, London,
Engineering Recommendation G83 Issue 2 (August 2012),
[15] "Engineering Recommendation G59/3 Recommendations for the connection of generation plant to the distribution
systems of licensed distribution network operators," Operations Directorate of Energy Networks Association, London,
Engineering Recommendation 2013,
[16] "The Distribution Code and the Guide to the Distribution Code of Licensed Distribution Network Operator," Jan 2014,
[17] "The Grid Code," National Grid, Dec 2013,
[18] (2009, January). PSCAD, version 4.4.0.0, June 13th 2011, Manitoba HVDC Research Centre (software). [Online].
Available: https://hvdc.ca/pscad/
[19] M. Brucoli, et al., "Modelling and Analysis of Fault Behaviour of Inverter Microgrids to Aid Future Fault Detection," in
System of Systems Engineering, 2007. SoSE '07. IEEE International Conference on, 2007, pp. 1-6.
[20] J. Keller and B. Kroposki, "Understanding Fault Characteristics of Inverter-Based Distributed Energy Resources,"
National Renewable Energy Laboratory, Alliance for Sustainable Energy 2010, p. 26.
[21] C. J. L. Wood and L. C. P. Parvin, "Future Electrical Systems – The Possibilities," presented at the AES 2007 The Vision
Redrawn, London, 2007.
[22] M. M. Mansour, et al., "A Modified Particle Swarm Optimizer for the Coordination of Directional Overcurrent Relays,"
Power Delivery, IEEE Transactions on, vol. 22, pp. 1400-1410, 2007.
[23] H. H. Zeineldin, "Optimal coordination of microprocessor based directional overcurrent relays," in Electrical and
Computer Engineering, 2008. CCECE 2008. Canadian Conference on, 2008, pp. 000289-000294.