8/19/2019 irfb4410

1/1205/02/0

Benefits Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness Fully Characterized Capacitance and Avalanche  SOA Enhanced body diode dV/dt and dI/dt Capability

www.irf.com 1

D2PakIRFS4410

TO-220AB

IRFB4410

TO-262IRFSL4410

IRFB4410

IRFS4410IRFSL4410

HEXFET 

Power MOSFETApplications High Efficiency Synchronous Rectification in SMPS

Uninterruptible Power Supply High Speed Power Switching Hard Switched and High Frequency Circuits

S

D

G

SD

G

S

D

GS

D

G

VDSS 100VRDS(on)  typ. 8.0m   max. 10m

 

ID 96A

Absolute Maximum RatingsSymbol Parameter Units

ID @ TC = 25°C Continuous Drain Current, VGS @ 10V A

ID @ TC = 100°C Continuous Drain Current, VGS @ 10V

IDM Pulsed Drain Current  

PD @TC = 25°C Maximum Power Dissipation W

Linear Derating Factor W/°C

VGS Gate-to-Source Voltage V

dv/dt Peak Diode Recovery   V/ns

TJ Operating Junction and °C

TSTG Storage Temperature Range

Soldering Temperature, for 10 seconds

(1.6mm from case)

Mounting torque, 6-32 or M3 screw

Avalanche CharacteristicsEAS (Thermally limited) Single Pulse Avalanche Energy   mJ

IAR Avalanche Current   A

EAR Repetitive Avalanche Energy   mJ

Thermal ResistanceSymbol Parameter Typ. Max. Units

RθJC Junction-to-Case   ––– 0.61

RθCS Case-to-Sink, Flat Greased Surface , TO-220 0.50 ––– °C/W

RθJA Junction-to-Ambient, TO-220   ––– 62

RθJA Junction-to-Ambient (PCB Mount) , D2Pak  

––– 40

220

See Fig. 14, 15, 16a, 16b

250

19

-55 to + 175

 ± 20

1.6

10lb

in (1.1N

m)

300

Max.

96 

68 

380

8/19/2019 irfb4410

2/12

2 www.irf.com

 Calculated continuous current based on maximum allowable junction

  temperature. Package limitation current is 75A.

 Repetitive rating; pulse width limited by max. junction

temperature.

 Limited by TJmax, starting TJ = 25°C, L = 0.14mH

  RG = 25Ω, IAS = 58A, VGS =10V. Part not recommended for use

  above this value.

ISD ≤ 58A, di/dt ≤ 650A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.

 Pulse width ≤ 400µs; duty cycle ≤ 2%.

S

D

G

 Coss eff. (TR) is a fixed capacitance that gives the same charging time

  as Coss while VDS is rising from 0 to 80% VDSS.

 Coss eff. (ER) is a fixed capacitance that gives the same energy as

  Coss while VDS is rising from 0 to 80% VDSS.

 When mounted on 1" square PCB (FR-4 or G-10 Material). For recommend  footprint and soldering techniques refer to application note #AN-994.

 θ   

Static @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. UnitsV(BR)DSS Drain-to-Source Breakdown Voltage 100 ––– ––– V

∆

V(BR)DSS / ∆

TJ Breakdown Voltage Temp. Coefficient ––– 0.094 ––– V/°CRDS(on) Static Drain-to-Source On-Resistance ––– 8.0 10 mΩVGS(th) Gate Threshold Voltage 2.0 ––– 4.0 V

IDSS Drain-to-Source Leakage Current ––– ––– 20 µA

––– ––– 250

IGSS Gate-to-Source Forward Leakage ––– ––– 200 nA

Gate-to-Source Reverse Leakage ––– ––– -200

RG Gate Input Resistance ––– 1.5 ––– Ω f = 1MHz, open drain

Dynamic @ TJ = 25°C (unless otherwise specified)

Symbol Parameter Min. Typ. Max. Unitsgfs Forward Transconductance 120 ––– ––– S

Qg Total Gate Charge ––– 120 180 nC

Qgs Gate-to-Source Charge ––– 31 –––Qgd Gate-to-Drain ("Miller") Charge ––– 44 –––

td(on) Turn-On Delay Time ––– 24 ––– ns

tr Rise Time ––– 80 –––

td(off) Turn-Off Delay Time ––– 55 –––

tf Fall Time ––– 50 –––

Ciss Input Capacitance ––– 5150 ––– pF

Coss Output Capacitance ––– 360 –––

Crss Reverse Transfer Capacitance ––– 190 –––

Coss eff. (ER) Effective Output Capacitance (Energy Related) ––– 420 –––

Coss eff. (TR) Effective Output Capacitance (Time Related)   ––– 500 –––

Diode CharacteristicsSymbol Parameter Min. Typ. Max. Units

IS Continuous Source Current ––– ––– 96  A

(Body Diode)

ISM Pulsed Source Current ––– ––– 380 A

(Body Diode) 

VSD Diode Forward Voltage ––– ––– 1.3 V

trr Reverse Recovery Time ––– 38 56 ns TJ = 25°C VR = 85V,

––– 51 77 TJ = 125°C IF = 58A

Qrr Reverse Recovery Charge ––– 61 92 nC TJ = 25°C di/dt = 100A/µs  

––– 110 170 TJ = 125°C

IRRM Reverse Recovery Current ––– 2.8 ––– A TJ = 25°C

ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

ConditionsVDS = 50V, ID = 58A

ID = 58A

VGS = 20V

VGS = -20V

MOSFET symbol

showing the

VDS = 80V

Conditions

VGS = 10V  

VGS = 0V

VDS = 50V

 ƒ = 1.0MHz

VGS = 0V, VDS = 0V to 80V   , See Fig.11

VGS = 0V, VDS = 0V to 80V   , See Fig. 5

TJ = 25°C, IS = 58A, VGS = 0V  

integral reverse

p-n junction diode.

ConditionsVGS = 0V, ID = 250µA

Reference to 25°C, ID = 1mA 

VGS = 10V, ID = 58A  

VDS = VGS, ID = 150µA

VDS = 100V, VGS = 0V

VDS = 100V, VGS = 0V, TJ = 125°C

ID = 58A

RG = 4.1Ω

VGS = 10V  

VDD = 65V

8/19/2019 irfb4410

3/12

www.irf.com 3

Fig 1.  Typical Output Characteristics

Fig 3.  Typical Transfer Characteristics Fig 4.  Normalized On-Resistance vs. Temperature

Fig 2.  Typical Output Characteristics

Fig 6.  Typical Gate Charge vs. Gate-to-Source VoltageFig 5.  Typical Capacitance vs. Drain-to-Source Voltage

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

   I   D ,   D  r  a   i  n  -   t  o  -   S  o  u  r  c

  e   C  u  r  r  e  n   t   (   A   )

4.5V

≤60µs PULSE WIDTH

Tj = 175°C

VGSTOP 15V

10V8.0V6.0V5.5V5.0V4.8V

BOTTOM 4.5V

2 3 4 5 6 7 8 9 10

VGS, Gate-to-Source Voltage (V)

0.1

1

10

100

1000

   I   D ,   D  r  a   i  n  -   t  o  -   S  o  u  r  c  e   C  u  r  r  e  n   t     (     Α   )

TJ = 25°C

TJ = 175°C

VDS = 25V

≤60µs PULSE WIDTH

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Junction Temperature (°C)

0.5

1.0

1.5

2.0

2.5

3.0

   R   D   S   (  o  n   ) ,   D  r  a   i  n  -   t  o  -   S  o  u  r  c  e   O  n   R  e  s   i  s   t  a  n  c  e

 

   (   N  o  r  m  a   l   i  z  e   d   )

ID = 58A

VGS = 10V

1 10 100

VDS, Drain-to-Source Voltage (V)

100

1000

10000

100000

   C ,   C  a  p  a  c   i   t  a  n

  c  e   (  p   F   )

VGS = 0V, f = 1 MHZ

Ciss = Cgs + Cgd, C ds SHORTED

Crss = CgdCoss = Cds + Cgd

Coss

Crss

Ciss

0 20 40 60 80 100 120

 QG Total Gate Charge (nC)

0.0

2.0

4.0

6.0

8.0

10.0

12.0

   V   G   S ,   G  a   t  e  -   t  o  -   S  o  u  r  c

  e   V  o   l   t  a  g  e   (   V   ) VDS= 80V

VDS= 50V

VDS= 20V

ID= 58A

0.1 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

0.1

1

10

100

1000

   I   D ,   D  r  a   i  n  -   t  o  -   S  o  u  r  c

  e   C  u  r  r  e  n   t   (   A   )

VGSTOP 15V

10V8.0V6.0V5.5V5.0V4.8V

BOTTOM 4.5V

≤60µs PULSE WIDTH

Tj = 25°C

4.5V

8/19/2019 irfb4410

4/12

4 www.irf.com

Fig 8.  Maximum Safe Operating Area

Fig 10.  Drain-to-Source Breakdown Voltage

Fig 7.  Typical Source-Drain Diode Forward Voltage

Fig 11.  Typical COSS Stored Energy

Fig 9. Maximum Drain Current vs. Case Temperature

Fig 12.  Maximum Avalanche Energy vs. DrainCurrent

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8

VSD, Source-to-Drain Voltage (V)

1

10

100

1000

   I   S   D ,   R  e  v  e  r  s  e   D  r  a

   i  n   C  u  r  r  e  n   t   (   A   )

TJ = 25°C

TJ = 175°C

VGS = 0V

25 50 75 100 125 150 175

 TC , Case Temperature (°C)

010

20

30

40

50

60

70

80

90

100

   I   D ,    D  r  a   i  n   C  u  r  r  e  n   t   (   A   )

Limited By Package

-60 -40 -20 0 20 40 60 80 100 120 140 160 180

TJ , Temperature ( °C )

100

105

110

115

120

125

130

   V   (   B   R   )   D

   S   S ,    D  r  a   i  n  -   t  o  -   S  o  u  r  c  e   B  r  e  a   k   d  o  w  n   V  o   l   t  a  g  e   (

   V   )

0 20 40 60 80 100 120

VDS, Drain-to-Source Voltage (V)

0.0

0.5

1.0

1.5

2.0

   E  n  e  r  g  y   (

  µ   J   )

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

0

100

200

300

400

500

600

700

800

900

   E   A   S ,   S   i  n  g   l  e   P  u   l  s  e   A  v  a   l

  a  n  c   h  e   E  n  e  r  g  y   (  m   J   )

ID

TOP 6.7A

9.7A

BOTTOM58A

0 1 10 100 1000

VDS, Drain-to-Source Voltage (V)

1

10

100

1000

   I   D ,   D  r  a   i  n  -   t  o  -   S  o  u  r

  c  e   C  u  r  r  e  n   t   (   A   )

OPERATION IN THIS AREALIMITED BY R DS(on)

Tc = 25°CTj = 175°CSingle Pulse

100µsec

1msec

10msec

DC

8/19/2019 irfb4410

5/12

www.irf.com 5

Fig 13.  Maximum Effective Transient Thermal Impedance, Junction-to-Case

Fig 14.  Typical Avalanche Current vs.Pulsewidth

Fig 15.  Maximum Avalanche Energy vs. Temperature

Notes on Repetitive Avalanche Curves , Figures 14, 15:(For further info, see AN-1005 at www.irf.com)1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far inexcess of T jmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long as neither T jmax nor  Iav (max) is exceeded.3. Equation below based on circuit and waveforms shown in Figures 16a, 16b4. PD (ave) = Average power dissipation per single avalanche pulse.5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).6. Iav = Allowable avalanche current.

7. ∆T = Allowable rise in junction temperature, not to exceed T jmax (assumed as

25°C in Figure 14, 15).tav = Average time in avalanche.D = Duty cycle in avalanche = tav ·f

ZthJC(D, tav) = Transient thermal resistance, see Figures 13)

PD (ave) = 1/2 ( 1.3·BV·Iav) =  T/ ZthJC

Iav = 2 T/ [1.3·BV·Zth]

EAS (AR) = PD (ave)·tav

1E-006 1E-005 0.0001 0.001 0.01 0.1

t1 , Rectangular Pulse Duration (sec)

0.0001

0.001

0.01

0.1

1

   T   h  e  r  m  a   l   R  e  s  p  o  n

  s  e   (   Z   t   h   J   C

   )0.20

0.10

D = 0.50

0.020.01

0.05

SINGLE PULSE( THERMAL RESPONSE )

Notes:1. Duty Factor D = t1/t22. Peak Tj = P dm x Zthjc + Tc

Ri (°C/W) τi (sec)0.2736 0.000376

0.3376 0.004143

τJ

τJ

τ1

τ1

τ2

τ2

R1

R1

R2

R2

τC

 Ci= τi/Ri

25 50 75 100 125 150 175

Starting TJ , Junction Temperature (°C)

0

50

100

150

200

250

   E   A   R

 ,   A  v  a   l  a  n  c   h  e

   E  n  e  r  g  y   (  m   J   )

TOP Single Pulse

BOTTOM 1% Duty Cycle

ID = 58A

1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01

tav (sec)

0.1

1

10

100

1000

   A  v  a   l  a  n  c   h  e   C  u  r  r  e  n   t   (   A   )

0.05

Duty Cycle = Single Pulse

0.10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Τ j = 25°C and

Tstart = 150°C.

0.01

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming ∆Tj = 150°C andTstart =25°C (Single Pulse)

8/19/2019 irfb4410

6/12

6 www.irf.com

   Fig 16.  Threshold Voltage vs. Temperature

       

   

-75 -50 -25 0 25 50 75 100 125 150 175 200

TJ , Temperature ( °C )

1.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

5.0

   V   G   S   (   t   h   )   G  a   t  e   t   h  r  e  s

   h  o   l   d   V  o   l   t  a  g  e   (   V   )

ID = 150µA

ID = 250µA

ID = 1.0mA

ID = 1.0A

100 200 300 400 500 600 700 800 900 1000

dif /dt (A/µs)

0

5

10

15

20

   I   R   R   M    (

   A   )

IF = 38A

VR

= 85V

TJ = 25°C _____

TJ = 125°C ----------

100 200 300 400 500 600 700 800 900 1000

dif /dt (A/µs)

0

5

10

15

20

   I   R   R   M    (   A   )

IF

 = 19A

VR = 85V

TJ = 25°C _____

TJ = 125°C ----------

100 200 300 400 500 600 700 800 900 1000

dif /dt (A/µs)

0

50

100

150

200

250

300

350

400

   Q  r  r   (  n   C   )

IF = 19A

VR = 85V

TJ = 25°C _____

TJ = 125°C ----------

100 200 300 400 500 600 700 800 900 1000

dif /dt (A/µs)

0

50

100

150

200

250

300

350

400

   Q  r  r   (  n   C   )

IF

 = 38A

VR

= 85V

TJ = 25°C _____

TJ = 125°C ----------

8/19/2019 irfb4410

7/12

www.irf.com 7

Fig 22a.  Switching Time Test Circuit Fig 22b.  Switching Time Waveforms

VGS

VDS

90%

10%

td(on) td(off)tr tf

VGS

Pulse Width < 1µsDuty Factor < 0.1%

VDD

VDS

LD

D.U.T

+

-

Fig 21b. Unclamped Inductive WaveformsFig 21a. Unclamped Inductive Test Circuit

tp

V(BR)DSS

IAS

RG

IAS

0.01Ωtp

D.U.T

LVDS

+

-VDD

DRIVER

15V

20VVGS

Fig 23a. Gate Charge Test Circuit Fig 23b.  Gate Charge Waveform

Vds

Vgs

Id

Vgs(th)

Qgs1 Qgs2 Qgd Qgodr

Fig 20. for N-Channel

HEXFET Power MOSFETs

1K

VCCDUT

0

L

  •

  •

  •

 

P.W.Period

di/dt

Diode Recoverydv/dt

Ripple ≤ 5%

Body Diode Forward Drop

Re-AppliedVoltage

Reverse

RecoveryCurrent

Body Diode ForwardCurrent

VGS=10V

VDD

ISD

Driver Gate Drive

D.U.T. ISD Waveform

D.U.T. VDS Waveform

Inductor Curent

D =P.W.

Period

  

+

-

+

+

+-

-

-

•

•

•  

•

8/19/2019 irfb4410

8/12

8 www.irf.com

TO-220AB packages are not recommended for Surface Mount Application.

 

 

 

 

 

 

 

 

 

 

 

 

 

8/19/2019 irfb4410

9/12

www.irf.com 9

TO-262 Part Marking Information

TO-262 Package OutlineDimensions are shown in millimeters (inches)

 

 

 

 

8/19/2019 irfb4410

10/12

10 www.irf.com

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8/19/2019 irfb4410

11/12

www.irf.com 11

Data and specifications subject to change without notice This product has been designed and qualified for the Industrial market

Qualification Standards can be found on IR’s Web site

IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105

TAC Fax: (310) 252-7903Visit us at www.irf.com for sales contact information. 05/07

3

4

4

TRR

FEED DIRECTION

1.85 (.073)1.65 (.065)

1.60 (.063)1.50 (.059)

4.10 (.161)3.90 (.153)

TRL

FEED DIRECTION

10.90 (.429)10.70 (.421)

16.10 (.634)15.90 (.626)

1.75 (.069)1.25 (.049)

11.60 (.457)11.40 (.449)

15.42 (.609)15.22 (.601)

4.72 (.136)4.52 (.178)

24.30 (.957)23.90 (.941)

0.368 (.0145)0.342 (.0135)

1.60 (.063)

1.50 (.059)

13.50 (.532)12.80 (.504)

330.00(14.173)  MAX.

27.40 (1.079)23.90 (.941)

60.00 (2.362)  MIN.

30.40 (1.197)  MAX.

26.40 (1.039)24.40 (.961)

NOTES :1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSION MEASURED @ HUB.4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

8/19/2019 irfb4410

12/12