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ISQED 2007Cho et al.
A Data-Driven Statistical Approach to Analyzing Process Variation in
65nm SOI Technology
Choongyeun Cho1, Daeik Kim1, Jonghae Kim1, Jean-Olivier Plouchart1, Daihyun Lim2,
Sangyeun Cho3, and Robert Trzcinski1
1IBM, 2MIT, 3U. of Pittsburgh
ISQED 2007, San Jose, Mar 28, 2007
Final
2ISQED 2007Cho et al.
Outline Introduction
Motivation of this work Constrained Principal Component Analysis Proposed method
Experiments Using 65nm SOI technology
Conclusion Applications, future work Contributions
3ISQED 2007Cho et al.
Motivation Process variation (PV) limits performance/yield
of an IC. PV is hard to model or predict.
Many factors of different nature contribute to PV. Physical modeling is often intractable.
Four ranges of PV:
Within-die Die-to-Die Wafer-to-Wafer Lot-to-Lot
4ISQED 2007Cho et al.
Motivation We present an efficient method to
decompose PV into D2D and W2W components. Use existing manufacturing “in-line” data only. No model!
Within-die Die-to-Die Wafer-to-Wafer Lot-to-Lot
5ISQED 2007Cho et al.
What is In-line Data? In this work, “in-line” data refers to:
Electrical measurements in manufacturing line for various purposes: fault diagnosis, device dc characterization, and model-hardware correlation. Test structures include: FET’s, ring oscillators, SRAM, etc.
Thus, available early in the manufacturing stage.
Key PV parameters (VT, LPOLY, TOX, etc) are embedded in well chosen in-line data, yet in a complex manner especially for nanometer technologies.
We exploit statistics of in-line data to analyze and extract D2D and W2W variations separately.
6ISQED 2007Cho et al.
Principal Component Analysis
Principal Component Analysis (PCA) rotates coordinates such that resulting vector is: Uncorrelated, and Ordered in terms of statistical variance.
Can be defined recursively:
w1 = arg maxjjw jj=1
var(wT x)
wherex is an original vector and wi is i-th PC.
wk = arg maxjjw jj=1;w? w i 8i=1;:::;k¡ 1
var(wT x);k ¸ 2
x
y
PC1PC2
7ISQED 2007Cho et al.
Constrained PCA
Constrained PCA (CPCA): same as PCA except PC’s are constrained to a pre-defined subspace. In this work, constraint is that every PC must
align with D2D or W2W variation direction.
Ordinary PCA
Proposed CPCA
W2WW2W
D2D
D2D
8ISQED 2007Cho et al.
Proposed Algorithm
Standardize
In-line data
Screen data
Find first PCfor D2D variation
Find first PCfor W2W variation
Take PCwith larger variance
Subtract this PCspace from
original data
Can generalize for within-die and lot-to-lot variations.
Implemented with <100 lines of Matlab code.
9ISQED 2007Cho et al.
Case I: 65nm SOI Tech 65nm SOI CMOS data (300mm wafer)
1109 in-line parameters used:
40 dies/wafer,13 wafers = 520 samples.
The run for whole data took <1min on an ordinary PC.
Test structures
FET RO SRAM Capacitors Total
Before screen 1988 248 398 222 2856
After screen 759 83 159 108 1109
10ISQED 2007Cho et al.
1 5 10 15 200.2
0.3
0.4
0.5
0.6
0.7
0.8
PC/CPC Index
Cu
mu
lati
ve n
orm
. var
ian
ce e
xpla
ined
PCA
CPC Index
TypeVariance explained
Cumulative Variance explained
1 D2D 31.0% 31.0%
2 W2W 25.2% 56.2%
3 D2D 4.5% 60.7%
4 W2W 4.2% 64.9%
Constrained PCA
Case I: 65nm SOI Tech
Δ
Die-Wafer Interaction
D2D
W2W
D2D
11ISQED 2007Cho et al.
Case I: 65nm SOI Tech
-60
-40
-20
0
20
40
0 5 10 15
-20
-10
0
10
20
30
Wafer
Sys
tem
atic
var
iati
on
2nd CPC4th CPC5th CPC
D2D variation (1st CPC)
(Fitted with 2nd order polynomials on the 40 available samples)
W2W variations
(2nd,4th,5th CPC’s)
12ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Case II: Applied to RF Circuit
Die index
Fo
sc
Wafer index
This example shows how RF circuit variation can be expressed with device-level variation.
RF self-oscillation frequencies (Fosc) for a static CML frequency divider:
13ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
Fo
sc
WaferSite
Reconstruction 1
Offset
Die index
Fo
sc
Wafer index
14ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Reconstruction 2
Offset + CPC#1 (D2D)
Die index
Fo
sc
Wafer index
15ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Reconstruction 3
Offset + CPC#1 + CPC#2 (W2W)
Die index
Fo
sc
Wafer index
16ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Reconstruction 4
Offset + CPC#1 + CPC#2 + CPC#3 (D2D)
Die index
Fo
sc
Wafer index
17ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Reconstruction 5
Offset + CPC#1 + CPC#2 + CPC#3 + CPC#4 (W2W)
Die index
Fo
sc
Wafer index
18ISQED 2007Cho et al.
0
5
10
0
20
4025
30
35
40
45
WaferSite
Fo
sc
Reconstruction & Original PVs obtained from in-line measurement explain significant
portion (66%) of PV existing in complex RF circuit.
Die index
Fo
sc
Wafer index
19ISQED 2007Cho et al.
Iteration 1 (Pre-production)
Iteration 2 Iteration 3
Case III: Technology Monitoring
Dominant D2D variations obtained for three successive 65nm SOI tech iterations. Visualize how technology stabilizes.
20ISQED 2007Cho et al.
Application / Future Work Technology snapshot: Use D2D variation
to monitor characteristic of a lot or technology iterations.
Intelligent sampling: D2D variation signature serves as a guideline to pick representative chips for sampled tests.
Future work includes: Incorporate within-die and lot-to-lot variations. Model-assisted constrained PC.
21ISQED 2007Cho et al.
Conclusion
Presented a statistical method to separate die-to-die and wafer-to-wafer variations using PCA variant: Allows visualization and analysis of
systematic variations. Rapid feedback to tech development.
Quantified how much RF circuit performance is tied to device PV’s.
22ISQED 2007Cho et al.
Thanks!Q & A