ITER Fast Controller Prototype

Feng Wang , Shi Li and Xiaoyang Sun

Institute of Plasma Physics, Chinese Academy of Sciences

04/18/23 1

The Spring 2010 EPICS collaboration meeting

Contents

• Introduction• System structure• Hardware configuration• Software environment• Implementation• Summary

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Introduction

04/18/23 3ITER I&C System – CODAC System, Central Interlock System, Central Safety Systems and plant systems I&CITER I&C System – CODAC System, Central Interlock System, Central Safety Systems and plant systems I&C

System Structure

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Hardware Configuration

CPU ChassisCPU Chassis

IO ChassisIO Chassis

MXI Express for PXIe KitsMXI Express for PXIe Kits

IEEE-1588 InterfaceIEEE-1588 Interface

Multifunction input/output InterfaceMultifunction input/output Interface

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• CPU Chassis– PCIE-Q350/221G, PICMG 1.3, Core2Quad CPU, 4 GB DRAM, RAID0/1

• IO Chassis– NI PXIe-1065, 18 Slots (9 PXI slots, 4 PXI/PXIe hybrid slots, 3 PXI Express

slots, 1 PXI Express system timing slot)• MXI Express for PXIe Kits

– NI PXIe-PCIe 8361, Remote PCI Express x1 Control of PXI Express 192 MB/s• Multifunction input/output

– NI PXI-6259, 32AI, 4AO, 48DIO– NI PXIe-6368, 16AI simultaneous, 4AO, 48DIO

• TCN (IEEE 1588 PTP)– NI PXI-6682, GPS, IEEE 1588, and IRIG-B Timing and Synchronization– NI PCI-1588, IEEE 1588-2002 compatible

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Software Environment

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• Operating System– Redhat Enterprise Linux 5.3 64-bit

• Development tools– Eclipse

• Device interface– comedi-0.7.76, comedilib-0.8.1

• EPICS base– EPICS base 3.14.10

• EPICS tools– VDCT– EDM, ALH, iocLog– SNL Sequencer– ChannelArchiver, ArchiverViewer, Strip Tools

• EPICS modules– Autosave– asynDriver– devIocStats

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Implementation

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AC/DC converterFast Discharge Units (FDUs)Protective Make Switches (PMS)DC bus bars and bus links.DC circuit earthingDC disconnectingI&C system

AC/DC converterFast Discharge Units (FDUs)Protective Make Switches (PMS)DC bus bars and bus links.DC circuit earthingDC disconnectingI&C system

TF Coil Power Supply SystemTF Coil Power Supply System

EPICS Database

• Self-Description Data (static configuration file, .xml)

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<xml> <PlantSystem> <component> …… </component> <PlantSystemIandC> <PlantControlSystem> <fastcontroller> …… </fastcontroller> </PlantControlSystem> </PlantSystemIandC> </PlantSystem></xml>

<xml> <PlantSystem> <component> …… </component> <PlantSystemIandC> <PlantControlSystem> <fastcontroller> …… </fastcontroller> </PlantControlSystem> </PlantSystemIandC> </PlantSystem></xml>

record(ai, “ai1") { field(DESC, “analog input 1") field(DTYP, "Soft Channel")}record(ao, “ao1") { field(DESC, “analog output1") field(DTYP, "Soft Channel")}….

record(ai, “ai1") { field(DESC, “analog input 1") field(DTYP, "Soft Channel")}record(ao, “ao1") { field(DESC, “analog output1") field(DTYP, "Soft Channel")}….

translation

Hardware configurationALH configurationAutosave configurationiocLog configurationSequencer configuration…

Hardware configurationALH configurationAutosave configurationiocLog configurationSequencer configuration…

EPICS database

configurations

State Machine

• State machines by SNL– State machine 1 on Fast controller: process control of TF

Coil Power Supply System– State machine 2 on PSH: command dispatcher and Plant

System maintenance

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EPICS Driver

• IO boards– NI PXI-6259– NI PXIe-6368

• TCN boards– NI PXI-1588– NI PXI-6682

• EPICS driver– Linux driver + asynDriver– Comedi + asynDriver

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IOC (PVs)IOC (PVs)

Linux driverLinux driver

asynDriverasynDriver

HardwareHardware

ComediComedi

Timing & Synchronization

• IEEE 1588, Precision Time Protocol– is a high precision time synchronization protocol for networked

measurement and control systems with accuracy in sub-microsecond.

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XLi IEEE-1588 GrandmasterXLi IEEE-1588 Grandmaster

SyncSwitch TC100SyncSwitch TC100

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Ethernet

PTP Network

In case of conventional Ethernet switch, trigger synchronization precision between two modules < 200nsIn case of conventional Ethernet switch, trigger synchronization precision between two modules < 200ns

• Synchronization test between two PXI-6682 modules in two PXIe chassis

trigger2trigger1

Progress

• Fast Controller prototype– The alpha version – June, 2010 (primary function )• EPICS IOC application• Process control• Multifunction input/output• …

– The final version – December, 2010 (full function)• Timing & Synchronization• Self-description data translation• PID control• High performance multifunction input/output• …04/18/23 15

Summary

• EPICS has been adopted for the control system development of ITER Fast Controller prototype based on PXI/PCIe technology.

• The TF Coil Power Supply System use case has been chosen to be implemented for the ITER Fast Controller prototype.

• The Fast Controller prototype will be used as the test tools for ITER mini-CODAC and PSH.

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References• EPICS, http://www.aps.anl.gov/epics• Comedi, http://www.comedi.org• Redhat, http://www.redhat.com• National Instruments, http://www.ni.com• Symmetricom, http://www.symmetricom.com• Plant Control Design Handbook (ITER_D_27LH2V v5.2)• EPICS Tools for CODAC CORE System V1.0 (ITER-D_2MDZ79 v1.1)• Self-description schema documentation (ITER_D_34QXCP v1.1)• CODAC Core System Development Manual (ITER_D_33T8LW v1.8)• CODAC Core System Overview (ITER_D_34SDZ5 v1.0)• NI PXI-6682 Linux Device Driver User's Guide (ITER_G_2PLQ4P v1.1)• Plant System Interface (ITER_D_34V362 v1.2)• Systems Requirement Document (SRD) Coil Power Supply and Distribution PBS 41

(ITER_D_28B6XQ v1.6)• Requirement Specification for FPS (ITER_D_2LCDLZ v1.2)• Engineering Design Document for FPS (ITER_D_2WRRV9 v1.3)• Interface Control Document for FPS (ITER_D_ 2M3RLR v2.1)

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Thank you!

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