IBL ROD/BOC PRR

IntroductionJuly 17, 2013

CERN

T. FlickUniversity of Wuppertal

IBL ROD/BOC PRR Introduction 2

Pixel Opto-Electronics and this

Review• The Pixel project builds a 4th pixel layer (the IBL) ready for

installation in LS1 (2013/14)• The front-end electronics has been developed newly and the off-

detector electronics needs to be adapted to this.• 14 IBL staves with 32 chips/stave will be installed• Each stave is read out on both ends; each half-stave (i.e. 16 chips)

is read out through one optoboard (electrical to optical transition) to the BOC/ROD system in USA15

• This review will focus on the off-detector readout cards: Readout Driver (ROD) and Back of Crate card (BOC)

• The key building blocks of the new off-detector readout electronics for the IBL and its functionalities areo The ReadOut Driver (ROD): Control part of the readout. Steering of calibration

and data taking and event building capabilities.o The Back Of Crate card (BOC): Timing capabilities and optical interface towards

detector and readout system. Data en- and decoding functionalities.

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IBL=

Insertable

B-Layer

IBL ROD/BOC PRR Introduction 3

New developments for IBL

• The IBL will be installed closer to the beam-pipe.o Higher occupancy in the moduleso Chance to provide a more accurate space point

• To handle the higher occupancy and provide a readout bandwidth coping with the amount of data, a new readout chip has been developed

• Pixel dimensions have been reduced with this as well• Improvements in terms of readout:

o Higher readout bandwidth (160 Mb/s per chip)o Balanced signal (8b/10b encoded)

• To handle the new electronics also off-detector wise a new card pair (ROD/BOC) has been developedo 16 output links at 40 Mb/s BPM encoded signal (same as for Pixel)o 32 input links at 160 Mb/s o 4 S-Links per pair to drive the data outo Faster calibration link by using Gb Ethernet instead of the VME bus for data

transfer

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IBL ROD/BOC PRR Introduction 4

Insertable B-Layer (IBL)• The 4th Pixel layer (IBL) is currently under

construction• 14 new staves, new FE chips, new readout

protocol

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IBL ROD/BOC PRR Introduction 5

Readout Scheme Overview

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…………….

VME readout crate16 card pairs (ROD/BOC)

Detector

Module

Optoboard (housed in Optobox)

S-Link

RX TX

Optical BPM

Optical8b/10b

ROS

Detector

Module

Detector

Module

Detector

Module

Detector

Module

Detector

ModuleHalfstave Halfstave

Optical8b/10b

Optical BPM

Electrical Electrical

CountingRoom

ID end-plate

DetectorVolume

80

m5-7

m

Optoboard (housed in Optobox)

IBL ROD/BOC PRR Introduction 6

ATLAS IBL Readout Structure

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16 modules

VME crate

2 FE-I4

2 optoboards

DORIC

VDC

BOC ROD

TIM SBC

S-Link

RX

TX

Timing

Control &

data handlin

g

Control and steering

Event building

Optical BPM

Optical 8b10b

ROS

Ethernet

IBL stave

IBL optobox on ID endplate

opticallyelectrically

IBL ROD/BOC PRR Introduction 7

On-detector: Optoboard

• On-detector optical interface• 2 VSCEL arrays, 1 PiN diode

array, 8 channels utilized per array.

• Will run at 40Mb/s receive and 160 Mb/s transmit bandwidth

• DORIC (digital optical receiver IC) for decoding clock and data for the modules

• VDC (VCSEL Driver Chip) for driving the lasers

• DORIC and VDC are the same as used already on the Pixel detector optoboards

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KK Gan, Shane Smith (Ohio)

VCSEL

VCSEL

PiN Diode

IBL ROD/BOC PRR Introduction 8

Off-detector Plugins & Fibres

• IBL will use new off-detector optical plugins situated on the BOC

• Commercial SNAP12 plugins have been chosen

• New additional fibres for IBL will be installed to connect the off-end on-detector parts.

• Again 8 channels will be used per fibre tube.

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Alberto Cervelli (Bern)

IBL Readout Driver

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• Control cardo Steering of detector

• Configuration• Commands

o Detector calibration by steering the calibration scans

o Physics data taking• Trigger sending, event building

o Histogramming for calibration and monitoring

• Master FPGA:o Control data generationo Run control (calibration scans and

data taking)

• Slave FPGAs:o Data interface to and from Back

of Crate Cardo Data preparation and

histrogramming

GbE

Master

FPGA

SlaveFPGA

ROD RevC

IBL ROD/BOC PRR Introduction 10

IBL Back of Crate Card• Timing interface

o Receive clock from TIMo Distribute the clock to detector

components and ROD

• Optical interface to/from detector and readout bufferso SNAP12 plugins (Tx / Rx)o S-Link plugins (QSFP)

• Data en-/decoding for detector communicationo BPM encoding towards the

detectoro 8b/10b decoding for the detector

data to hand over to the ROD

• Monitoring functionalities for detector data

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GbE

QSFP

Rx/Tx Plugin

s

Control FPGA

Main FPGA

BOC RevC

IBL ROD/BOC PRR Introduction 11

Production & Installation Schedule

• The IBL is included into the overall Pixel schedule for 2013/14 and in consequence into the ATLAS LS1 schedule

• Before installation the cards need to serve the full IBL test in SR1• Systemtest in SR1 is under construction and will serve as test

platform also for the readout cards.

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Installation items Expected time comment

Card production From July 2013 Prototypes ready in revC

Systemtesting June 2013 - Set-up phase ongoing

IBL full test November 2013 Have all the readout and services ready in SR1

Installation of off-detector parts for readout and power

Jan/Feb 2014 Whenever they can be taken from final SR1 tests

Cabling of detector in pit Mar 2014 After IBL installation

Commissioning tests and sign-off for closure

April-June 2014 Sequence of warm/cold test

Ready for closure End June 2014

IBL ROD/BOC PRR Introduction 12

Documentation

The review Master Document is under: ATL-SYS-ER-0027 It holds the drawing files as sub-docs.Further documentation on the agenda page:• ROD

o IBL ROD revC Manual & Appendixo IBL ROD tests documento IBL ROD production process documento IBL ROD current firmware status document

• BOCo IBL BOC design and firmware manualo Production test plans

• Additional documentso FE-I4B Manualo IBL PPC scans document

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IBL ROD/BOC PRR 13

The Goal for the ROD/BOC Review

• Subject of this review is the construction of IBL ROD & BOC cards, which form the off-detector readout part of the IBL.

• This includeso Production and qualification of Read Out Driverso Production and qualification of Back of Crate Cardso Plans for system commissioning o Installation schedule

• We also present the plans of using the cards for upgrading Layer 1 and Layer 2 of the current Pixel Detector to overcome bandwidth limitations due to increased luminosity until 2022.

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IBL ROD/BOC PRR 14

Agenda• Review presentations:

o Introduction and overall schedule

o ROD technical itemso BOC technical itemso Testing done and planned

• Indico page:o https://indico.cern.ch/

conferenceDisplay.py?confId=261840

• EDMS page:o https://edms.cern.ch/document/1297853/1

• Would be delighted to have initial feedback and draft report shortly after the review.

• Many thanks to our reviewers for their time and effort!

17.07.13