Date post: | 13-Feb-2017 |
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Engineering |
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Introduction
• Three terminal single junction latching device*
• Different from either diode (due to 3 terminals) or the transistor (can’t amplify)
• Wide range of applications like oscillators, trigger circuits, sawtooth generators, phase control
• Overcomes the limitations of previous trigger circuits like power dissipation & high dependability on the SCR chatacteristics
• Other variants include CUJT & PUT
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Structure & Symbol
E
B2
B1B1
A
B2
E
RB2
RB1n-type
p-type
Eta-point
Basic Structure Symbol
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Equivalent Circuit
RB2
VBB
+
-
E
B1
RB1 VBB
A+
-
Ve Ie
B2
Eta-point
V1
VD
Equivalent Circuit of UJT31-Oct-12 4 EE-321N, Lec-12
Characteristics
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Ve
VBBR load line
Vp
Vv
IeIvIp0
Peak Point
Cutoffregion
Negative ResistanceRegion
Saturation region
Valley Point
Device Description & Operation
• Consists of a lightly doped n-type Si base to which heavily doped p-type emitter is embedded
• At the two ends, there are ohmic contacts designated as Base 1 & Base 2
• Thus the 3 terminals are: E, B1 & B2
• An interbase resistance RBB = RB1 + RB2|IE = 0
(~5-10 kΩ) exists between the two bases
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Contd...
• Equivalent circuit consists of a pn junction diode and the interbase resistance divided into two parts RB1 & RB2
• When a voltage VBB is applied between the bases, the potential of point A w. r. t. B1 is
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1 11
1 2
B BAB BB BB BB
B B BB
R RV V V V
R R R
Contd...
• Where, is known as intrinsic stand off ratio & ranges from 0.5-0.8
• When VE < V1, the equivalent diode is R. B. This is the OFF state of the device & is shown as very low current region on the VE-IE curve
• When VE > V1 + VD, the diode becomes F. B. this is the ON state of the device
• Vp = V1 + VD = VBB + VD is known as the peak point voltage
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Contd... • Due to the flow of IE through RB1, number of
charge carriers in RB1 is increased which reduces its resistance, which in turn decrease V1
• This causes diode to become more & more F. B. & IE increases further leading to a regenerative action
• VE decreases with increase in IE & the device is said to exhibit negative resistance
• Eventually, valley point will be reached after which there will be no further decrease of RB1
• After valley point, device will reach into saturation state 31-Oct-12 EE-321N, Lec-12 9
UJT Relaxation Oscillator
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R R2
VBB
R1C
EB2
B1Ve vo
Ve
Vp
VV
Vo
t
t
Capacitorcharging
1=RC
T
V +VBB
VP
2 1=R C
Capacitordischarging
Vv
Contd...
• The –ve resistance region of the UJT can be used to advantage in relaxation oscillator which can provide triggering pulses for SCR
• In the above ckt, R1 & R2 are chosen to be much smaller than the interbase resistances
• The charging resistance R should be such that its load line passes through the device characteristics in the negative resistance region
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Contd... • When a source voltage VBB is applied to it, C
begins to charge through R exponentially towards VBB according to the equation
• When vC reaches the peak point voltage, E-B1 junction breaks down & the UJT turns ON. Now C discharges rapidly through R1
• 2 << 1
• UJT turns OFF when the voltage decays to valley voltage Vv
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/1 t RC
C BBv V e
Expression for Time Period of Oscillation
• The time T required for C to charge from initial voltage Vv to peak-point voltage Vp thru R can be obtained as:
• Assuming
or
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/1 t RC
p BB D v BBV V V V V e
/, 1 t RC
D vV V e
1 1ln
1T RC
f
Contd...
• If T is taken as the time pd. of the O/P pulse duration (neglecting small discharge time), then firing angle is given by
• Design considerations include selection of R1, R2 & R
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1ln
1T RC
Resistance Values
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max min;BB p BB v
p v
V V V VR R
I I
1GT
1 2
BB
BB
V RV
R R R
4
2
10
BB
RV
Further Resources
1. Video lectures on “Basic Electronics & Lab”, Prof. T. S. Natarajan, Lec-34 UJT
Available on www.nptel.iitm.ac.in,
www.youtube.com/iit
2. Boylestad & Nashelsky, “Electronic Devices & Circuit Theory”, 7/e, PHI
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