+ All Categories
Home > Documents > Lab. 1 – GPIO Pin control

Lab. 1 – GPIO Pin control

Date post: 19-Mar-2016
Category:
Upload: judson
View: 39 times
Download: 0 times
Share this document with a friend
Description:
Lab. 1 – GPIO Pin control. Using information ENEL353 and ENCM369 text books combined with Blackfin DATA manual. D Flip flop. D input is captured by the first latch of the D-Flip-flop on rising edge of a clock signal C, - PowerPoint PPT Presentation
38
Lab. 1 – GPIO Pin control Using information ENEL353 and ENCM369 text books combined with Blackfin DATA manual
Transcript
Page 1: Lab. 1 – GPIO Pin control

Lab. 1 – GPIO Pin control

Using information ENEL353 and ENCM369 text books combined with Blackfin DATA manual

Page 2: Lab. 1 – GPIO Pin control

D Flip flop

D input is captured by the first latch of the D-Flip-flop on rising edge of a clock signal C,

The output of the first latch is captured by a second D-flip-flop using an inverted clock signal

Thus the input to the D flip flop appears at its output on the falling edge of the clock after being captured on the rising edge of the clock

2 /25

Page 3: Lab. 1 – GPIO Pin control

N flip-flops form a register

Putting 32 of this flip-flops together form a register

If this register is internal to the processor core -- system register -- R0, P0, SP, FP, CYCLES

If external to the core or on another device – not a system register

3 /25

Page 4: Lab. 1 – GPIO Pin control

Memory mapped register

The D input values come along the memory data bus

Which register is used is controlled by the value on the memory data bus

The address of the register and the data value placed into the register is controlled by “normal” memory instructions issues by the processor

4 /25

Page 5: Lab. 1 – GPIO Pin control

5 /25

Building a radio controlled car4 Threads at least

SWITCHES ON FRONT PANEL“INPUT COMMANDS:

PROGRAMMABLE FLAGS

FIO_FLAG_D Register

YOUR PROGRAM RUNNING ON THE BLACKFIN

LED LIGHTS ON FRONT PANEL“CONTROLSIGNALS TO RF TRANS:

LED-CONTROLREGISTER

EBIU INTERFACE

ProcessDataASM( ) subroutine

A/D D/A Interrupt routine D/A EARPHONESA/DVOICE

int ReadSwitches( ) void WriteLED(int )

Page 6: Lab. 1 – GPIO Pin control

6 /25

Registers used to control PF pins

Flag Data register (FIO_FLAG_D) Used to read the PF bits as an input -- (1 or 0) Need to read pins PF11 to PF8, ignore all other pins values

Page 7: Lab. 1 – GPIO Pin control

Instructions need to access FIO_FLAG_DSet address bus

P0.L = lo(FIO_FLAG_D); P0,H = hi(…..Read R0 = [P0] (X) (32, 16, or 8)?Write [P0] = R0 (32, 16, or 8)?Select one bit R3 = 0x0100;

R2 = R3 & R0;Force one bit R2 = R3 | R0;DON’T DESTROY VALUE R0 = R3 & R0

7 /25

Page 8: Lab. 1 – GPIO Pin control

Flip flops

When they power up – in an unknown state – could be 1 or 0,

On power up -- processor designed to put flip-flop into known state – reset value

Whether set to 1 or 0 depends on what flip-flop output is connected toSafety reasons – sometimes reset to 0 or reset

to 1

8 /25

Page 9: Lab. 1 – GPIO Pin control

Flip flops have set and clear capabilityMake SET = 1, and toggle clock and

output becomes 1Make SET = 0, and toggle clock and

output become 0

9 /25

Page 10: Lab. 1 – GPIO Pin control

FLIPFLOPSET

FLIPFLOPCLEAR

10 /25

Page 11: Lab. 1 – GPIO Pin control

Other GPIO Flip flopsFIO_MASKA_D and FIO_MASKB_DIf bit X = 1, tell processor to cause

interrupt when FIO_FLAG_D bit X is active

11 /25

Page 12: Lab. 1 – GPIO Pin control

Interrupt mask registersalso have their own set / clear linesFIO_MASKA_C, FIO_MASKB_CFIO_MASKA_S, FIO_MASKB_S

12 /25

Page 13: Lab. 1 – GPIO Pin control

Other flip-flop group tell processor whether to interrupt on input changing or steady. This register has no meaning if interrupts are not active

13 /25

Page 14: Lab. 1 – GPIO Pin control

Another flipflop group tells processor1) interrupt on rising / fail edge if EDGE = 12) interrupt on high level or low level if EDGE = 0

14 /25

Page 15: Lab. 1 – GPIO Pin control

Same flipflop group tells processor1) if no interrupt then output of flipflop equals the Q output of flipflop2) If no interrupt then output of flipflop equals Q* output of flipflop

15 /25

Page 16: Lab. 1 – GPIO Pin control

Another flip-flop group controls whether the flip-flop outputs follow the flip-flop inputs or are “high impedance” – off – no useful value

16 /25

Page 17: Lab. 1 – GPIO Pin control

A key issue with GPIO is whether a pin is to act as an input device (bringing things in from the outside world into the Blackfin) or as an output device (sending things from the Blackfin to the outside world)

17 /25

Page 18: Lab. 1 – GPIO Pin control

18 /25

Why do you need to know how to do read (load) and write (store) on internal registers?

Flag Direction register (FIO_DIR) Used to determine if the PF bit is to be used for input or

output -- WARNING SMOKE POSSIBLE ISSUE Need to set pins PF11 to PF8 for input, leave all other pins

unchanged

Page 19: Lab. 1 – GPIO Pin control

19 /25

Write the Blackfin assembly language instruction(s) to load the address of the internal programmable flag FIO_DIR register into pointer register P1 – then SET the Blackfin PF lines to act as inputs

#include <defsBF533.h>#include <macros.h>

P1.L = lo (FIO_DIR);P1.H = hi (FIO_DIR);

// Check the requirements – need to have all input// Manual says “setting a line for input means setting bit values to 0”

R0 = 0;W[P1] = R0; // This changes “All pins”ssync; // Force Blackfin to do the write (store) NOW not later

Making sure that the FIO_DIR is correct for LAB. 1 – NOTE may need to change for later labaoratories

Design Error

“Changes all pins

Page 20: Lab. 1 – GPIO Pin control

Notice that previous slide WARNS you about a design error in the codeWe can’t do things this way as it changes

all the bits in the 16 flip-flops and we only want to change 4 values in the flip-flops

The same design error is introduced into Lab. 1 Task 3

However, the same design error is found during the TDD tests – provided to look at the test code to see what was being tested

20 /25

Page 21: Lab. 1 – GPIO Pin control

These tests DONOT find the design error

21 /25

Page 22: Lab. 1 – GPIO Pin control

These tests DO find the design errorand in fact explain to you why it is likely that your tests have failed. But you have to read it

22 /25

Page 23: Lab. 1 – GPIO Pin control

This test is another indication that you have not written the code correctly. There must be 12 read and writes – not 6, not 3

23 /25

Page 24: Lab. 1 – GPIO Pin control

We have other tests to check that your code is correct – Lab. 1 Task 4People come by and said ‘I have the cable

correct, but it keeps on telling me I don’t’ – meaning ‘I did not look at the test to see what it was doing so Dr. Smith your Lab. Is wrong’

24 /25

Page 25: Lab. 1 – GPIO Pin control

25 /25

Task – Initialize the Programmable flag interface – 16 I/O lines on the Blackfin

Warning – could burn out the Blackfin processor if done incorrectly

You need to set (store a known value to) a number of Blackfin internal registers

Most important onesFIO_DIR – Data DIRection – 0 for input ****FIO_INEN – INterface ENable – 1 for enabledFIO_FLAG_D – Programmable FLAG Data register

Page 26: Lab. 1 – GPIO Pin control

26 /25

P1.L = lo (FIO_DIR); // #include <defsBF533.h> “knows” FIO_DIR valueP1.H = hi (FIO_DIR);// R0 = 0; // DESIGN ERROR – changes all pins to 0// W[P1] = R0; // This changes “All pins”

// Correct approach – use an AND mask operationR1 = W[P1]; // Read the current valueR2 = 0x0F00 (Z); // Prepare the 32-bit mask with bits // 8 to 11 set to 1, other bits 0R2 = ~R2; // Complement operation // bits 8 to 11 are 0, other bits 1R3 = R1 & R2; // R3 bits = 0 for bits 8 to 11; // R3 bits = FIO_DIR bits otherwiseW[P1] = R3; // Restore FIO DIR with bits 8 to 11 set to 0, ssync; // Force Blackfin to do the write (store) NOW not later

Setting FIO_DIR to zero for “ONLY” pins 8, 9, 10 and 11. Other pins unchanged

Page 27: Lab. 1 – GPIO Pin control

27 /25

Registers used to control PF pinsFlag Input Enable Register

Only activate the pins you want to use (saves power in telecommunications situation)

Need to activate pins PF11 to PF8 for input, leave all other pins unchanged

Page 28: Lab. 1 – GPIO Pin control

28 /25

Write the Blackfin assembly language instruction(s) to load the address of the internal programmable flag FIO_INEN register into pointer register P1 – then ENABLE the Blackfin PF lines as inputs

#include <defsBF533.h>#include <macros.h>

P1.L = lo (FIO_?????);P1.H = hi (FIO_?????);

// Check the requirements – need to have all input// Manual says “setting a line for input means setting bit values to 0”

R0 = 0x0F00;W[P1] = R0; // This changes “All pins” 8 to 11 ON (enable), others OFFssync; // Force Blackfin to do the write (store) NOW not later

Making sure that the FIO_INEN is correct for enable of pins 8 to 11

Design Error

“Changes all pins

Page 29: Lab. 1 – GPIO Pin control

29 /25

P1.L = lo (FIO_???); // #include <defsBF533.h> “knows” FIO_INEN valueP1.H = hi (FIO_???);// R0 = 0x0F00; // DESIGN ERROR – changes all pins// W[P1] = R0; // This changes “All pins”

// Correct approach – use an AND mask operationR1 = W[P1]; // Read the current valueR2 = 0x0F00 (Z); // Prepare the 32-bit mask with bits // 8 to 11 set to 1, other bits 0R3 = R1 | R2; // R3 bits = 1 for bits 8 to 11; // R3 bits = FIO_DIR bits otherwiseW[P1] = R3; // Restore FIO INEN with bits 8 to 11 set to 1, ssync; // Force Blackfin to do the write (store) NOW not later

Setting FIO_INEN to one for “ONLY” pins 8, 9, 10 and 11. Other pins unchanged

Page 30: Lab. 1 – GPIO Pin control

30 /25

Task – Setting up the programmable flag interfaceFollow the instructions carefullyFIO_DIR – direction register – write 0’s to bits 8 to 11FIO_INEN – input enable register – write 1’s to bits 8, 9, 10, 11Other bits leave “unchanged:

To provide a screen dump of the test result to show your code works Use PRT-SCR button and then paste in .doc file.

In Lab. 1. the task said -- Check the following bit patterns in the manual  pages 14-1 to 14-22 to make sure that I have got the patterns around the correct way.

Page 31: Lab. 1 – GPIO Pin control

31 /25

Echoing the switches to the LEDCode in main( ) – written in C++

int main( ) {

InitializeGPIOInterface( ); // Check Lab. 1 for “exact name needed”InitializeFlashLEDInterface( ); // Check Lab. 1 for “exact name needed”

#define SWITCHBITS 0x0F00 // Look in MIPs notes about // using a mask and the // AND bit-wise operation

// to select “desired bits” while (1) { // Forever loop int GPIO_value = ReadBlackfinGPIOFlagsASM ( );

int desired_bits = GPIO_value & SWITCHBITS;

int LED_light_values = desired_bits >> 8; // Bits in wrong position

WriteFlashLEDLights(LED_light_values); // to display on LEDS

}

}

Page 32: Lab. 1 – GPIO Pin control

32 /25

Building a radio controlled car4 Threads at least

SWITCHES ON FRONT PANEL“INPUT COMMANDS:

PROGRAMMABLE FLAGS

FIO_FLAG_D Register

YOUR PROGRAM RUNNING ON THE BLACKFIN

LED LIGHTS ON FRONT PANEL“CONTROLSIGNALS TO RF TRANS:

LED-CONTROLREGISTER

EBIU INTERFACE

ProcessDataASM( ) subroutine

A/D D/A Interrupt routine D/A EARPHONESA/DVOICE

int ReadSwitches( ) void WriteLED(int )

Page 33: Lab. 1 – GPIO Pin control

Blackfin BF533 I/O 33

LEDs connected to FLASH port BACKFORWARDRIGHTLEFT???

CONTROL ON

Might be connected to other things

DON’T CHANGEBEHAVIOUR

Page 34: Lab. 1 – GPIO Pin control

Blackfin BF533 I/O 34

Blackfin Memory Map

If P0 is 0x20001000then

R0 = [P0]; readsa value fromFLASH BANK 0

If R0 is 6 andP0 is 0x1000 then

[P0] = R0; placesa value intoSDRAM

Page 35: Lab. 1 – GPIO Pin control

Blackfin BF533 I/O 35

Set the Bank control register

Kit documentation recommends 0x7BB0

7 cyclesnot 15

11 not 15

B = 1011

2 cycles

3 cycles

IGNORE

4cycles

Page 36: Lab. 1 – GPIO Pin control

Blackfin BF533 I/O 36

Set General Control Register

Documentation says set to “0xF” for this particular FLASH chip

ENABLE

ALL

Page 37: Lab. 1 – GPIO Pin control

Blackfin BF533 I/O 37

WriteFlashLEDASM(long in_value)

Read “LED data register” into processor data register (makes a copy)

Keep “top” 2 bits (AND operation) of copyKeep “bottom” 6 bits of “in-par” 32-bit in_valueOR the two processor data registers Write “modified copy” back into “LED data register”

PROBLEM “byte” read and writes

Page 38: Lab. 1 – GPIO Pin control

38 /25

Laboratory 1 – Tasks

1. Download the C++ Talk-through program. Board check -- Check that you can hear the audio output

2. Develop and test the code for initializing the Flash Memory and writing to the LED’s

Use the provided tests to check your code

3. Routine for initializing the PF GPIO lines (programmable flags)

Use the provided tests to check your code

4. Develop the ReadProgrammableFlagsASM( ) to read the switches

Use the provided tests to check your code

5. Develop the Morse code program in C++ and ASM


Recommended