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Abstract—In this letter, a decentralized control for cascaded inverters is introduced, in which one inverter is controlled as a current source and the others are controlled as voltage sources. The power sharing and synchronization of the inverters are realized without high-bandwidth communication. Meanwhile, it is robust against the voltage sag\swell and frequency deviation of grid. Finally, the feasibility of the proposed method is verified by simulation and experimental results.
Index Terms—Cascaded inverters, decentralized control, power sharing control.
I. INTRODUCTION
HE cascaded H-bridge inverters have been widely studied
and applied in middle- and high-voltage level power
network [1]. They are early used for high-voltage motor drivers,
STATCOM, and flexible AC transmission systems (FACTS)
[2]. Recently, they have been extended to distributed
generation, such as AC-stacked PV generation, energy storage
system and micro-grids [3-4].
In the past, the centralized control methods [5-6] were
widely used for grid-connected cascaded inverters. However,
these methods depend on real-time communication networks
and powerful centralized controller, which will lead to the
reduced reliability due to communication failure, and higher
capital costs. Moreover, it becomes more difficult for the
centralized methods to be implemented when the number of
modules is large.
Recently, there has been some interests on the distributed
control strategies [7-8]. A novel power regulation controller for
the grid-connected cascaded inverters is designed in [7], but the
communication is always needed to maintain the
Manuscript received January 15, 2019; revised May 5, 2019 and July
29, 2019; accepted September 22, 2019. This work was supported in part by the National Natural Science Foundation of China under Grant 61622311, the Joint Research Fund of Chinese Ministry of Education under Grant 6141A02033514, the Major Project of Changzhutan Self-dependent Innovation Demonstration Area under Grant 2018XK2002, the Project of Innovation-driven Plan in Central South University under Grant 2019CX003, and the Fundamental Research Funds for the Central Universities of Central South University under Grant 2019zzts276. (Corresponding author: Yao Sun.)
L. Li, Y. Sun, H. Han, G. Shi, and M. Su are with the School of Automation, Central South University and the Hunan Provincial Key Laboratory of Power Electronics Equipment and Gird, Changsha 410083, China (e-mail: [email protected], [email protected], [email protected], [email protected], [email protected]).
M. Zheng is with Department of Mechanical and Aerospace Engineering, University at Buffalo, The State University of New York, New York, USA (e-mail: [email protected]).
synchronization of system. In addition, the decentralized
control methods have also been presented for cascaded
H-bridge inverters [9-12]. The control schemes could be
classified into two categories according to operation modes. In
the islanded mode, [9-10] proposed the inverse power factor
droop control for power sharing and autonomous
synchronization of system. In grid-connected mode, [11-12]
have been presented without any communication, in which all
modules are controlled as voltage sources. However, the
methods are sensitive to the variations of grid voltage and may
lead to instability. Thus, a more robust control approach against
the grid voltage variations should be developed.
To address the above concerns, a hybrid current-voltage
control scheme is proposed for grid-connected cascaded
inverters in this letter. Compared to centralized methods, the
proposed scheme have advantages of no need of high
bandwidth communications. Therefore, it is more attractive in
the applications where the number of inverter modules is large,
and the distance between the modules is long. The main
features of the proposed scheme are summarized as follows:1)
the phase synchronization of all modules is realized by using
the common current information, thus the decentralized manner
is obtained; 2) It is robust against the grid voltage sag,
distortion and frequency deviations.
II. ANALYSIS OF THE PROPOSED CONTROL SCHEME
A. Equivalent models of grid-connected cascaded inverters
H-bridge #1
PW
M
PR
Current control mode
*
lineilinei
H-bridge #i
PW
M
Inn
er l
oo
ps
Voltage control mode
linei
The grid power
requirements
,g gP Q
lineI
line
*P
g gV
*P
fL
fC
2 2V
n nV
g gV
line lineI
Voltage
control mode
Current
control mode
line lineZ Inverter #1
Inverter #2
Inverter #n
Utility
Grid
Inverter #1
Inverter #i
Fig. 1. Structure of grid-connected cascaded inverters.
Figure 1 shows the configuration of the grid-connected
cascaded inverters, which consists of n H-bridge modules. iV
and i represent the voltage amplitudes and phase angle of the
ith module. lineI and line are grid-connected current amplitudes
A Decentralized Control for Cascaded Inverters in Grid-connected Applications
Lang Li, Student Member, IEEE, Yao Sun, Member, IEEE, Hua Han, Member, IEEE, Guangze Shi, Student Member, IEEE, Mei Su, Member, IEEE, Minghui Zheng
T
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and phase-angle. gV and g are the voltage amplitudes and
phase angle of the utility grid. lineZ and line are the grid
impedance amplitudes and phase angle. Only the inverter
(inverter #1) near to the grid is controlled as a current source
line lineI . All other inverters 2,3, ,i n are controlled as
voltage sources i iV .
B. Proposed control strategy
Assume that the active and reactive power requirement of the
grid are gP and gQ , which are expressed as
1
cos2
g g line g lineP V I (1)
1
sin2
g g line g lineQ V I (2)
The proposed decentralized control is a hybrid
current-voltage control scheme, which is depicted in Fig. 1.
For the inverter #1, its current reference is line lineI . From
(1) and (2), lineI and line are
2
cos
g
line
g
PI
V (3)
line g (4)
where arctan g gQ P . Then, the line current is regulated
to track line lineI by a proportional-resonance (PR) controller
[13].
The other inverters #i 2,3, ,i n are controlled as
voltage sources, and the corresponding reference voltage is
i iV . Assume that the output active power and reactive power
reference of ith module are *P and *Q , respectively. Then we
have
,i line i (5)
*
,
2
cosi
line i
PV
I (6)
where ,line i and ,line iI are the real-time phase angle and
amplitudes of line current. Then, the output voltage of the ith
module is controlled by the double-loop voltage-current
controller [13-14]. Since they could be obtained locally by each
inverter, these inverters are controlled in decentralized
manners.
In the proposed control frame, the inverter #1 is responsible
for regulating the grid current. Meanwhile, the others are
controlled as voltage sources to maintain the system
synchronization and power regulations according to the
common current.
C. Steady-state analysis
Due to the series structure, the output currents of all inverters
are completely the same, (7) is obtained in the steady-state.
,2 ,3 ,line line line n line (7)
,2 ,3 ,line line line n lineI I I I (8)
From (5) and (6), we have
2 3 n g (9)
2 3 nV V V (10)
That is to say, these inverters could keep pace with the grid. In
this study we let *gP P n and *
gQ Q n . Combining
(9)-(10), , cosi i i lineP V I and , sini i i lineQ V I , the following
equations are derived *
2 3 nP P P P (11)
*
2 3 nQ Q Q Q (12)
According to the power balance principle, the profit and loss
of power of the system is provided by the inverter #1. Due to
the inductive grid impedance, the output active and reactive
power of inverter #1 are
*
1
2
n
g i
i
P P P P
(13)
*
1
2
n
g line i
i
Q Q Q Q Q
(14)
where lineQ is the reactive power loss of the grid impedance.
In practice, grid voltage may change within contain limits.
Then gP and gQ will change accordingly. Thus, from (13)-(14),
the power rating of inverter #1 will be determined by the
fluctuation ranges of grid and safety margin.
D. Stability analysis
From Fig. 1, the model of system is expressed as
,1
2
,
,
,
n
out g i
i
L i
f out i i
i
f L i
diL u u u
dt
diL u u
dt
duC i i
dt
(15)
where L is the grid inductor, fL and fC are the inductor and
capacitance of LC filter, the subscript 2,3, ,i n . gu is the
grid voltage, i is the grid current, ,out iu is the output voltage of
the inverter #i, ,L ii is the filter inductor current of inverter #i.
The PR controller for inverter #1 is expressed as
*
,1 ,1
,1 ,2
2
,2 ,1 ,22 2
out P I
I I
I c r I c I
u k i i x
x x
x k i x x
(16)
where Pk and rk are the proportional and resonance coefficient
of inverter #1. c is the cut-off frequency, is the
synchronous angle frequency of grid, *i is the reference grid
current.
The voltage-current dual closed loop controllers for the
inverters #i 2,3, ,i n are expressed as
*
, ,1 ,
,1 ,2
2
,2 ,1 ,22 2
out i Pi Pv i i Pi vi Pi L i
vi vi
vi c rv i vi c vi
u k k u u k x k i
x x
x k u x x
(17)
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where Pik , Pvk , rvk are the control coefficients of PR controller.
*
iu and *
,L ii are the reference capacitor voltage and inductor
current.
Because this system is a periodic system, the sinusoidal
analysis method is applied [15] to prove the stability of the
system. Let Re j t
g gu V e , Re j ti Ie , , ,Re j t
out i out iu V e ,
, ,Re j t
L i L ii I e , ,1 ,1Re j t
I Ix X e , ,2 ,2Re j t
I Ix X e ,
,1 ,1Re j t
vi vix X e , ,2 ,2Re j t
vi vix X e , where Re returns
the real part of the complex argument.
Combining (15)-(17) yields (18).
,1
2
,1 ,1 ,2
2
,2 ,2 ,1 ,2
,
, ,
,
,1 ,1 ,2
2
,2 ,2 ,1 ,2
2 X 2
2 2
n
out g i
i
I I I
I I c r I c I
L i
f L i f out i i
i
f i f L i
vi vi I
vi vi c rv i i vi c vi
dIj LI L V V V
dt
j X X X
j X X k j I I X
dIj L I L V V
dt
dVj C V C I I
dt
j X X X
j X X k j V V X X
(18)
Further, the small signal model of system is expressed as
,1
2
,1 ,2 ,1
2
,2 ,1 ,2
2
, , ,1
1 1
2 2 22
1
1
nP
I i
i
I I I
nc r P c r c r
I I c I i
i
Pi Pv Pi Pi
L i i L i vi
f f f f
i
f
kI j I X V
L L L
X X j X
k k k kX I X j X V
L L L
k k k kI V j I X
L L L L
V IC
,
,1 ,2 ,1
2
,2 , ,1 ,2
1
2 22
L i i
f
vi vi vi
c rv c rv
vi L i vi c vi
f f
I j VC
X X j X
k kX I I X j X
C C
(19)
For brevity, (19) is rewritten as matrix form
X AX (20)
where the state variable vector X and the system matrix A are
-3000 -2000 -1000 0-2
-1
0
1
2x 10
4
1
2
3
4
56
7
-200 -150 -100 -50-1500
-1000
-500
0
500
1000
8 9
10
11
0.01 8pk
100rk
3pik
0.5pvk
50rvk
Real
Imag
inar
y
(a)
-3000 -2000 -1000 0-2
-1
0
1
2x 10
4
1
2
3
4
5 6
7
-100 -50 0
-1000
-500
0
500
11
8
9
10
0.2pk
3pik
0.5pvk
50rvk
50 200rk
Real
Imag
inar
y
(b)
35L e35L e
-4000 -3000 -2000 -1000 0-2
-1
0
1
2 x 104
1
2
3
4
-1000 -500 0
-600
-400
-200
0
200
400 56
7
89
10
11
0.2pk
100rk
0.5pvk
50rvk
0.01 6pik
Real(c)
Imag
inar
y
-3000 -2000 -1000 0-4
-2
0
2
4 x 104
1
2
3
4
-300 -200 -100
-500
0
5005
6
7
8
9
10
11
0.2pk 100rk
3pik 50rvk
0.01 2.5pvk
Real(d)
Imag
inar
y 35L e
35L e
-3000 -2000 -1000 0-2
-1
0
1
2 x 104
1
2
3
4
5
-300 -200 -100
-500
0
5006
7
89
10
11
0.2pk 100rk
3pik 0.5pvk
30 120pvk
Real(e)
Imag
inar
y
-6000 -4000 -2000 0-4
-2
0
2
4 x 104
1
3
2
5
4
-300 -200 -100 0
-500
0
500
6
7
8
9
10
11
0.2pk 100rk
3pik 0.5pvk
50pvk
Real(f)
Imag
inar
y
3 30.1 8L e e
35L e
Fig. 2. Root locus diagram as parameter changes.
shown in Appendix. The root locus of the closed loop system is
depicted based on the experimental tests, the effect of Pk , rk
Pik , Pvk , rvk and L are studied. As seen the root locus diagrams
in Fig. 2, all eigenvalues are always in the left half-plane. That
is to say, the system is stable when the appropriate control and
physics parameters are selected.
III. SIMULATION RESULTS
H-brideg #1
H-brideg #2
H-brideg #6
Utility
Grid
g gV
2 2V
6 6V
line lineI
1.2mH
600V
50Hz
Module #1
Module #2
Module #6
Fig. 3. Simulation model consisting of six modules.
TABLE I PARAMETERS FOR SIMULATIONS
Method Parameters Values Parameters Values
Proposed
scheme
*gV (V)
600 *P (W) 1000
lineL (H) 1.2e-3 *Q (Var) 500
Method in
[11]
*gV (V)
600 *P (W) 1000
*V (V) 98 k 1.2e-3
lineL (H) 1.2e-3 * (rad/s) 100
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The circuit level simulation model consisting of six modules
are carried out on the platform of MATLAB/SIMULINK using
SimPowerSystems (see Fig.3). This simulation is implemented
based on the method in [11] and the proposed scheme. The
associated parameters are listed in Table I.
0 2 4 6 8 10-1000
0
1000
2000
3000
Time(sec)(a1)
Act
ive
Po
wer
(W)
0 2 4 6 8 10-4000
-2000
0
2000
4000
6000
8000
Time(sec)(b1)
Rea
ctiv
e P
ow
er(V
ar)
0 2 4 6 8 1049.649.749.849.9
5050.150.250.350.4
Time(sec)(c1)
Fre
qu
ency
(Hz)
0
200
400
600
800
1000
1200
0 2 4 6 8 10Time(sec)
(a2)
Act
ive
Pow
er(W
)
0
100200300
400500600700
0 2 4 6 81
0Time(sec)
Rea
ctiv
e P
ow
er(V
ar)
(b2)
49.8
49.9
50
50.1
50.2
0 2 4 6 8 10Time(sec)
(c2)
Fre
qu
ency
(Hz)
1 6f f
1 6Q Q
1 6P P
2 6Q Q
1 6P P
1Q
1 6f f
Fig. 4. Simulation results.
A. Case1: the method in [11]
This simulation with 10% grid voltage sag at t=5s is
performed based on the method in [11]. The active power and
reactive power sharing results are depicted in Fig. 4(a1) and
(b1). The reactive power is negative to maintain the system
stable operation [11] before t=5s. The frequencies are shown in
Fig. 4(c1). Therefore, it is concluded that the system is unstable
under the grid voltage sag condition based on the method in
[11].
B. Case2: the proposed scheme
Under the same setup as case 1, this simulation is
implemented with the proposed scheme under the 10% grid
voltage sag condition at t=5s. The waveforms of active power,
reactive power and frequency are shown in Fig. 4(a2), (b2) and
(c2), respectively. The reactive power is always positive, which
indicates that the proposed scheme holds the capability of
reactive power compensation to the grid. When the grid voltage
sag occurs after t=5s, the system could always maintain the
system stable and inject the desired powers into the grid. The
simulation results show that the proposed scheme is more
robust compared to the method in [11] under the same grid
voltage sag condition.
C. Case3: fault-tolerant operation with the proposed scheme
This simulation with module #6 suddenly lost at t=5s is
carried out based on the proposed scheme. When a failure
occurs in module #6, the bypass method [16] is applied. The
waveforms of active and reactive power are shown in Fig. 5(a)
and (b), in which the power shortage of module #6 is supplied
automatically by module #1 because it is a free variable.
Therefore, the proposed scheme can realize the fault-tolerant
operation within a certain extent.
0 2 4 6 8 10-500
0
500
1000
1500
2000
2500
Time(sec)
Act
ive
Po
wer
(W)
1P
6P
2 5P P
0
200
400
600
800
1000
1200
0 2 4 6 8 10Time(sec)
Rea
ctiv
e P
ow
er(V
ar)
1Q
6Q
2 5Q Q
(a) (b)
Fig. 5. Simulation results when module #6 is by-passed.
IV. EXPERIMENTAL RESULTS
Personal
Computer
Scope
Inverter-1
Inverter-2
Inverter-3
Driver-1
DSP+FPGA
Control Platform
DC Power
Supply-1
DC Power
Supply-2
DC Power
Supply-3
Driver-3
Driver-2
LC filterLC filter
Line
Inductor Switch
Programmable
Power Supply
Grid
Fig. 6. Prototype setup of the grid-connected cascaded inverters.
The prototype setup of the grid-connected cascaded inverters
shown in Fig. 6 is built in the lab, which is consisting of three
modules. The control diagram of the proposed scheme is shown
in Fig. 1. The experimental parameters are listed in Table II. TABLE II
PARAMETERS FOR EXPERIMENTS
Parameters Values Parameters Values
*gV (V)
60 *P (W) 20
lineL (H) 5e-3 *Q (Var) 4
fL (H) 0.6e-3 fC F 20
1dcV (V) 40 2 3,dc dcV V (V) 30
A. Case1: normal grid condition
Vg
V2
V3
Iline
Fig. 7. Experimental waveforms under the normal-grid condition.
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20
5
10
15
20
25
Time(sec)
Act
ive
Po
wer
(W)
Module #1Module #2Module #3
(a)
1P2 3P P
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0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 20
2
4
6
8
Time(sec)
Rea
ctiv
e P
ow
er(V
ar)
Module #1Module #2Module #3
(b)
1Q
2 3Q Q
Fig. 8. Experimental results of case 1 (a) active power (b) reactive power.
This experiment is performed under the normal grid
condition. The experimental waveforms of voltage and current
are presented in Fig. 7, in which the output voltages of module
#2 and #3 are always in-phase with grid. The active power
sharing results are shown in Fig. 8(a), in which the active
powers of module #1 are higher than others due to the active
power losses in experiment. Figure 8(b) shows that the reactive
powers of module #1 are more than others to compensate the
absorbed reactive power of line. From the experimental results,
the proposed scheme can inject the desired powers into grid and
maintain the self-synchronized operation.
B. Case2: grid voltage sag condition
Vg
V2
V3
Iline
Fig. 9. Experimental waveforms under the grid voltage sag condition.
This experiment with the 10% grid voltage sag is carried out.
The measured waveforms are depicted in Fig. 9, in which the
output voltage of module #2 and #3 reduces while the line
current increasing after the grid voltage sag occurring. The test
results are shown in Fig. 10(a) and (b), in which the powers of
module #1 are increased as the line current increases. The
experimental results indicate that the proposed scheme is
adaptive to the grid voltage sag condition.
0 1 2 3 4 5 6 7 8 9 100
5
10
15
20
25
Time(sec)(a)
Act
ive
Po
wer
(W)
Module #1Module #2Module #3
Voltage sag
1P2 3~P P
0 1 2 3 4 5 6 7 8 9 100123456789
Time(sec)(b)
Rea
ctiv
e P
ow
er(V
ar)
Voltage sag
Module #1Module #2Module #3
1Q
2 3Q Q
Fig. 10. Experimental results of case 2 (a) active power (b) reactive power.
C. Case3: grid frequency deviations
Vg
V2
V3
Iline
Fig. 11. Experimental waveforms under the grid frequency deviations.
0 1 2 3 4 5 6 7 8 9 1048.849
49.249.449.649.8
5050.2
Time(sec)(a)
Fre
quen
cy(H
z) Grid
Module #1
Module #2
Module #3
Frequency deviation
0 1 2 3 4 5 6 7 8 9 100
5
10
15
20
25
Time(sec)(b)
Act
ive
Pow
er(W
)Frequency deviation Module #1
Module #2Module #3
1P2 3P P
0 1 2 3 4 5 6 7 8 9 10-30-20-10
0102030
Time(sec)(c)
Rea
ctiv
e P
ow
er(V
ar)
Frequency deviation
Module #1Module #2Module #3
1Q
2 3Q Q
Fig. 12. Experimental results of case 3 (a) frequency (b) active power (c) reactive power.
This experiment with the grid frequency deviation (-1Hz) is
implemented. The voltage and current waveforms are shown in
Fig. 11. The frequencies are shown in Fig. 12(a), in which all
modules always maintain synchronization with the grid even
under such large disturbances. The active and reactive power
allocations are shown in Fig. 12(b) and (c). Clearly, the
proposed scheme is robust against the grid frequency deviation.
D. Case4: DC input voltage sag condition
Vg
V2
VDC2
Iline
Fig. 13. Experimental waveforms under DC input voltage sag condition.
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0 1 2 3 4 5 6 7 8 9 100
5
10
15
20
25
Time(sec)(a)
Act
ive
Pow
er(W
)
Module #1Module #2Module #3
Input voltage sag
1P2 3~P P
0 1 2 3 4 5 6 7 8 9 100
2
4
6
8
Time(sec)(b)
Rea
ctiv
e P
ow
er(V
ar)
Input voltage sag
1Q
2 3~Q QModule #1Module #2Module #3
Fig. 14. Experimental results of case 4 (a) active power (b) reactive power.
This experiment with the DC input voltage sag is carried out.
The test waveforms are shown in Fig. 13. The active power and
reactive power sharing results are depicted in Fig. 14(a) and (b),
in which the powers remain the same even as DC input voltage
sag occurs. Therefore, the proposed scheme is feasible to the
input voltage sag condition to some extent.
E. Case5: grid impedance variation
Vg
V2
V3
Iline
Fig. 15. Experimental waveforms under grid impedance variation.
0 1 2 3 4 5 6 7 8 9 100
5
10
15
20
25
Time(sec)(a)
Act
ive
Po
wer
(W)
Module #1Module #2Module #3
1P2 3~P P
0 1 2 3 4 5 6 7 8 9 100
2
4
6
8
Time(sec)(b)
Module #1Module #2Module #3
1Q
2 3~Q Q
Rea
ctiv
e P
ow
er(V
ar)
Fig. 16. Experimental results of case 5 (a) active power (b) reactive power.
This test with grid inductance variation (from 5mH to 6.2mH)
is performed. The related waveforms are shown in Fig. 15. The
active and reactive powers are depicted in Fig. 16(a) and (b),
respectively. Compared to the results in case 1, the reactive
power of module #1 is increased to compensate more reactive
powers when the grid inductor increases. As seen, the proposed
scheme is suitable for the grid impedance variations.
F. Case6: the method in [11]
Vg
Iline
Fig. 17. Experimental waveforms with the method in [11].
This test is carried out with the control method in [11], and
the corresponding experiment waveforms are shown in Fig. 17.
When the 10% grid voltage sag occurs, the grid current begins
to divergent until the overcurrent protection is triggered.
Compared to case 2, it is concluded that the proposed scheme is
insensitive to the grid voltage condition. That is to say that the
proposed scheme is more robust than the method [11].
G. Case7: grid harmonics condition
The test under the distorted grid voltage (THD=5.26%) is
implemented. The experimental waveforms are shown in Fig.
18. As seen, the proposed scheme is still feasible under the
condition of the grid distortion.
Vg
V2
V3
Iline
Fig. 18. Experimental waveforms under the harmonic grid condition.
V. CONCLUSION
This letter proposes a decentralized control scheme of the
grid-connected cascaded inverters, where the synchronization
operation is realized via the common line current information.
Due to the decentralized control, the number of cascaded
modules is unlimited in theory. Experimental results show that
the cascaded system could operate normally under the
abnormal-grid conditions (grid voltage sag, distortion and
frequency deviation). That is to say the method is robust against
the grid voltage variations to a certain extent. Based on these
features, it has the potential to be extended to the medium/high
0278-0046 (c) 2019 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.
This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Citation information: DOI 10.1109/TIE.2019.2945266, IEEETransactions on Industrial Electronics
IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
voltage level photovoltaic, storage and STATCOM cascaded
systems, where the number of series modules is very large.
APPENDIX
T
1 2 n
X X X X (21)
where ,1 ,2I II X X 1
X ,, ,1 ,2i L i i vi viI V X X X .
1 2 2
3 4
3 4
A A A
A A 0 0A
0 0
A 0 0 A
(22)
where
2
10
0 1
2 22
P
c P r c r
c
kj
L L
j
k k kj
L L
1A ;
10 0 0
0 0 0 0
20 0 0c r
L
k
L
2A ;
0 0 0
10 0
0 0 0
20 0
f
c rv
f
C
k
C
3A ;
4
2
10
10 0
0 0 1
22 2
Pi Pi Pv Pi
f f f f
f
c rv
c rv c
f
k k k kj
L L L L
jC
j
kj k j
C
A .
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