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Lecture 11ALU and Control Unit Design
Presented ByDr. Shazzad Hosain
Asst. Prof. EECS, NSU
Hardwired Control Design• Eight Steps to follow
Step 1: Derive the Flow ChartStart
Stop
R 0M Multiplicand via inbus
Q Multiplier via inbus
R R + MQ Q – 1
Q=0
Outbus R
no
yes
Step 2: Obtain register transfer description
Step 3: Specify processing hardware along with various components
Step 4: Complete the design of the processing section
M
L
CD
C0: R ← 0C1: M ← inbusC2: Q ← inbusC3: F ← r + lC4: Q ← Q – 1 C5: outbus ← RC6: R ← F
R
CL
DQ
LD
C
4 4
C0
44
4-bitadder
F
C1 C2
C3
C4
C5
C6
Z
inbus
outbus
Step 5: Determine the block diagram of the controller
0
1
2
3
4
5
6
Step 6: Obtain the state diagram of the controller
T0
T1
T2
T3
T4
T5
Z=1
Z=0
State Diagram
Step 7: Specify the characteristics of the hardware for generating the required timing signals
T0
T1
T2
T3
T4
T5
Z=1
Z=0
State Diagram
Step 7: Specify the characteristics of the hardware for generating the required timing signals
T0
T1
T2
T3
T4
T5
Z=1
Z=0
State Diagram
Step 7: Specify the characteristics of the hardware for generating the required timing signals
T0
T1
T2
T3
T4
T5
Z=1
Z=0
State Diagram
Step 8: Draw the logic circuit of the controller
Reset
1
3 – to – 8 Decoder
0
1
2
3
4
5
6
7
T0
T1
T2
T3
T4
T5
unus
ed
C0, C1
C2
C3, C4, C6
C5
Sequence Controller
(SC)
Enable
Clear
Load
Clock
Clock
O2
O1
O0
d2 d1 d0L
Z
Logic Diagram of the unsigned multiplier controller
Sequence Controller Design
T3
T5
Inputs Outputs
Z T3 T5 L d2 d1 d0
0 1 x 1 0 1 0
x x 1 1 1 0 1
Truth Table
_ L = Z T3 + T5
d2 = T5 _ d1 = Z T3 d0 = T5
SC Alternative DesignInputs Outputs
Z T3 T5 L d2 d1 d0
0 1 x 1 0 1 0
x x 1 1 1 0 1
Truth Table
Z
T3
T5
_ L = Z T3 + T5
d2 = T5 _ d1 = Z T3 d0 = T5
L
d2
d1d0
Micro-programmed Control Unit Design
• Micro-programmed control unit contains programs written using microinstructions
• The programs written in ROM inside the CPU• The microprocessor reads each micro-instruction into
instruction register from external memory• The control unit translates the micro-instructions for
the microprocessor
Micro-instruction format
• All micro-instructions have two fields– Control word• Indicates which control lines are to be activated
– Next address• Specifies the address of the next instruction to be
executed
Design Decisions
• Cost of CPU depends on size of control memory• Size depends on length of micro-instructions• Major design decision is to reduce the length of
micro-instructions • Length depends on two factors– Degree of parallelism: number of microinstructions
that can be activated simultaneously i.e. control bits– The method by which the address of next micro-
instruction is determined
Control Bit Organization
• Several ways to organize– Assign a single bit for each control line, unencoded
format• Allows full parallelism• No decoding is necessary
– Assign n number of bits for 2n number of micro instructions, encoded format• Decoding is necessary• Less parallelism
Unencoded vs. Encoded Format
C0: outbus XC1: outbus Y
1. Each operation can be performed one at a time, because there is a one outbus2. A single can be assigned for each transfer
Unencoded formatTwo operations are performed
Encoded formatThree operations can be performed
Unencoded vs. Encoded Format Cont.• If there are eight (8) different operations then 8
different control bitsIns. Number C0 C1 C2 C3 C4 C5 C6 C7 Operation Performed
1 1 0 0 0 0 0 0 0 outbus X2 0 1 0 0 0 0 0 0 outbus Y* * * * * * * * * ********
8 0 0 0 0 0 0 0 1 X outbus
Ins. Number d2 d1 d0Operation Performed
1 0 0 0 outbus X2 0 0 1 outbus Y* * * * ********
8 1 1 1 X outbus
Unencoded format
Encoded format
Horizontal microinstruction
Vertical microinstruction
Designing Micro-instructions
01234
56
Designing Micro-instructions
Control Memory(CM)6 x 12
3
12
Condition Select
Branch Adder
Control Functions
C0 C1 ……… C6
2 3
000 00 000 1100000001 00 000 0010000010 00 000 0001101011 01 010 0000000100 00 000 0000010101 10 101 0000000
Micro-program Counter (MPC) Reset
Load/increment
MUX
0
1
2
1Z
Vcc
CWR(Control Word Register)
Components
• Micro-program Counter (MPC)– Holds the address of the next micro-instruction
• Control Word Register (CWR)– Contain three fields• Condition select• Branch address• Control function
• MUX (Multiplexer)
References
• Chapter 7, Fundamental of Digital Logic and Microcomputer Design – by M. Rafiquzzaman