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LED LED LED LED Control Control Control Control Driver river river river TM1629 TM1629 TM1629 TM1629 www.szpth.com V1.1 Overview Overview Overview Overview TM1629 is a special circuit for LED (light-emitting diode) driver control with keyboard scanning port. It integrates with different circuits such as MCU digital port, data latch, LED high-voltage drive, keyboard scanning, etc. The product has good performance and reliable quality, and is mainly applied in display drive of VCR, VCD, DVD, home theater and other similar products. Features Features Features Features Low power consumption CMOS workmanship Display mode(16segment×8positions) Key scanning(8×4bit) Luminance adjustment circuit (8-level adjustable duty cycle) Serial port (CLK, STB, DIN DOUT) Oscillation mode: built-in RC oscillation(450KHz+ 5%) Built-in power-on reset circuit Packaging:QFP44 Pin definition Pin definition Pin definition Pin definitions 1 2 3 4 5 6 7 8 9 10 11 NC STB SCLK DOUT NC DIN VSS K0 K1 K2 K3 12 13 14 15 16 CLKSET/VDD NC SEG1/KS1 17 18 19 20 21 22 SEG2/KS2 SEG3/KS3 SEG4/KS4 SEG5/KS5 SEG6/KS6 SEG7/KS7 SEG8/KS8 VDD 33 23 24 25 26 27 28 29 30 31 32 VSS SEG9 SEG10 SEG11 SEG12 SEG13 SEG14 SEG15 SEG16 VDD GRID8 34 35 36 37 38 39 40 41 42 43 44 GRID1 GRID2 GRID3 GRID4 GRID5 GRID6 GRID7 VSS VSS VSS VSS TM1629TM1629TM1629TM1629TOPVIEWTOPVIEWTOPVIEWTOPVIEWPin definitions Pin definitions Pin definitions Pin definitions Free Datasheet http://www.datasheet4u.com/
Transcript
Page 1: LEDLED ControlControlControl DDDDriverriver TM1629aitendo3.sakura.ne.jp/aitendo_data/product_img/ic/LED...· Note:Note: During data output, DIO port is N-pipe open-d rain output, and

LEDLEDLEDLED ControlControlControlControl DDDDriverriverriverriver TM1629TM1629TM1629TM1629

www.szpth.com V1.1

OverviewOverviewOverviewOverview

TM1629 is a special circuit for LED (light-emitting diode) driver control with keyboard scanning port. It integrates with different circuits such as MCU digital port, data latch, LED high-voltage drive, keyboard scanning, etc. The product has good performance and reliable quality, and is mainly applied in display drive of VCR, VCD, DVD, home theater and other similar products.

FeaturesFeaturesFeaturesFeatures

� Low power consumption CMOS workmanship � Display mode(16segment×8positions) � Key scanning(8×4bit) � Luminance adjustment circuit (8-level adjustable duty cycle) � Serial port (CLK, STB, DIN DOUT) � Oscillation mode: built-in RC oscillation(450KHz+5%) � Built-in power-on reset circuit � Packaging:QFP44

Pin definitionPin definitionPin definitionPin definitionssss

1

2

3

4

5

6

7

8

9

10

11NC

STB

SCLK

DOUT

NC

DIN

VSS

K0

K1

K2

K3

12 13

14

15

16

CL

KS

ET

/VD

D

NC

SE

G1/K

S1

17

18

19

20

21

22

SE

G2/K

S2

SE

G3/K

S3

SE

G4/K

S4

SE

G5/K

S5

SE

G6/K

S6

SE

G7/K

S7

SE

G8/K

S8

VD

D

33

23

24

25

26

27

28

29

30

31

32 VSS

SEG9

SEG10

SEG11

SEG12

SEG13

SEG14

SEG15

SEG16

VDD

GRID8

34

35

36

37

38

39

40

41

42

43

44

GR

ID1

GR

ID2

GR

ID3

GR

ID4

GR

ID5

GR

ID6

GR

ID7

VS

S

VS

S

VS

S

VS

S

TM1629TM1629TM1629TM1629

TOP VIEWTOP VIEWTOP VIEWTOP VIEW

Pin definitionsPin definitionsPin definitionsPin definitions

Free Datasheet http://www.datasheet4u.com/

Page 2: LEDLED ControlControlControl DDDDriverriver TM1629aitendo3.sakura.ne.jp/aitendo_data/product_img/ic/LED...· Note:Note: During data output, DIO port is N-pipe open-d rain output, and

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SSSSignignignign NameNameNameName DescriptionDescriptionDescriptionDescription

DIN Data input I/O serial data at rising edge of clock, starting from low order .can use with DOUT to DIO

DOUT Date output On the rising edge of the clock output serial data, from a low starting. With DIN shorted for DIO to use

STB Chip selection

Initialize serial port at rising/falling edge, and then wait for receiving command. The first byte after the STB becomes low is taken as the command. When treating the command, other current treatments are stopped. When STB is high, CLK is ignored.

CLK Clock input I/O serial data at rising edge of clock

K0~K3 Key scanning

data input The data to this pin are latched after display cycle

SEG1/KS1~SEG8/KS8 Output

(segment) Segment output (also used for key scanning), P pipe open-drain output

SEG9~SEG16 Output

(segment) Segment output (also used for key scanning), P pipe open-drain output

GRID1~GRID8 Output

(position) Position output, N pipe open-drain output

VDD Logical power

supply 5V±10%

VSS Logic ground Ground system

NC Space No connection

Note:Note:Note:Note: During data output, DIO port is N-pipe open-drain output, and when reading keys, an

external pull-up resistor of 1K – 10K is required. We recommend a 10K pull-up resistor. DIO controls the action of the N-pipe at the falling edge of the clock, and at this time the reading is not stable, please refer to figure (6). It becomes stable only when reading at the rising edge of the clock.

DIO

10K

VCC

GND

CT

芯芯芯芯芯芯

Circuit inside the chip

Free Datasheet http://www.datasheet4u.com/

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Figure (1)

Display register address and display mode

The storage of this register is transferred from external component to TM1629 through serial port, with an address of 16 bytes unit in total from 00H-ODH, corresponding to the LED lamps connected to the chip’s SGE and GRID pin respectively. The distribution is shown as the following figure:

When writing LED display data, operate in the order from lower position to higher position of the display address and the data byte.

SEG1

SEG1

SEG1

SEG1

SEG2

SEG2

SEG2

SEG2

SEG3

SEG3

SEG3

SEG3

SEG4

SEG4

SEG4

SEG4

SEG5

SEG5

SEG5

SEG5

SEG6

SEG6

SEG6

SEG6

SEG7

SEG7

SEG7

SEG7

SEG8

SEG8

SEG8

SEG8

SEG9

SEG9

SEG9

SEG9

SEG10

SEG10

SEG10

SEG10

SEG11

SEG11

SEG11

SEG11

SEG12

SEG12

SEG12

SEG12

SEG13

SEG13

SEG13

SEG13

SEG14

SEG14

SEG14

SEG14

SEG15

SEG15

SEG15

SEG15

SEG16

SEG16

SEG16

SEG16

xHL (four low positions)

xxHU (four high positions)

xxHL (four low positions)

xxHU (four high positions)

B0 B1 B2 B3 B4 B5 B6 B B0 B1 B2 B3 B4 B5 B6 B 00HL 00HU 01HL 01HU GRID1GRID1GRID1GRID1 02HL 02HU 03HL 03HU GRID2GRID2GRID2GRID2 04HL 04HU 05HL 05HU GRID3GRID3GRID3GRID3 06HL 06HU 0 HL 0 HU GRID4GRID4GRID4GRID4 08HL 08HU 09HL 09HU GGGGRID5RID5RID5RID5 0 HL 0 HU 0BHL 0BHU GRID6GRID6GRID6GRID6 0CHL 0CHU 0DHL 0DHU GRIDGRIDGRIDGRID 0EHL 0EHU 0FHL 0FHU GRID8GRID8GRID8GRID8

Figure(2) Write LED display data when, according to from the low address to address, from low to high byte operation in the use of no use to the SEG output port, in the corresponding BIT address bits to write 0. Key scanning and key scanning registerKey scanning and key scanning registerKey scanning and key scanning registerKey scanning and key scanning register

The key scanning matrix is 8×4bit, shown as below:

KS

1

KS

2

KS

3

KS

4

KS

5

KS

6

KS

7

KS

8

K1

K2

K3

K0

Figure(3)

Free Datasheet http://www.datasheet4u.com/

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Key scan data storage address figure (4 ) shows, first read key commands, began to read the key data of B TE1 - B TE4 bytes, reading data from the low output, K chip and KS pins corresponding key is pressed, the corresponding bytes within the BIT bit 1.

B0B0B0B0 B1B1B1B1 B2B2B2B2 B3B3B3B3 B4B4B4B4 B5B5B5B5 B6B6B6B6 BBBB K3K3K3K3 K2K2K2K2 K1K1K1K1 K0K0K0K0 K3K3K3K3 K2K2K2K2 K1K1K1K1 K0K0K0K0

KS1 KS2 B TE1B TE1B TE1B TE1 KS3 KS4 B TE2B TE2B TE2B TE2 KS5 KS6 B TE3B TE3B TE3B TE3 KS KS8 B TE4B TE4B TE4B TE4

Figure(4) NOTENOTENOTENOTE: 1. TM1629 can read 4 bytes in total, and no more is allowed.

2. Order of reading can only be from B TE1 to B TE4, no trans-byte reading is allowed. For instance, when the keys corresponding to K2 and KS8 on the hardware are pressed, the data in such keys can only be read when reading to 4BIT of the fifth byte When the three keys K1 and KS8, K2 and KS8, K3 and KS8 are pressed at the same time, the reading of B TE4 at B4, B5 and B6 are all 1 . 3. The compound key can only be the same KS, and only different K pins can form a compound key the same K and different KS pins can not from a compound key. Description to commandsDescription to commandsDescription to commandsDescription to commands

Commands are used to set display mode and state of LED driver. The first byte input by DIO at the falling edge of STB is taken as the first command. Through

decoding, take the highest two bits B and B6 to distinguish different commands.

BBBB B6B6B6B6 CommandCommandCommandCommand 0 1 Data reading/writing setting command 1 0 Display control command 1 1 ddress setting command

If STB is set to high level during command or data transmission, the serial communication will

be initialized, and the command or data being transmitted are invalid (previously transmitted commands or data are still valid).

1.1.1.1.Display mode setting commandDisplay mode setting commandDisplay mode setting commandDisplay mode setting command

The command is used to set the data write and read, B1 and B0 bit is set to 01 or 11 is not allowed.

MSB LSB

BBBB B6B6B6B6 B5B5B5B5 B4B4B4B4 B3B3B3B3 B2B2B2B2 B1B1B1B1 B0B0B0B0 FunctionFunctionFunctionFunction DescriptionDescriptionDescriptionDescription

Free Datasheet http://www.datasheet4u.com/

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0 1 0 0 Write data to display

register

0 1 1 0

Data reading/writing

mode setting Read key scanning data

0 1 0 uto increase of

address 0 1 1

ddress increase mode

setting Fixed address 0 1 0 Normal mode

0 1

0

1

Test mode setting (for internal use

only) Test mode

2.2.2.2. ddress command settingddress command settingddress command settingddress command setting

MSB LSB

BBBB B6B6B6B6 B5B5B5B5 B4B4B4B4 B3B3B3B3 B2B2B2B2 B1B1B1B1 B0B0B0B0 Display Display Display Display addressaddressaddressaddress

1 1 0 0 0 0 00H 1 1 0 0 0 1 01H 1 1 0 0 1 0 02H 1 1 0 0 1 1 03H 1 1 0 1 0 0 04H 1 1 0 1 0 1 05H 1 1 0 1 1 0 06H 1 1 0 1 1 1 0 H 1 1 1 0 0 0 08H 1 1 1 0 0 1 09H 1 1 1 0 1 0 0 H 1 1 1 0 1 1 0BH 1 1 1 1 0 0 0CH 1 1

N/ , fill in 0

1 1 0 1 0DH

This command is used to set the address of display register. When the address is set as 0EH or higher, the data are ignored until a valid address is set. When powered, the address is set as 00H.

3.3.3.3.Display controlDisplay controlDisplay controlDisplay control

MSB LSB

BBBB B6B6B6B6 B5B5B5B5 B4B4B4B4 B3B3B3B3 B2B2B2B2 B1B1B1B1 B0B0B0B0 FunctionFunctionFunctionFunction DescriptionDescriptionDescriptionDescription

1 0 0 0 0 Set the pulse width to

1/16

1 0 0 0 1 Set the pulse width to

2/16

1 0 0 1 0 Set the pulse width to

4/16

1 0

N/ , fill in 0

0 1 1

Extinction number setting

Set the pulse width to

Free Datasheet http://www.datasheet4u.com/

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10/16

1 0 1 0 0 Set the pulse width to

11/16

1 0 1 0 1 Set the pulse width to

12/16

1 0 1 1 0 Set the pulse width to

13/16

1 0 1 1 1 Set the pulse width to

14/16 1 0 0 Display is off 1 0 1

Display switch setting Display is on

Serial data transmission formatSerial data transmission formatSerial data transmission formatSerial data transmission format

Reading and receiving 1 BIT are both happened at the rising edge of the clock.

1.1.1.1. Data receiving (writing data)Data receiving (writing data)Data receiving (writing data)Data receiving (writing data)

B0 B1 B2 B3 B4 B5 B6 B7

CLK

DIO

STB Figure(5)

2.2.2.2.Data reading (reading data)Data reading (reading data)Data reading (reading data)Data reading (reading data)

CLK

STB

B0 B1 B2 B3 B4 B5 B6 B7 B0 B1 B2 B3 B4

Twait

DIO

发发发发发发 发读发发读读 Sending key command Reading key data

Figure(6) ▲ NoteNoteNoteNote: when reading data, it requires for a waiting time Twait (min. 1 S) to set the command

to the falling edge of CLK for data reading starting from the eighth rising edge of the serial clock CLK.

Display and keyDisplay and keyDisplay and keyDisplay and keyssss 1.1.1.1. Drive common cathode digital tubDrive common cathode digital tubDrive common cathode digital tubDrive common cathode digital tub

Free Datasheet http://www.datasheet4u.com/

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1

1

1

1

1

1

1

SEG1

SEG2

SEG3

SEG4

SEG5

SEG6

SEG7

GRID1

a

bf

c

g

de

DPY

[LEDgn]

ABCDEFG

SEG4

SEG3

SEG2

SEG1

SEG5

SEG6

SEG7

GRID1

Figure ( )

Figure ( ) shows the connection diagram of common cathode digital tube to make the digital tube display 0 , set SEG1, SEG2, SEG3, SEG4, SEG5 and SEG6 to high level and SEG to low level when GRID1 is low level, view the address table shown in Figure (2), and write data 3FH in 00H address unit.

SEG8SEG8SEG8SEG8 SEGSEGSEGSEG SEG6SEG6SEG6SEG6 SEG5SEG5SEG5SEG5 SEG4SEG4SEG4SEG4 SEG3SEG3SEG3SEG3 SEG2SEG2SEG2SEG2 SEG1SEG1SEG1SEG1 0 0 1 1 1 1 1 1 00H00H00H00H BBBB B6B6B6B6 B5B5B5B5 B4B4B4B4 B3B3B3B3 B2B2B2B2 B1B1B1B1 B0B0B0B0

2. Drive common anode digital tube2. Drive common anode digital tube2. Drive common anode digital tube2. Drive common anode digital tube

a

bf

c

g

de

DPY

[LEDgn]

ABCDEFG

1

1

1

1

1

1

1

GRID1

GRID2

GRID3

GRID4

GRID5

GRID6

GRID7

GRID1

GRID2

GRID3

GRID4

GRID5

GRID6

GRID7

SEG1 SEG1

Figure(8)

Shows the connection diagram of common anode digital tube to make the digital tube

display 0 , set SEG1 to high level when GRID1, GRID2, GRID3, GRID4, GRID5 and GRID6 are low level, and set SEG1 to low level when GRID is low level, write data 01H to address unit 00H, 02H, 04H, 06H, 08H and 0 H respectively and write data 00H to other address units.

SEG8SEG8SEG8SEG8 SEGSEGSEGSEG SEG6SEG6SEG6SEG6 SEG5SEG5SEG5SEG5 SEG4SEG4SEG4SEG4 SEG3SEG3SEG3SEG3 SEG2SEG2SEG2SEG2 SEG1SEG1SEG1SEG1

Free Datasheet http://www.datasheet4u.com/

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0 0 0 0 0 0 0 1 00H00H00H00H 0 0 0 0 0 0 0 1 02H02H02H02H 0 0 0 0 0 0 0 1 04H04H04H04H 0 0 0 0 0 0 0 1 06H06H06H06H 0 0 0 0 0 0 0 1 08H08H08H08H 0 0 0 0 0 0 0 1 0 H0 H0 H0 H 0 0 0 0 0 0 0 0 0CH0CH0CH0CH

B B6 B5 B4 B3 B2 B1 B0

NOTENOTENOTENOTE SEG1-11 is P pipe open-drain output, and GRID1- is N pipe open-drain output while operating, SEG1-11 only can be connected to LED anode, GRID only can be connected to LED cathode, and shouldn’t be connected reversely. 3.3.3.3.KeysKeysKeysKeys

Key scanning is completed by TM1629 automatically and cannot be controlled by user. Users only have to read the key value according to the time sequence. It requires two display circles to complete a key scanning, and one display circle requires about T 8x500US. Two different keys are pressed one after another, and the two readings are both the key value of the key firstly pressed.

ccording to figure (9), observe the output key scanning waveforms of SEG1/KS1 and SEG2/KS2 with an oscilloscope, as shown in figure (10).

1N

C2

DO

UT

3D

IN4

SC

LK

5ST

B6

K0

7K

18

K2

9K

310

VSS

11

NC

12CLKSET/VDD

13NC

14SEG1/KS1

15SEG2/KS2

16SEG3/KS3

17SEG4/KS4

18SEG5/KS5

19SEG6/KS6

20SEG7/KS7

21SEG8/KS8

22VDD

33

GR

ID8

32

VSS

31

VD

D30

SE

G16

29

SE

G15

28

SE

G14

27

SE

G13

26

SE

G12

25

SE

G11

24

SE

G10

23

SE

G9

44VSS

43GRID1

42GRID2 41

VSS40

GRID339

GRID438

VSS37

GRID536

GRID635

VSS34GRID7

VCC

R11K

R21K

示示示示示1示示示示示2

TM1629

Figure(9) Waveforms of SEGN/KSN when IC is scanning keyboard:

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SEG1/KS1

SEG2/KS2

SEG3/KS3

SEGN/KSN

Tdisp=500us Figure(10)

Tdisp relates to the working oscillation frequency of the IC. s the improvements of TM1629 provided by our company, the oscillation may differ. 500US is only for reference and the actual measurements shall prevail .Generally, Figure (11) can meet the requirements of key design.

S1

S2

S6

S3

S4

S5K1

K2

K3

SGE1/KS1 SGE1/KS2 SGE1/KS3 Figure(11)

When S1 is pressed down, B0 of the first byte reads 1 . If several keys are pressed down, several 1 will be read when S2 and S3 are pressed down, B1 and B3 of the first byte will read

1 .

Note: Note: Note: Note: Precautions for composite key note: SEG1/KS1-SEG10/KS10 is for display and key scanning multiplexing. Figure (12) for example, to make D1 on, D2 off, please set SEG1 to 1 , SEG2 to 0 if S1 and S2 are pressed at the same time, equivalent to SEG1 and SEG2 short circuit, D1 and D2 are lit.

S1

S2

1 D1 1 D2

GRID1

SGE1/KS1

SGE2/KS2

K1

Figure(12)

Solution

1. On hardware, set the keys that should be pressed simultaneously to different K lines, as shown in.

1 D1 1 D2

S2

S1SGE1/KS1

GRID1 GRID2 K1 K2

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Figure(13) 2. Connect the resistors in series on SEG1 SEG N, as shown in Figure (14) the resistance

should be 510 too large resistance will cause key invalid, and too low resistance can’t solve the problem of display interference.

S1

S2

1 D1 1 D2

GRID1

SGE1/KS1

SGE2/KS2

K1

510

510

Figure(14)

3. Or connect the diodes in series, as shown in Figure (15).

S1

S2

1 D1 1 D2

GRID1

SGE1/KS1

SGE2/KS2

K1

Figure(15)

TTTTransmission of serial data in applicationransmission of serial data in applicationransmission of serial data in applicationransmission of serial data in application 1.1.1.1. ddress increase modeddress increase modeddress increase modeddress increase mode

In the address auto +1 mode, to set an address actually means to set the initial address stored in the transferred data flow. When the initial address command is completely sent, send the data (16B TE at most) immediately without having to set STB to high position, and only do it when data sending completes.

Command1 Command2 Command3Data1 Data2 DataN

CLK

DIO

ST B

Command1: display mode setting command Command2: data reading/writing setting command Command3: display address setting command

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2.2.2.2.Fixed address modeFixed address modeFixed address modeFixed address mode In the fixed address mode, to set the address actually means to set the address stored in

the to-be-transferred 1B TE data. When the address is sent completely, send the 1B TE data immediately without having to set STB to high position (only do it when data sending completes) then, set the address to be stored in the second data, and when the data (16B TE at most) sending completes, set STB to high position.

command1 command2 data1

CLK

DIO

STB

command3 data2 command4......

Command1: display mode setting command Command2: data reading/writing setting command Command3: display address setting command, to set display address 1 Data1: display data 1, save to the address unit specified by Command3 Command4: display address setting command, to set display address 2 Data2: display data 2, save to the address unit specified by Command4 Command5: display control command 3.3.3.3.Read time sequence of keysRead time sequence of keysRead time sequence of keysRead time sequence of keys CLK

DIO

STB

Command1 Data1 Data2 Data3 Data4

Command1: reading key command Data1~5: reading key data

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4.4.4.4.The flow chart adopting utomaticThe flow chart adopting utomaticThe flow chart adopting utomaticThe flow chart adopting utomatic increase of address modeincrease of address modeincrease of address modeincrease of address mode

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开始

初始化

设置写显存的读读发发,采用地址自动加 1( 40H)

设置起始地址( 0C0H)

传送读读

16BYTE读读传送完毕了?

传显示控制发发设置最高亮度( 8FH)

设置发发读读发发( 42H)

发 1BTYE芯 容

将发发值存放在MCU的寄存示中

发完 4BYTE

吗?

有 发 发 被 发下 吗 ?

发发处理程序

结束

No

No

No

Yes

Yes

Yes

The flow chart adopting Fixed address modeThe flow chart adopting Fixed address modeThe flow chart adopting Fixed address modeThe flow chart adopting Fixed address mode

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开始

初始化

设 置 写 显 存 的 读 读 发 发采 用 固 定 地 址 ( 44H)

设置地址( 0C0H)

传送 1BYTE

读读

传 显 示 控 制 发 发 设 置 最高 亮 度 ( 8FH)

设置发发读读发发( 42H)

发 1BTYE芯容

将发发值存放在MCU的寄存示中

发完 4BYTE

吗?

有发发被发下吗?

发发处理程序

结束

重新设置地址( 0C1H)

传送 1BYTE

读读

……传完所有的读读

No

Yes

Schematic diagramSchematic diagramSchematic diagramSchematic diagram 1.1.1.1.Connecting diagram of TM16Connecting diagram of TM16Connecting diagram of TM16Connecting diagram of TM1629292929 driver common cathode digital screen is sho driver common cathode digital screen is sho driver common cathode digital screen is sho driver common cathode digital screen is shown in Figure (18):wn in Figure (18):wn in Figure (18):wn in Figure (18):

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NCDOUTDINSCLKSTBK0K1K2K3VSSNC

CL

KS

ET

/VD

DN

CS

EG

1/K

S1

SE

G2/K

S2

SE

G3/K

S3

SE

G4/K

S4

SE

G5/K

S5

SE

G6/K

S6

SE

G7/K

S7

SE

G8/K

S8

VD

D

GRID8VSS

VDDSEG16SEG15SEG14SEG13SEG12SEG11SEG10SEG9

VSS

GR

ID1

GR

ID2

VSS

GR

ID3

GR

ID4

VSS

GR

ID5

GR

ID6

VSS

GR

ID7

VCC

VCC

R110K

R210K

R310K

R410K

C4101

C5101

C6101

C3101

DINDOUT

SCLKSTB

+ C1100UF

C2104

VCC

注注:滤示芯容滤芯芯VDD,GND之之之芯之之之

TM1629

S1 S2 S3 S4 S5 S6 S7 S8

S9 S10 S11 S12 S13 S14 S15 S16

S17 S18 S19 S20 S21 S22 S23 S24

S25 S26 S27 S28 S29 S30 S31 S32

K0

K1

K2

K3

SG

1

SG

2

SG

3

SG

4

SG

5

SG

6

SG

7

SG

8

SG1SG2SG3SG4SG5SG6SG7SG8

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED1

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED2

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED3

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED4

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED5

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED6

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED7

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED8

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED9

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED10

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED11

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED12

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED13

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED14

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED15

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED16

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

SG1SG2SG3SG4SG5SG6SG7SG8

GR1 GR2 GR3 GR4 GR5 GR6

GR7 GR8

GR1 GR2 GR3

GR4 GR5 GR6 GR7 GR8

GR

1G

R2

GR

3G

R4

GR

5G

R6

GR

7

GR8

SG

1S

G2

SG

3S

G4

SG

5S

G6

SG

7S

G8

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

SG9SG10SG11SG12SG13SG14SG15SG16

Figure(18)

2.2.2.2.Connecting diagram of TM16Connecting diagram of TM16Connecting diagram of TM16Connecting diagram of TM1629292929 driver common anode di driver common anode di driver common anode di driver common anode digital screen is shown in Figuregital screen is shown in Figuregital screen is shown in Figuregital screen is shown in Figure(19)(19)(19)(19)

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NCDOUTDINSCLKSTBK0K1K2K3VSSNC

CL

KS

ET

/VD

DN

CS

EG

1/K

S1

SE

G2/K

S2

SE

G3/K

S3

SE

G4/K

S4

SE

G5/K

S5

SE

G6/K

S6

SE

G7/K

S7

SE

G8/K

S8

VD

D

GRID8VSS

VDDSEG16SEG15SEG14SEG13SEG12SEG11SEG10SEG9

VSS

GR

ID1

GR

ID2

VSS

GR

ID3

GR

ID4

VSS

GR

ID5

GR

ID6

VSS

GR

ID7

VCC

VCC

R110K

R210K

R310K

R410K

C4101

C5101

C6101

C3101

DINDOUT

SCLKSTB

+ C1100UF

C2104

VCC

注注:滤示芯容滤芯芯VDD,GND之之之芯之之之

TM1629

S1 S2 S3 S4 S5 S6 S7 S8

S9 S10 S11 S12 S13 S14 S15 S16

S17 S18 S19 S20 S21 S22 S23 S24

S25 S26 S27 S28 S29 S30 S31 S32

K0

K1

K2

K3

SG

1

SG

2

SG

3

SG

4

SG

5

SG

6

SG

7

SG

8

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED1

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED2

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED3

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED4

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED5

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED6

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED7

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED8

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED9

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED10

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED11

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED12

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED13

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED14

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED15

a

bf

c

g

de

DPYa

b

c

d

e

f

g

dp

dp

LED16

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

GR1GR2GR3GR4GR5GR6GR7GR8

SG1 SG2 SG3 SG4 SG5 SG6

SG7 SG8 SG9 SG10 SG11

SG12 SG13 SG14 SG15 SG16

SG

1S

G2

SG

3S

G4

SG

5S

G6

SG

7S

G8

SG9SG10SG11SG12SG13SG14SG15SG16

GR

1G

R2

GR

3G

R4

GR

5G

R6

GR

7

GR8

(19)

NOTENOTENOTENOTE 1. The wiring of the filter capacitor between VDD and GND on PCB should be close to

the chip of TM1629 to enhance filtering effect. 2. The three 100P capacitors connecting to DIO, CLK and STB communication ports can

reduce interferences to such ports. 3. Since the conduction pressure drop of Blu-ray digital tube is 3V, the power supply of

TM1629 is 5V.

Electrical parElectrical parElectrical parElectrical parameterameterameterameterssss 1.1.1.1.Limit parametersLimit parametersLimit parametersLimit parameters((((Ta 25Ta 25Ta 25Ta 25 , Vss 0 V, Vss 0 V, Vss 0 V, Vss 0 V))))

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ParameterParameterParameterParameter SignSignSignSign RangeRangeRangeRange UnitUnitUnitUnit

Logic supply voltageLogic supply voltageLogic supply voltageLogic supply voltage VDD -0.5 ~+ .0 V

Logic input voltageLogic input voltageLogic input voltageLogic input voltage VI1 -0.5 ~ VDD + 0.5 V

LED Seg driver output LED Seg driver output LED Seg driver output LED Seg driver output currentcurrentcurrentcurrent

IO1 -50 m

LED Grid driver output LED Grid driver output LED Grid driver output LED Grid driver output currentcurrentcurrentcurrent

IO2 +200 m

Power consumptionPower consumptionPower consumptionPower consumption PD 400 mW

OperatingOperatingOperatingOperating temperature temperature temperature temperature Topt -40 ~ +80

Storage temperatureStorage temperatureStorage temperatureStorage temperature Tstg -65 ~+150

2.2.2.2.Normal operating rangeNormal operating rangeNormal operating rangeNormal operating range((((Ta Ta Ta Ta ----20 20 20 20 ~~~~ ++++ 0000 Vss 0 VVss 0 VVss 0 VVss 0 V))))

ParameterParameterParameterParameter SignSignSignSign Min.Min.Min.Min. TypicalTypicalTypicalTypical Max.Max.Max.Max. UnitUnitUnitUnit Testing Testing Testing Testing

conditionconditionconditioncondition

Logic supply voltageLogic supply voltageLogic supply voltageLogic supply voltage VDD 5 V -

High level input voltageHigh level input voltageHigh level input voltageHigh level input voltage VIH 0. VDD - VDD V -

Low level input voltageLow level input voltageLow level input voltageLow level input voltage VIL 0 - 0.3

VDD V -

3.3.3.3.Electrical characteristicsElectrical characteristicsElectrical characteristicsElectrical characteristics((((Ta Ta Ta Ta ----20 20 20 20 ~~~~ ++++ 0000 VDD VDD VDD VDD 4.5 4.5 4.5 4.5 ~~~~ 5.5 5.5 5.5 5.5 VVVV Vss 0 V Vss 0 V Vss 0 V Vss 0 V))))

ParameterParameterParameterParameter SignSignSignSign Min.Min.Min.Min. TypicTypicTypicTypic

alalalal MMMM UnitUnitUnitUnit Testing conditionTesting conditionTesting conditionTesting condition

Ioh1 -20 -25 -40 m Seg1~Seg11 Vo vdd-2V

High level input High level input High level input High level input voltagevoltagevoltagevoltage

Ioh2 -20 -30 -50 m Seg1~Seg11 Vo vdd-3V

Low level input Low level input Low level input Low level input voltagevoltagevoltagevoltage

IOL1 80 140 - m Grid1~Grid6

Vo 0.3V

Low level input Low level input Low level input Low level input voltagevoltagevoltagevoltage

Idout 4 - - m VO 0.4V dout

High level output High level output High level output High level output current current current current tolerancetolerancetolerancetolerance

Itolsg - - 5 % VO VDD – 3V

Seg1~Seg11

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The outputThe outputThe outputThe output pulldown pulldown pulldown pulldown resistorresistorresistorresistor

RL 10 K K1~K3

Input currentInput currentInput currentInput current II - - ±1 VI VDD / VSS

High level input High level input High level input High level input voltagevoltagevoltagevoltage

VIH 0.

VDD - V CLK DIN STB

Low level input Low level input Low level input Low level input voltagevoltagevoltagevoltage

VIL - - 0.3 VDD

V CLK DIN STB

Lagging voltageLagging voltageLagging voltageLagging voltage VH - 0.35 - V CLK DIN STB

Dynamic current Dynamic current Dynamic current Dynamic current losslosslossloss

IDDdyn - - 5 m No load, show off

4.4.4.4.Switching characteristicsSwitching characteristicsSwitching characteristicsSwitching characteristics((((Ta Ta Ta Ta ----20 20 20 20 ~~~~ ++++ 0000 VDD VDD VDD VDD 4.5 4.5 4.5 4.5 ~~~~ 5.5 5.5 5.5 5.5 VVVV))))

ParameterParameterParameterParameter SymbSymbSymbSymb

olololol MinMinMinMin

TypicTypicTypicTypicalalalal

MaxMaxMaxMax unitunitunitunit TTTTest conditionest conditionest conditionest condition

Oscillation Oscillation Oscillation Oscillation frequencyfrequencyfrequencyfrequency

fosc - 500 - KHz R 16.5 K

tPL - - 300 ns CLK DOUT Propagation Propagation Propagation Propagation delay timedelay timedelay timedelay time tP L - - 100 ns CL 15pF, RL 10K

TT H 1 - - 2 s Seg1~Seg11

Rise timeRise timeRise timeRise time TT H

2 - - 0.5 s

CL 300p F Grid1~Grid4

Seg12/Grid ~ Seg14/Grid5

Dome timeDome timeDome timeDome time TTH - - 120 s CL 300pF Segn Gridn

Maximum clock Maximum clock Maximum clock Maximum clock frequencyfrequencyfrequencyfrequency

Fmax 1 - - MHz 50%

Input Input Input Input capacitcapacitcapacitcapacitanceanceanceance

CI - - 15 pF -

5.5.5.5.Timing characteristicsTiming characteristicsTiming characteristicsTiming characteristics((((Ta Ta Ta Ta ----20 20 20 20 ~~~~ + 0 + 0 + 0 + 0 VDD 4.5 VDD 4.5 VDD 4.5 VDD 4.5 ~~~~ 5.5 V 5.5 V 5.5 V 5.5 V))))

ParameterParameterParameterParameter SymbolSymbolSymbolSymbol MINMINMINMIN TypiTypiTypiTypicalcalcalcal

MMMM

unitunitunitunit Test conditonTest conditonTest conditonTest conditon

Clock pulse Clock pulse Clock pulse Clock pulse widthwidthwidthwidth

PWCLK 400 - - ns -

Pulse widthPulse widthPulse widthPulse width PWSTB 1 - - s -

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Data setup timeData setup timeData setup timeData setup time tSETUP 100 - - ns -

Data hold timeData hold timeData hold timeData hold time tHOLD 100 - - ns -

CLK CLK CLK CLK STB TIEMSTB TIEMSTB TIEMSTB TIEM tCLK STB

1 - - s CLK STB

Waiting timeWaiting timeWaiting timeWaiting time tW IT 1 - - s CLK CLK

Packing SizePacking SizePacking SizePacking Size QFP44

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HistoryHistoryHistoryHistory

Edition Date of issue Introduction V1.0 2010-02-29 Trial version V1.1 2012-0 -13 Revised edition

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