Lenovo G560 LA-5752P

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Title

Size Document Number Rev

Date: Sheet o f

Security Classification Compal Secret Data

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Issued Date Deciphered Date

LA-5752P 0.3Cover Sheet

Custom

1 51Thursday, October 29, 2009

2008/03/25 2008/04/Compal Electronics,Ltd.

REV:0.3

Compal Confidential

Arrandalewith Intel IBEX PEAK-M core logic

NIWE2Schematics Document

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0.3

MB Block DiagramCustom


2008/03/24 2008/04/Compal Electronics, Inc.

LA-5752P

File Name : Compal confidential

SPI ROM

SPI ROMBIOS page13

CAP SENSOR BD:LS-5752PVOLUME UPVOLUME DOWNMUTEAUDIO ENHANCEBUTTON & LED

ESATA HDD AND USB CONN

page38

HDMI

USB PORT X1(Left)page37

page32

37.5mm*37.5mm

25mm*25mm

USB(WWAN)

SATA HDD CONN

SATA ODD CONN

DDR3-1067(1.5V)

Card Reader/Audio Jack SB CONN

RTL8111DL-VB-GR

ICS9LRS3199AKLFT

6*PCI-E BUSpage28

PCI ExpressMini card Slot 1

CARD READER BD:LS-5753PRTS5138HP JACKMIC JACK

10/100/1G LAN

USB CONN X1(Right)page37

level shift ICpage25

ASM1442FDI *8100MHz 2.7GT/s

intelDDR3*4

6*SATA serial

UP TO 8G

NVidia N11M-GE1

Realtek 5138MS/MSpro/SD/SDpro/mmc/XD

Analog MIC_Intpage33

HP X 1+MIC_Ext X1

New Card X1page28

WWANpage28

SIM Card

PCI-E X16

page28

page28

page32

page37

POWER BD: LS-5754PPOWER BTNOVO BTPOWER MANAGE BT

(UMA/DIS)

BlueTooth CONN

CMOS Camera

Conexant CX20671

Audio Codec

2Channel Speaker

LPC BUS

CRT Connector

AZALIA

RJ45 CONN Int.KBD

ENE KB926D

Touch Pad

BANK 0, 1, 2, 3DDR3-SO-DIMM X2

DDR3-800(1.5V)Dual Channel

14*USB2.0

LVDSConnector

EC

page26

page27

page29

page30

page34

page35page36

page35

page37

page27

page33

page33

page 10,11

Clock Generatorpage12

page5~9

page 13~18

Arrandale

Socket-rPGA989

DMI *4

FCBGA 951

Intel Ibex Peak M

VRAM 64*16page20

page19~23

CONNpage24

PCI ExpressMini card Slot 2

ZZZ

15.6W_PCB_LA5752P

AA

B

B

C

C

D

D

E

E

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2 2

3 3

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Title


Date: Sheet o f




0.3

MB Notes ListB


2008/03/24 2008/04/Compal Electronics, Inc.

LA-5752P

O

X

S3

+3VS

X

X

+3VALW

+5VS

O

+CPU_CORE

OO

X

X X

+VCCP

powerplane

O

O

O

O

X

S5 S4/ Battery only

X X X

+B

State

+1.5VS

+1.5V

S5 S4/AC & Batterydon't exist

S5 S4/AC

+5VALW

S0

O

O

+VGA_CORE

+1.8VS

DDR3 Voltage Rails

+0.75VS

Cap sensor board

XXXX

NEWCARD PCH

X XX

X

N10x ThermalSensor

X

X

XSML0CLKSML0DATA

PCH X+3VS

X XSMB_EC_CK2

SOURCE

KB926

RAMM2

BATT KE926 SODIMM CLK CHIP

SMBUS Control Table

SMBCLKSMBDATA

PCH

WLANWWAN

SMB_EC_DA2

SMB_EC_CK1SMB_EC_DA1

N10x

X V

V VX

X

XXX

X

XX

XX

X

XX

X

XXX

X

XKB926

SML1CLKSML1DATA PCH XXX X X X X X

1 0 1 0 0 1 0 0A4

I2C / SMBUS ADDRESSING

1 0 1 0 0 0 0 0

D2

A0

CLOCK GENERATOR (EXT.)

HEX

DDR SO-DIMM 1

ADDRESSDDR SO-DIMM 0

1 1 0 1 0 0 1 0

DEVICE

5

BT

3G

6

4

CMOS

RIGHT SIDE

RIGHT SIDE0

DEVICEPORT

32

11NEW CARD

USB PORT LIST

WIRELESS8

10

1WLAN

NEW CARDCARD READER

3G

9

7

LANLEFT SIDE

6

4

DEVICEPORT

5

32

PCIE PORT LIST

1

1213

78

+1.05VS

XVX

+3VALW+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

+3VALW

V+3VALW

X X

+3VALWV

+3VS

+3VSV

+3VSV

V+3VS

LEFT SIDE10M@11M@

FOR 10M CHIPFOR 11M CHIP

100@ 10/100 LAN

BT@ Blue Tooth

ESATA@

UMA@DIS@

UMA only (Arranddale)

HU@HD@

SWITCHABLE or UMA onlySWITCHABLE or DIS only

SKUArrandale(dGPU)

Arrandale(iGPU)

Arrandale(iGPU+dGPU)

DIS@ / 100@ for EVT

UMA@ / 100@ for EVT

VGA@+HD@+HU@+HYBRID@

DIS only

UMA only

SWITCHABLE

DIS only (Arranddale)

HYBRID@ FOR SWITCHABLE

@ FUNCTION

45@

X76@

GIGA@UMA_HDMI@

HDMI@3G@

GIGA LANFOR UMA HDMI componentsFOR HDMI components3G(WWAN) function(X76 BOM)

(45 BOM)EVT NON-USE

VGA@ FOR NVIDIA PART

CMOS@ESATA functionCamera function

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C

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E

E

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3 3

4 4

Title


Date: Sheet o f




0.3

VGA Notes ListB


2009/03/16 2010/03/15Compal Electronics, Inc.

LA-5752P

(+3VS)

FBVDDQ

(+VGA_CORE)

(1.05VS)tNVVDD

PEX_VDD can ramp up any time

VDD33

NVVDD

The ramp time for any rail must be more than 40us

(1.5VS)

Performance Mode P0 TDP at Tj = 102 C* (DDR3)VGA and DDR3 Voltage Rails (N10x GPIO)

GPIO0

GPIO1

GPIO2

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

GPIO9

GPIO10

GPIO11

GPIO12

GPIO13

GPIO14

IN

OUT

OUT

OUT

OUT

OUT

OUT

I/O

OUT

OUT

I/O

IN

OUT

OUT

Panel Back-Light brightness(PWM capable) Panel Power Enable

Panel Back-Light On/Off (PWM)GPU VID0

GPU VID1

GPU VID2

Thermal Catastrophic Overtemp

Thermal Alert

Memory VREF switch

SLI raster sync

AC power detect pin

MEM_VID orPower supply control

N/A

-

H

H

H

L

L

Hot plug detect for IFP link C

GPIO I/O ACTIVE Function Description

N/A

-

-

-

L

-

-

- Power supply control

IN

OUT

IN

IN

IN

IN

IN

IN

GPIO15

GPIO16

GPIO17

GPIO18

GPIO19

GPIO20

GPIO21

GPIO22

GPIO23

-

-

-

-

-

-

-

-

Hot plug detect for IFP Link E

Programmable Fan Control

Hot plug detect for IFP link F

SLI swap ready signal

I/O

Products

GPU Mem NVCLK/MCLK NVVDD

FBVDDFBVDDQ PCI Express I/O and

PLLVDDI/O andPLLVDD

Other(3.3V)(1.05V)(1.8V)(1.05V)(1.5V)(1.5V) (GPU+Mem)(4) (1,5) (6)

(V) (A) (W) (A) (W) (A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)

N10P-GS

N10P-GE128bit1024MBDDR3

128bit1024MBDDR3

21.07

(W) (W)

20.97

128bitN10P-LP1024MBDDR3

15.48

6.67

6.73

6.44

(MHz)

TBD

TBD

TBD

TBD

TBD

TBD

18.25

19.17

13.95

17.34

17.25

11.86

2.06

2.03

1.90

3.09

3.05

2.85

4.09

3.99

6.14

5.99

850 75 0.14

63 0.07

55 0.18

4.09 6.14

0.89

0.85

0.88840

810

75 0.14

75 0.14

63 0.07

63 0.07

55 0.18

55 0.18

Products

GPU Mem NVCLK/MCLK NVVDD

FBVDDFBVDDQ PCI Express I/O and

PLLVDDI/O andPLLVDD

Other(3.3V)(1.05V)(1.8V)(1.05V)(1.5V)(1.5V) (GPU+Mem)(4) (1,5) (6)

(V) (A) (W) (A) (W)

Performance Mode P0 TDP at Tj = 102 C* (DDR3)

(A) (W) (W)(mA) (W) (W) (W)(mA) (mA) (mA)

N10M-GE64bit512MBDDR3

13.36

(W) (W)

14.29

8.28

2.93

3.10

2.91

(MHz)

TBD

TBD

TBD

TBD

TBD

TBD

11.89

11.53

6.60

10.70

11.53

5.61

0.66

0.70

0.62

0.99

1.05

0.93

2.16

2.20

3.24

3.3

792 75 0.14

63 0.07

100 0.33

2.28 3.42

0.83

0.82

0.86817

782

75 0.14

75 0.14

63 0.07

63 0.07

64bitN10M-GS512MBDDR3

64bitN10M-LP512MBDDR3

100 0.33

100 0.33

Hot plug detect for IFP Link D

PEX_VDD

(1.8VS)IFPAB_IOVDDtNV-IFPAB_IOVDD

tNV-FBVDDQ

Power Sequence

0 1

12

0.85V 12

GPIO6

P-State

0,10

GPU_VID1 GPU_VID0 VGA_CORE0.8V

1 0

00

0.9V

GPIO5 N10M-GS N10P-GS

1 1 1.0V (N10M-GS)0.925V (N10P-GS)

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

XDP_TRST#

XDP_TDO

COMP3

COMP2

COMP1

COMP0

TP_SKTOCC#

H_PECI_ISO

H_THERMTRIP#

H_P M_SYNC_R

VCC PWRGOOD_0

VDDPW RGOOD_R

PLT_RST#_R

SM_RCOMP0SM_RCOMP1SM_RCOMP2

PM_EXTTS#0

PM_EXTTS#1

PM_EXTTS#0

SM_RCOMP0

SM_RCOMP1

H_ CPURST#_R

SM_RCOMP2

PM_EXTTS#1

CLK_CPU_BCLK#

CLK_EXP#CLK_EXP

C LK_CPU_BCLK

XDP_PREQ#

XDP_TDI

XDP_TMSXDP_TCK

H _CATERR#

VCC PWRGOOD_1

XDP_BPM#3XDP_BPM#4

XDP_BPM#0

XDP_BPM#2

XDP_BPM#5

XDP_BPM#1

XDP_BPM#6XDP_BPM#7

H _PROCHOT#

XDP_DBRESET#

XDP_PREQ#

XDP_TMS

XDP_TDO

XDP_TDI

XDP_DBRESET#

XDP_TCK

XDP_TRST#

DRA M_PWRGD

DRAMRST_CNTRL_R

DRAMRST# SM_DRAMRST#

SM_DRAMRST#

VTT_POK

CLK_CPU_ITP#CLK_CPU_ITP

XDP_PRDY#

VCCP_POK

S3_0.75V_EN

VDDPW RGOOD_R

CLK_CPU_BCLK# CLK_CPU_BCLK

CLK_EXP# CLK_EXP

H_PECI

H_PROCHOT#

H_PM_SYNC

H_THERMTRIP#

PM_DRAM_PWRGD

BUF_PLT_RST#

H_CPUPW RGD

PM_EXTTS#1_R

VCCP_POK

DRAMRST_CNTRL_EC

DRAMRST#

DRAMRST_CNTRL_PCH

VCCP_POK

S3_0.75V_EN

+VCCP

+VCCP

+VCCP

+VCCP

+3VS

+3VALW

+1.5V

+5VALW

+1.5V

Title

Size Document Number R e v

Date: Sheet o f




0.3

Arrandale(1/5)-Thermal/XDPCus tom



LA-5752P

Layout Note:Please theseresistors near Processor

DDR3 Compensation Signals

Layout rule 10mil width tracelength < 0.5", spacing 20mil

pins unused byClarksfield on the rPGA989 Package

CHECK INTEL DOCUMENT #385422Debug Port Design Guide Rev1.3

5

EC GPIO CONTROL

6

PCH GPIO CONTROL

DDR3 CONNECTER

3

3

For Intel S3 Power Reduction.


FROM POWER VTTPOWER GOOD SIGNAL

R1870_0402_5%

1 2

R1371K_0402_5%@1 2

R569 68_0402_5%12

R138 51_0402_1%@1 2

R566 24.9_0402_1%1 2

R3011K_0402_1%

1

2

R281 0_0402_5%1 2

R61010K_0402_5%

1

2

R55749.9_0402_1% 1 2

R1900_0402_5%

1 2

C3380.01U_0402_16V7K

1

2

G

D S

Q272N7002_SOT23

2

1 3

R54849.9_0402_1% 1 2

R195

1.5K_0402_1%

1 2

R1910_0402_5%

1 2

G

D

SQ422N7002_SOT23

2

1

3

R186750_0402_1%

1

2

R567 100_0402_1%1 2

R282 0_0402_5%@1 2

R565 130_0402_1%1 2

T18 P AD

R564 0_0402_5%1 2

R1841K_0402_1%

12

R56020_0402_1% 1 2

R57 51_0402_1%@1 2

R1923K_0402_1%@

1

2

R556 51_0402_1%@1 2

R1931.1K_0402_1%@

1

2

R283 100K_0402_5%12

R13568_0402_5%12

U8

MC74VHC1G08DFT2G SC70 5P

B2

A1Y 4

P

5

G

3

R185

1.5K_0402_5%

1 2

R555 0_0402_5%12

R561 10K_0402_5%1 2

R16349.9_0402_1%12

R3000_0402_5%

@1 2

T17 P AD

R55820_0402_1% 1 2

R134 51_0402_5%1 2

R136 51_0402_1%@1 2

R562 10K_0402_5%1 2

T19 P AD

C

L

O

C

K

S

MISC

THERMAL

PWR MANAG

EMENT

D

D

R

3

M

I

S

C

J

T

A

G

&

B

P

M

JCPU1B

IC,AUB_CFD_rPGA,R1P0ME@

SM_RCOMP[1] AM1SM_RCOMP[2] AN1

SM_DRAMRST# F6

SM_RCOMP[0] AL1

BCLK# B16BCLK A16

BCLK_ITP# AT30BCLK_ITP AR30

PEG_CLK# D16PEG_CLK E16

DPLL_REF_SSCLK# A17DPLL_REF_SSCLK A18

CATERR#AK14

COMP3AT23

PECIAT15

PROCHOT#AN26

THERMTRIP#AK15

RESET_OBS#AP26

VCCPWRGOOD_1AN14

VCCPWRGOOD_0AN27

SM_DRAMPWROKAK13

VTTPWRGOODAM15

RSTIN#AL14

PM_EXT_TS#[0] AN15PM_EXT_TS#[1] AP15

PRDY# AT28PREQ# AP27

TCK AN28TMS AP28

TRST# AT27

TDI AT29TDO AR27

TDI_M AR29TDO_M AP29

DBR# AN25

BPM#[0] AJ22BPM#[1] AK22BPM#[2] AK24BPM#[3] AJ24BPM#[4] AJ25BPM#[5] AH22BPM#[6] AK23BPM#[7] AH23

COMP2AT24

PM_SYNCAL15

TAPPWRGOODAM26

COMP1G16

COMP0AT26

SKTOCC#AH24

R183560_0402_5%

1

2

R194

750_0402_1%

1

2

R563 0_0402_5%1 2

R133 51_0402_5%1 2

R1390_0402_5%

1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CFG0

CFG7

CFG4CFG3

CFG0

CFG3

EXP_ICOMPI

EXP_RBIAS

CFG4

H_R SVD17_RH_R SVD18_R

RS VD64_RRS VD65_R

FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7

FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7

FDI_LSY NC0

FDI_FSYN C0

FDI_LSY NC1

FDI_FSYN C1

FDI _INT

FDI_FSYN C0

FDI_LSY NC1

FDI_FSYN C1

FDI _INT

FDI_LSY NC0

PCIE_CRX_GTX_N15

PCIE_CRX_GTX_N10

PCIE_CRX_GTX_N14

PCIE_CRX_GTX_N0

PCIE_CRX_GTX_N8

PCIE_CRX_GTX_N6PCIE_CRX_GTX_N7


PCIE_CRX_GTX_N9


PCIE_CRX_GTX_N5


PCIE_CRX_GTX_N11

PCIE_CRX_GTX_P15PCIE_CRX_GTX_P14

PCIE_CRX_GTX_P8

PCIE_CRX_GTX_P4

PCIE_CRX_GTX_P0

PCIE_CRX_GTX_P10

PCIE_CRX_GTX_P7

PCIE_CRX_GTX_P9

PCIE_CRX_GTX_P13

PCIE_CRX_GTX_P6

PCIE_CRX_GTX_P3

PCIE_CRX_GTX_P12

PCIE_CRX_GTX_P5

PCIE_CRX_GTX_P11

PCIE_CRX_GTX_P1PCIE_CRX_GTX_P2

PCIE_CTX_GRX_C_P0

PCIE_CTX_GRX_C_P10

PCIE_CTX_GRX_C_P15PCIE_CTX_GRX_C_P14

PCIE_CTX_GRX_C_P8

PCIE_CTX_GRX_C_P6

PCIE_CTX_GRX_C_P4

PCIE_CTX_GRX_C_P13

PCIE_CTX_GRX_C_P7

PCIE_CTX_GRX_C_P1

PCIE_CTX_GRX_C_P9

PCIE_CTX_GRX_C_P12

PCIE_CTX_GRX_C_P3

PCIE_CTX_GRX_C_P5

PCIE_CTX_GRX_C_P2

PCIE_CTX_GRX_C_P11

PCIE_CTX_GRX_C_N14PCIE_CTX_GRX_C_N15

PCIE_CTX_GRX_C_N0

PCIE_CTX_GRX_C_N10

PCIE_CTX_GRX_C_N6

PCIE_CTX_GRX_C_N8

PCIE_CTX_GRX_C_N13

PCIE_CTX_GRX_C_N4

PCIE_CTX_GRX_C_N9

PCIE_CTX_GRX_C_N5

PCIE_CTX_GRX_C_N2

PCIE_CTX_GRX_C_N12

PCIE_CTX_GRX_C_N7

PCIE_CTX_GRX_C_N1

PCIE_CTX_GRX_C_N11

PCIE_CTX_GRX_C_N3

PCIE_CTX_GRX_N15

PCIE_CTX_GRX_N0

PCIE_CTX_GRX_N14

PCIE_CTX_GRX_N10

PCIE_CTX_GRX_N6

PCIE_CTX_GRX_N8

PCIE_CTX_GRX_N13

PCIE_CTX_GRX_N4

PCIE_CTX_GRX_N9

PCIE_CTX_GRX_N5

PCIE_CTX_GRX_N2

PCIE_CTX_GRX_N12

PCIE_CTX_GRX_N7

PCIE_CTX_GRX_N1

PCIE_CTX_GRX_N11

PCIE_CTX_GRX_N3

PCIE_CTX_GRX_P7

PCIE_CTX_GRX_P0

PCIE_CTX_GRX_P10

PCIE_CTX_GRX_P15PCIE_CTX_GRX_P14

PCIE_CTX_GRX_P3

PCIE_CTX_GRX_P5

PCIE_CTX_GRX_P8

PCIE_CTX_GRX_P6

PCIE_CTX_GRX_P4

PCIE_CTX_GRX_P13

PCIE_CTX_GRX_P2

PCIE_CTX_GRX_P11

PCIE_CTX_GRX_P1

PCIE_CTX_GRX_P9

PCIE_CTX_GRX_P12

DMI_CTX_PRX_P0

DMI_CRX_PTX_P0

DMI_CTX_PRX_N1

DMI_CRX_PTX_N1

DMI_CTX_PRX_P3

DMI_CRX_PTX_P3

DMI_CTX_PRX_P2

DMI_CTX_PRX_N0

DMI_CRX_PTX_N3

DMI_CRX_PTX_P2

DMI_CTX_PRX_N3

DMI_CTX_PRX_P1

DMI_CRX_PTX_N0

DMI_CRX_PTX_N2

DMI_CRX_PTX_P1

DMI_CTX_PRX_N2

PCIE_CTX_GRX_P[0..15]

PCIE_CTX_GRX_N[0..15]

PCIE_CRX_GTX_N[0..15]

PCIE_CRX_GTX_P[0..15]

FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4FDI_CTX_PRX_N5FDI_CTX_PRX_N6FDI_CTX_PRX_N7

FDI_CTX_PRX_P0FDI_CTX_PRX_P1FDI_CTX_PRX_P2FDI_CTX_PRX_P3FDI_CTX_PRX_P4FDI_CTX_PRX_P5FDI_CTX_PRX_P6FDI_CTX_PRX_P7

FDI_FSYNC0FDI_FSYNC1

FDI_ INT

FDI_LSY NC0FDI_LSY NC1

Title


Date: Sheet o f




0.3

Arrandale(2/5)-DMI/PEG/FDICus tom



LA-5752P

CFG Straps for PROCESSOR

0: Bifurcation enabledNot applicable for Clarksfield Processor

1: Single PEGCFG0

PCI-Express Configuration Select

0: Lane Numbers Reversed1: Normal Operation

CFG3

CFG3-PCI Express Static Lane Reversal

15 -> 0, 14 ->1, .....

Layout rule tr acelength < 0.5"

CFG[1:0] 11=1*16 PEG10=2*8 PEG

FOR ES1 SAMPLE ONLY

0: Enabled; An external Display Port

1: Disabled; No Physical Display Port

CFG4

CFG4-Display Port Presence

attached to Embedded Display Port

device is connected to the EmbeddedDisplay Port

VGA@

PCIE Lane Numbers ReversedCFG3-PCI Express Static Lane Reversal

C561 0.1U_0402_10V6K1 2

C565 0.1U_0402_10V6K1 2

R

E

S

E

R

V

E

D

JCPU1E


CFG[0]AM30CFG[1]AM28CFG[2]AP31CFG[3]AL32CFG[4]AL30CFG[5]AM31CFG[6]AN29CFG[7]AM32CFG[8]AK32CFG[9]AK31CFG[10]AK28CFG[11]AJ28CFG[12]AN30CFG[13]AN32CFG[14]AJ32CFG[15]AJ29CFG[16]AJ30CFG[17]AK30

RSVD34 AH25RSVD35 AK26

RSVD38 AJ26

RSVD_NCTF_42 AT3

RSVD39 AJ27

RSVD_NCTF_40 AP1RSVD_NCTF_41 AT2

RSVD_NCTF_43 AR1

RSVD_TP_86H16

RSVD45 AL28RSVD46 AL29RSVD47 AP30RSVD48 AP32RSVD49 AL27RSVD50 AT31RSVD51 AT32RSVD52 AP33RSVD53 AR33

RSVD_NCTF_54 AT33RSVD_NCTF_55 AT34RSVD_NCTF_56 AP35RSVD_NCTF_57 AR35

RSVD58 AR32

RSVD_NCTF_30C35RSVD_NCTF_31B35

RSVD_NCTF_28A34RSVD_NCTF_29A33

RSVD27J28RSVD26J29

RSVD16A19RSVD15B19

RSVD17A20RSVD18B20

RSVD20T9RSVD19U9

RSVD22AB9RSVD21AC9

RSVD_NCTF_23C1RSVD_NCTF_24A3

RSVD_TP_66 AA5RSVD_TP_67 AA4RSVD_TP_68 R8

RSVD_TP_71 AA2RSVD_TP_72 AA1RSVD_TP_73 R9

RSVD_TP_69 AD3

RSVD_TP_74 AG7

RSVD_TP_70 AD2

RSVD_TP_75 AE3

RSVD_TP_76 V4RSVD_TP_77 V5RSVD_TP_78 N2

RSVD_TP_81 W3RSVD_TP_82 W2RSVD_TP_83 N3

RSVD_TP_79 AD5

RSVD_TP_84 AE5

RSVD_TP_80 AD7

RSVD_TP_85 AD9

RSVD36 AL26RSVD_NCTF_37 AR2

RSVD1AP25RSVD2AL25RSVD3AL24RSVD4AL22RSVD5AJ33RSVD6AG9RSVD7M27RSVD8L28SA_DIMM_VREFJ17SB_DIMM_VREFH17RSVD11G25RSVD12G17RSVD13E31RSVD14E30

RSVD32 AJ13RSVD33 AJ12

RSVD_TP_59 E15RSVD_TP_60 F15

KEY A2RSVD62 D15RSVD63 C15RSVD64 AJ15RSVD65 AH15

VSS AP34

R61 3.01K_0402_1%1 2

C557 0.1U_0402_10V6K1 2

R545 750_0402_1%1 2

R532 1K_0402_5%DIS@1 2

C527 0.1U_0402_10V6K1 2

C547 0.1U_0402_10V6K1 2

R5470_0402_5%

@1 2

C562 0.1U_0402_10V6K1 2

R536 1K_0402_5%DIS@1 2

R58 3.01K_0402_1%@1 2

R533 1K_0402_5%DIS@1 2

C541 0.1U_0402_10V6K1 2

C536 0.1U_0402_10V6K1 2

C535 0.1U_0402_10V6K1 2

C560 0.1U_0402_10V6K1 2

C559 0.1U_0402_10V6K1 2

C533 0.1U_0402_10V6K1 2

R535 1K_0402_5%DIS@1 2

R1880_0402_5%

@ 12

R5460_0402_5%

@1 2

C543 0.1U_0402_10V6K1 2

R544 49.9_0402_1%1 2

C532 0.1U_0402_10V6K1 2

C542 0.1U_0402_10V6K1 2R1890_0402_5%

@ 12

C534 0.1U_0402_10V6K1 2

C540 0.1U_0402_10V6K1 2

C558 0.1U_0402_10V6K1 2

C546 0.1U_0402_10V6K1 2

C556 0.1U_0402_10V6K1 2

C530 0.1U_0402_10V6K1 2

C548 0.1U_0402_10V6K1 2

C555 0.1U_0402_10V6K1 2

R534 1K_0402_5%DIS@1 2

C544 0.1U_0402_10V6K1 2

C549 0.1U_0402_10V6K1 2

P

C

I

E

X

P

R

E

S

S

-

-

G

R

A

P

H

I

C

S

DMI

Intel(

R) FDI

JCPU1A


DMI_RX#[0]A24DMI_RX#[1]C23DMI_RX#[2]B22DMI_RX#[3]A21

DMI_RX[0]B24DMI_RX[1]D23DMI_RX[2]B23DMI_RX[3]A22

DMI_TX#[0]D24DMI_TX#[1]G24DMI_TX#[2]F23DMI_TX#[3]H23

DMI_TX[0]D25DMI_TX[1]F24

DMI_TX[3]G23DMI_TX[2]E23

FDI_TX#[0]E22FDI_TX#[1]D21FDI_TX#[2]D19FDI_TX#[3]D18FDI_TX#[4]G21FDI_TX#[5]E19FDI_TX#[6]F21FDI_TX#[7]G18

FDI_TX[0]D22FDI_TX[1]C21FDI_TX[2]D20FDI_TX[3]C18FDI_TX[4]G22FDI_TX[5]E20FDI_TX[6]F20FDI_TX[7]G19

FDI_FSYNC[0]F17FDI_FSYNC[1]E17

FDI_INTC17

FDI_LSYNC[0]F18FDI_LSYNC[1]D17

PEG_ICOMPI B26PEG_ICOMPO A26

PEG_RBIAS A25PEG_RCOMPO B27

PEG_RX#[0] K35PEG_RX#[1] J34PEG_RX#[2] J33PEG_RX#[3] G35PEG_RX#[4] G32PEG_RX#[5] F34PEG_RX#[6] F31PEG_RX#[7] D35PEG_RX#[8] E33PEG_RX#[9] C33

PEG_RX#[10] D32PEG_RX#[11] B32PEG_RX#[12] C31PEG_RX#[13] B28PEG_RX#[14] B30PEG_RX#[15] A31

PEG_RX[0] J35PEG_RX[1] H34PEG_RX[2] H33PEG_RX[3] F35PEG_RX[4] G33PEG_RX[5] E34PEG_RX[6] F32PEG_RX[7] D34PEG_RX[8] F33PEG_RX[9] B33

PEG_RX[10] D31PEG_RX[11] A32PEG_RX[12] C30PEG_RX[13] A28PEG_RX[14] B29PEG_RX[15] A30

PEG_TX#[0] L33PEG_TX#[1] M35PEG_TX#[2] M33PEG_TX#[3] M30PEG_TX#[4] L31PEG_TX#[5] K32PEG_TX#[6] M29PEG_TX#[7] J31PEG_TX#[8] K29PEG_TX#[9] H30

PEG_TX#[10] H29PEG_TX#[11] F29PEG_TX#[12] E28PEG_TX#[13] D29PEG_TX#[14] D27PEG_TX#[15] C26

PEG_TX[0] L34PEG_TX[1] M34PEG_TX[2] M32PEG_TX[3] L30PEG_TX[4] M31PEG_TX[5] K31PEG_TX[6] M28PEG_TX[7] H31PEG_TX[8] K28PEG_TX[9] G30

PEG_TX[10] G29PEG_TX[11] F28PEG_TX[12] E27PEG_TX[13] D28PEG_TX[14] C27PEG_TX[15] C25 C550 0.1U_0402_10V6K1 2

C563 0.1U_0402_10V6K1 2

C545 0.1U_0402_10V6K1 2

C564 0.1U_0402_10V6K1 2

R 593.01K_0402_1%

@ 1 2

R60 3.01K_0402_1%

@1 2

C528 0.1U_0402_10V6K1 2

C529 0.1U_0402_10V6K1 2

C531 0.1U_0402_10V6K1 2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_ A_D63DDR_ A_D62

DDR_A _D8

DDR_A _D3DDR_A _D4

DDR_A _D7

DDR_A _D5DDR_A _D6

DDR_ A_D59DDR_ A_D58DDR_ A_D57DDR_ A_D56



DDR_ A_D34

DDR_ A_D39


DDR_ A_D35


DDR_ A_D38




DDR_A _D2DDR_A _D1DDR_A _D0


DDR_ A_D51

DDR_ A_D48



DDR_ A_D31




DDR_ A_D30

DDR_A _D9





DDR_ A_D16

DDR_ A_D21

DDR_ A_D17

DDR_ A_D22

DDR_ A_D18

DDR_ A_D23

DD R_A_DQS#7

DD R_A_DQS#0

DD R_A_DQS#2

DD R_A_DQS#5

DD R_A_DQS#3

DD R_A_DQS#1

DD R_A_DQS#4

DD R_A_DQS#6

DD R_A_DM7

DD R_A_DM2

DD R_A_DM5DD R_A_DM4

DD R_A_DM1

DD R_A_DM6

DD R_A_DM3

DD R_A_DM0

DDR_A_MA5

DDR_A_MA0

DDR_A_MA9

DDR_A_MA14

DDR_A_MA11

DDR_A_MA4

DDR_A_MA7DDR_A_MA6

DDR_A_MA10

DDR_A_MA1

DDR_A_MA12

DDR_A_MA2

DDR_A_MA13

DDR_A_MA3

DDR_A_MA8

DDR_B _D3

DDR_ B_D51

DDR_ B_D56

DDR_B _D9

DDR_ B_D31

DDR_ B_D39

DDR_ B_D49

DDR_ B_D54

DDR_ B_D57

DDR_ B_D24

DDR_ B_D10

DDR_B _D1

DDR_B _D6

DDR_ B_D44DDR_ B_D43

DDR_ B_D20

DDR_ B_D42

DDR_ B_D55

DDR_ B_D15

DDR_ B_D34

DDR_ B_D23

DDR_ B_D60

DDR_ B_D33

DDR_ B_D11

DDR_ B_D41

DDR_ B_D45

DDR_B _D0

DDR_ B_D48

DDR_ B_D50

DDR_ B_D38

DDR_ B_D21

DDR_ B_D32

DDR_ B_D22

DDR_B _D4

DDR_ B_D14

DDR_ B_D27

DDR_ B_D25

DDR_ B_D62

DDR_ B_D59

DDR_ B_D19

DDR_ B_D52

DDR_B _D7

DDR_B _D5

DDR_ B_D17

DDR_ B_D58

DDR_ B_D30

DDR_ B_D26

DDR_ B_D36

DDR_ B_D13

DDR_ B_D53

DDR_ B_D18

DDR_B _D8

DDR_ B_D35

DDR_ B_D46

DDR_ B_D12

DDR_ B_D47

DDR_ B_D28

DDR_B _D2

DDR_ B_D37

DDR_ B_D63

DDR_ B_D40

DDR_ B_D29

DDR_ B_D61

DDR_ B_D16

DDR_A_MA15

DDR _A_DQS0

DDR _A_DQS2DDR _A_DQS1

DDR _A_DQS6DDR _A_DQS5DDR _A_DQS4DDR _A_DQS3

DDR _A_DQS7

DDR_B_MA0

DDR_B_MA9

DDR_B_MA7

DDR_B_MA13

DDR_B_MA2

DDR_B_MA4

DDR_B_MA11

DDR_B_MA3

DDR_B_MA5DDR_B_MA6

DDR_B_MA10

DDR_B_MA8

DDR_B_MA1

DDR_B_MA12

DDR_B_MA14DDR_B_MA15

DD R_B_DQS#1

DD R_B_DQS#7

DD R_B_DQS#5DD R_B_DQS#4

DD R_B_DQS#0

DD R_B_DQS#3

DD R_B_DQS#6

DD R_B_DQS#2

DDR _B_DQS7

DDR _B_DQS0DDR _B_DQS1

DDR _B_DQS5DDR _B_DQS4DDR _B_DQS3DDR _B_DQS2

DDR _B_DQS6

DD R_B_DM3

DD R_B_DM1

DD R_B_DM5

DD R_B_DM0

DD R_B_DM6DD R_B_DM7

DD R_B_DM4

DD R_B_DM2

DDR_A_MA[0..15]

DDR_A_DM[0..7]

DDR_A _D[0..63]

DDR_A_BS0DDR_A_BS1DDR_A_BS2

DDR_A_WE#DDR_A_RAS#DDR_A_CAS#

DDR_B_MA[0..15]

DDR_B_DM[0..7]

DDR_B_BS0DDR_B_BS1DDR_B_BS2

DDR_B_WE#DDR_B_RAS#DDR_B_CAS#

DDR_B _D[0..63]M _CLK_DDR0 M_CLK_DDR#0 DDR_CKE0_DIMMA

M _CLK_DDR1 M_CLK_DDR#1 DDR_CKE1_DIMMA

DDR_CS0_DIMMA# DDR_CS1_DIMMA#

M_ODT0 M_ODT1

M_ODT2 M_ODT3

DDR_CS2_DIMMB# DDR_CS3_DIMMB#

DDR_B_DQS[0..7]

DDR_A_DQS#[0..7]

DDR_A_DQS[0..7]

DDR_B_DQS#[0..7]

M _CLK_DDR2 M _CLK_DDR#2 DDR_CKE2_DIMMB

M _CLK_DDR3 M _CLK_DDR#3 DDR_CKE3_DIMMB

Title


Date: Sheet o f




0.3

Arrandale(3/5)-DDR IIICustom



LA-5752P

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

A

JCPU1C


SA_BS[0]AC3SA_BS[1]AB2SA_BS[2]U7

SA_CAS#AE1SA_RAS#AB3SA_WE#AE9

SA_CK[0] AA6

SA_CK[1] Y6

SA_CK#[0] AA7

SA_CK#[1] Y5

SA_CKE[0] P7

SA_CKE[1] P6

SA_CS#[0] AE2SA_CS#[1] AE8

SA_ODT[0] AD8SA_ODT[1] AF9

SA_DM[0] B9SA_DM[1] D7SA_DM[2] H7SA_DM[3] M7SA_DM[4] AG6SA_DM[5] AM7SA_DM[6] AN10SA_DM[7] AN13

SA_DQS[0] C8

SA_DQS#[0] C9

SA_DQS[1] F9

SA_DQS#[1] F8

SA_DQS[2] H9

SA_DQS#[2] J9

SA_DQS[3] M9

SA_DQS#[3] N9

SA_DQS[4] AH8

SA_DQS#[4] AH7

SA_DQS[5] AK10

SA_DQS#[5] AK9

SA_DQS[6] AN11

SA_DQS#[6] AP11

SA_DQS[7] AR13

SA_DQS#[7] AT13

SA_MA[0] Y3SA_MA[1] W1SA_MA[2] AA8SA_MA[3] AA3SA_MA[4] V1SA_MA[5] AA9SA_MA[6] V8SA_MA[7] T1SA_MA[8] Y9SA_MA[9] U6

SA_MA[10] AD4SA_MA[11] T2SA_MA[12] U3SA_MA[13] AG8SA_MA[14] T3SA_MA[15] V9

SA_DQ[0]A10SA_DQ[1]C10SA_DQ[2]C7SA_DQ[3]A7SA_DQ[4]B10SA_DQ[5]D10SA_DQ[6]E10SA_DQ[7]A8SA_DQ[8]D8SA_DQ[9]F10SA_DQ[10]E6SA_DQ[11]F7SA_DQ[12]E9SA_DQ[13]B7SA_DQ[14]E7SA_DQ[15]C6SA_DQ[16]H10SA_DQ[17]G8SA_DQ[18]K7SA_DQ[19]J8SA_DQ[20]G7SA_DQ[21]G10SA_DQ[22]J7SA_DQ[23]J10SA_DQ[24]L7SA_DQ[25]M6SA_DQ[26]M8SA_DQ[27]L9SA_DQ[28]L6SA_DQ[29]K8SA_DQ[30]N8SA_DQ[31]P9SA_DQ[32]AH5SA_DQ[33]AF5SA_DQ[34]AK6SA_DQ[35]AK7SA_DQ[36]AF6SA_DQ[37]AG5SA_DQ[38]AJ7SA_DQ[39]AJ6SA_DQ[40]AJ10SA_DQ[41]AJ9SA_DQ[42]AL10SA_DQ[43]AK12SA_DQ[44]AK8SA_DQ[45]AL7SA_DQ[46]AK11SA_DQ[47]AL8SA_DQ[48]AN8SA_DQ[49]AM10SA_DQ[50]AR11SA_DQ[51]AL11SA_DQ[52]AM9SA_DQ[53]AN9SA_DQ[54]AT11SA_DQ[55]AP12SA_DQ[56]AM12SA_DQ[57]AN12SA_DQ[58]AM13SA_DQ[59]AT14SA_DQ[60]AT12SA_DQ[61]AL13SA_DQ[62]AR14SA_DQ[63]AP14

D

D

R

S

Y

S

T

E

M

M

E

M

O

R

Y

-

B

JCPU1D


SB_BS[0]AB1SB_BS[1]W5SB_BS[2]R7

SB_CAS#AC5SB_RAS#Y7SB_WE#AC6

SB_CK[0] W8

SB_CK[1] V7

SB_CK#[0] W9

SB_CK#[1] V6

SB_CKE[0] M3

SB_CKE[1] M2

SB_CS#[0] AB8SB_CS#[1] AD6

SB_ODT[0] AC7SB_ODT[1] AD1

SB_DM[0] D4SB_DM[1] E1SB_DM[2] H3SB_DM[3] K1SB_DM[4] AH1SB_DM[5] AL2SB_DM[6] AR4SB_DM[7] AT8

SB_DQS[4] AG2

SB_DQS#[4] AH2

SB_DQS[5] AL5

SB_DQS#[5] AL4

SB_DQS[6] AP5

SB_DQS#[6] AR5

SB_DQS[7] AR7

SB_DQS#[7] AR8

SB_DQS[0] C5

SB_DQS#[0] D5

SB_DQS[1] E3

SB_DQS#[1] F4

SB_DQS[2] H4

SB_DQS#[2] J4

SB_DQS[3] M5

SB_DQS#[3] L4

SB_MA[0] U5SB_MA[1] V2SB_MA[2] T5SB_MA[3] V3SB_MA[4] R1SB_MA[5] T8SB_MA[6] R2SB_MA[7] R6SB_MA[8] R4SB_MA[9] R5

SB_MA[10] AB5SB_MA[11] P3SB_MA[12] R3SB_MA[13] AF7SB_MA[14] P5SB_MA[15] N1

SB_DQ[0]B5SB_DQ[1]A5SB_DQ[2]C3SB_DQ[3]B3SB_DQ[4]E4SB_DQ[5]A6SB_DQ[6]A4SB_DQ[7]C4SB_DQ[8]D1SB_DQ[9]D2SB_DQ[10]F2SB_DQ[11]F1SB_DQ[12]C2SB_DQ[13]F5SB_DQ[14]F3SB_DQ[15]G4SB_DQ[16]H6SB_DQ[17]G2SB_DQ[18]J6SB_DQ[19]J3SB_DQ[20]G1SB_DQ[21]G5SB_DQ[22]J2SB_DQ[23]J1SB_DQ[24]J5SB_DQ[25]K2SB_DQ[26]L3SB_DQ[27]M1SB_DQ[28]K5SB_DQ[29]K4SB_DQ[30]M4SB_DQ[31]N5SB_DQ[32]AF3SB_DQ[33]AG1SB_DQ[34]AJ3SB_DQ[35]AK1SB_DQ[36]AG4SB_DQ[37]AG3SB_DQ[38]AJ4SB_DQ[39]AH4SB_DQ[40]AK3SB_DQ[41]AK4SB_DQ[42]AM6SB_DQ[43]AN2SB_DQ[44]AK5SB_DQ[45]AK2SB_DQ[46]AM4SB_DQ[47]AM3SB_DQ[48]AP3SB_DQ[49]AN5SB_DQ[50]AT4SB_DQ[51]AN6SB_DQ[52]AN4SB_DQ[53]AN3SB_DQ[54]AT5SB_DQ[55]AT6SB_DQ[56]AN7SB_DQ[57]AP6SB_DQ[58]AP8SB_DQ[59]AT9SB_DQ[60]AT7SB_DQ[61]AP9SB_DQ[62]AR10SB_DQ[63]AT10

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VCCSENSEVSSSENSE

VCCSENSE

VSSSENSE

H_V ID1

H_V ID4H_V ID3

H_V ID5

VCC_SENSE

H_V ID2

PM_DPRSLPVR_R

H_V ID0

VSS_SENSE

H_V ID6

VTT_SELECT

GFX_IMON

GFX_IMON

GFX_VR_EN

GFX_VR_EN

SUSP

1.5V_DDR3_GATE

PSI#

H_VID[0..6]

P ROC_DPRSLPVR

IMVP_IMON

VTT_SENSE

V CCSENSE VSSSENSE

VTT_SELECT

GFXVR_IMON GFXVR_DPRSLPVR GFXVR_EN

GFXVR_VID_0 GFXVR_VID_1

GFXVR_VID_3 GFXVR_VID_2

GFXVR_VID_4 GFXVR_VID_5 GFXVR_VID_6

VSS_AXG_SENSE VCC_AXG_SENSE

SUSP

+CP U_CORE

+CPU_CORE

+VCCP

+VCCP

+VCCP

+1.5V_DDR3

+VCCP

+1.8VS

+VCCP

+VCCP

+VCCP

+GFX_CORE

+1.5V

+1.5V_DDR3

+1.5V +1.5V_DDR3

+5VALW

+1.5V_DDR3

Title


Date: Sheet o f




0.3

Arrandale(4/5)-PWRCus tom



LA-5752P

CPU

H_VTTVID1 = Low, 1.1V FOR Clarksfiel

H_VTTVID1 = High, 1.05V FOR Auburndale

48A 15A18A

3A

0.6A

Close to CPU

BUT A SMALL AMOUNT OF POWER

(~15MW) MAYBE WASTED DESIGN GUIDE REV1.1

AS NO CONNECT

2

1

1



Modify for cost revew.09/16/2009

P

O

W

E

R

G

R

A

P

H

I

C

S

V

I

D

s

GRAPHICS

D

D

R

3

-

1

.

5

V

R

A

I

L

S

FDI

PEG & DMI

S

E

N

S

E

L

I

N

E

S

1

.

1

V

1

.

8

V

JCPU1G


GFX_VID[0] AM22GFX_VID[1] AP22GFX_VID[2] AN22GFX_VID[3] AP23GFX_VID[4] AM23GFX_VID[5] AP24GFX_VID[6] AN24

GFX_VR_EN AR25GFX_DPRSLPVR AT25

GFX_IMON AM24

VAXG_SENSE AR22VSSAXG_SENSE AT22

VAXG1AT21VAXG2AT19VAXG3AT18VAXG4AT16VAXG5AR21VAXG6AR19VAXG7AR18VAXG8AR16VAXG9AP21VAXG10AP19VAXG11AP18VAXG12AP16VAXG13AN21VAXG14AN19VAXG15AN18VAXG16AN16VAXG17AM21VAXG18AM19VAXG19AM18VAXG20AM16VAXG21AL21VAXG22AL19VAXG23AL18VAXG24AL16VAXG25AK21VAXG26AK19VAXG27AK18VAXG28AK16VAXG29AJ21VAXG30AJ19VAXG31AJ18VAXG32AJ16VAXG33AH21VAXG34AH19VAXG35AH18VAXG36AH16

VTT1_45J24VTT1_46J23VTT1_47H25

VTT1_48K26VTT1_49J27VTT1_50J26VTT1_51J25VTT1_52H27VTT1_53G28VTT1_54G27VTT1_55G26VTT1_56F26VTT1_57E26VTT1_58E25

VDDQ1 AJ1VDDQ2 AF1VDDQ3 AE7VDDQ4 AE4VDDQ5 AC1VDDQ6 AB7VDDQ7 AB4VDDQ8 Y1VDDQ9 W7

VDDQ10 W4VDDQ11 U1VDDQ12 T7VDDQ13 T4VDDQ14 P1VDDQ15 N7VDDQ16 N4VDDQ17 L1VDDQ18 H1

VTT0_59 P10VTT0_60 N10VTT0_61 L10VTT0_62 K10

VCCPLL1 L26VCCPLL2 L27VCCPLL3 M26

VTT1_63 J22VTT1_64 J20VTT1_65 J18VTT1_66 H21VTT1_67 H20VTT1_68 H19

R56 0_0402_5%1 2

C160

22U_0805_6.3V6M

@

1

2

C273

10U_0805

_10V4K

1

2

G

D

S

Q232N7002_SOT23

2

1

3

C258

22U_0805

_6.3V6M

1

2

G

D

S

Q19BSS138_NL_SOT23-3

2

1

3

C215

10U_0805

_10V4K

1

2

C216

10U_0805

_10V4K

@1

2C

21810U

_0805_10V4K

1

2

+

C554

330U_D

2_2

.5VY_R

9M

1

2

C207

10U_0805

_10V4K

1

2

C289

0.1U

_0402_10V6K

1

2

C252

22U_0805

_6.3V6M

1

2

C182

10U_0805

_10V4K

1

2

C257

1U_0603

_10V4Z

1

2

T15P AD@

C272

10U_0805

_10V4K

1

2

C208

10U_0805

_10V4K

1

2

+

C268

220U_B

2_2

.5VM_R35

@

1

2

C240

10U_0805

_10V4K

1

2

R2670_0402_5%

@

1

2

R26820K_0402_5%

C213

10U_0805

_10V4K

1

2

C167

1U_0603

_10V4Z

1

2

C189

22U_0805_6.3V6M

UMA@

1

2

C191

22U_0805_6.3V6M

@

1

2

C270

10U_0805

_10V4K

@1

2

C168

2.2U

_0603_6

.3V4Z

1

2

R5590_0402_5%DIS@

1

2

R141 0_0402_5%UMA@

1 2

C210

10U_0805

_10V4K

1

2

R551 100_0402_1%1 2

R608 1K_0402_5%1 2

C209

10U_0805

_10V4K

1

2

U11

SI4800BDY-T1-E3_SO8

S 1S 2S 3G 4

D8D7D6D5

R1404.7K_0402_5%

UMA@

1 2

C219

10U_0805

_10V4K

1

2

C274

10U_0805

_10V4K

1

2

C253

1U_0603

_10V4Z

1

2C

1491U

_0603_10V4Z

1

2

C256

1U_0603

_10V4Z1

2

C198

10U_0805

_10V4K

1

2

C255

1U_0603

_10V4Z

1

2

C211

10U_0805

_10V4K

1

2

C169

10U_0805

_10V4K

1

2

C269

0.1U

_0402_10V6K

@

1

2

C591

10U_0805_6.3V6M

UMA@

1

2

C201

10U_0805

_10V4K

1

2

C217

10U_0805

_10V4K

1

2

C288

0.1U

_0402_10V6K

1

2

C212

10U_0805

_10V4K

1

2

C271

10U_0805

_10V4K

1

2

R552 100_0402_1%1 2

C170

4.7U

_0603_6

.3V6K

1

2

C181

10U_0805

_10V4K

1

2

R553 0_0402_5%1 2

R5540_0402_5%

1 2

J2

JUMP_43X118

@

1 122

R1321K_0402_5%

DIS@

12

C254

1U_0603

_10V4Z

1

2

C286

0.1U

_0402_10V6K

1

2

C161

22U_0805_6.3V6M

@

1

2

C159

22U_0805_6.3V6M

UMA@

1

2

C190

22U_0805_6.3V6M

@

1

2

C214

10U_0805

_10V4K

1

2

C199

10U_0805

_10V4K

1

2

C200

10U_0805

_10V4K

1

2

J3

JUMP_43X118

@

1 122

C287

0.1U

_0402_10V6K

1

2

P

O

W

E

R

CPU CORE SUPPLY

1

.

1

V

R

A

I

L

P

O

W

E

R

S

E

N

S

E

L

I

N

E

S

C

P

U

V

I

D

S

JCPU1F


ISENSE AN35

VTT_SENSE B15

PSI# AN33

VID[0] AK35VID[1] AK33VID[2] AK34VID[3] AL35VID[4] AL33VID[5] AM33VID[6] AM35

PROC_DPRSLPVR AM34

VTT_SELECT G15

VCC_SENSE AJ34

VSS_SENSE_VTT A15

VCC1AG35VCC2AG34VCC3AG33VCC4AG32VCC5AG31VCC6AG30VCC7AG29VCC8AG28VCC9AG27VCC10AG26VCC11AF35VCC12AF34VCC13AF33VCC14AF32VCC15AF31VCC16AF30VCC17AF29VCC18AF28VCC19AF27VCC20AF26VCC21AD35VCC22AD34VCC23AD33VCC24AD32VCC25AD31VCC26AD30VCC27AD29VCC28AD28VCC29AD27VCC30AD26VCC31AC35VCC32AC34VCC33AC33VCC34AC32VCC35AC31VCC36AC30VCC37AC29VCC38AC28VCC39AC27VCC40AC26VCC41AA35VCC42AA34VCC43AA33VCC44AA32VCC45AA31VCC46AA30VCC47AA29VCC48AA28VCC49AA27VCC50AA26VCC51Y35VCC52Y34VCC53Y33VCC54Y32VCC55Y31VCC56Y30VCC57Y29VCC58Y28VCC59Y27VCC60Y26VCC61V35VCC62V34VCC63V33VCC64V32VCC65V31VCC66V30VCC67V29VCC68V28VCC69V27VCC70V26VCC71U35VCC72U34VCC73U33VCC74U32VCC75U31VCC76U30VCC77U29VCC78U28VCC79U27VCC80U26VCC81R35VCC82R34VCC83R33VCC84R32VCC85R31VCC86R30VCC87R29VCC88R28VCC89R27VCC90R26VCC91P35VCC92P34VCC93P33VCC94P32VCC95P31VCC96P30VCC97P29VCC98P28VCC99P27VCC100P26

VTT0_33 AF10VTT0_34 AE10VTT0_35 AC10VTT0_36 AB10VTT0_37 Y10VTT0_38 W10VTT0_39 U10VTT0_40 T10VTT0_41 J12VTT0_42 J11

VTT0_1 AH14VTT0_2 AH12VTT0_3 AH11VTT0_4 AH10VTT0_5 J14VTT0_6 J13VTT0_7 H14VTT0_8 H12VTT0_9 G14

VTT0_10 G13VTT0_11 G12VTT0_12 G11VTT0_13 F14VTT0_14 F13VTT0_15 F12VTT0_16 F11VTT0_17 E14VTT0_18 E12VTT0_19 D14VTT0_20 D13VTT0_21 D12VTT0_22 D11VTT0_23 C14VTT0_24 C13VTT0_25 C12VTT0_26 C11VTT0_27 B14VTT0_28 B12VTT0_29 A14VTT0_30 A13VTT0_31 A12VTT0_32 A11

VSS_SENSE AJ35

VTT0_43 J16VTT0_44 J15

C3250.1U_0603_25V7K

1

2

C592

10U_0805_6.3V6M

UMA@

1

2

R233220_0402_5%

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

VSS_NCTF7_R

VSS_NCTF5_R

VSS_NCTF3_RVSS_NCTF2_RVSS_NCTF1_R

VSS_NCTF6_R

VSS_NCTF4_R

+CPU_CORE

Title


Date: Sheet o f




0.3

Arrandale(5/5)-GND/BypassCus tom



LA-5752P

470uF 4.5mohm

Under cavity

between Inductor and socket

CPU CORE

Inside cavity

C162

10U_0805

_6.3V6M

1

2

C148

10U_0805

_6.3V6M

1

2

C584

22U_0805

_6.3V6M

1

2

C129

22U_0805

_6.3V6M

1

2

C163

10U_0805

_6.3V6M

1

2

C88

10U_0805

_6.3V6M

1

2

C90

22U_0805

_6.3V6M

1

2

C192

10U_0805

_6.3V6M

1

2

C579

22U_0805

_6.3V6M

1

2

C578

22U_0805

_6.3V6M

1

2

C91

22U_0805

_6.3V6M

1

2

+

C92

470U_D

2T_2VM

1

2 3

C194

10U_0805

_6.3V6M

1

2

C193

10U_0805

_6.3V6M

1

2

+

C76

470U_D

2T_2VM

1

2 3

C165

10U_0805

_6.3V6M

1

2

C583

22U_0805

_6.3V6M

1

2

C585

22U_0805

_6.3V6M

1

2

VSS

N

C

T

F

JCPU1I


VSS161K27VSS162K9VSS163K6VSS164K3VSS165J32VSS166J30VSS167J21VSS168J19VSS169H35VSS170H32VSS171H28VSS172H26VSS173H24VSS174H22VSS175H18VSS176H15VSS177H13VSS178H11VSS179H8VSS180H5VSS181H2VSS182G34VSS183G31VSS184G20VSS185G9VSS186G6VSS187G3VSS188F30VSS189F27VSS190F25VSS191F22VSS192F19VSS193F16VSS194E35VSS195E32VSS196E29VSS197E24VSS198E21VSS199E18VSS200E13VSS201E11VSS202E8VSS203E5VSS204E2VSS205D33VSS206D30VSS207D26VSS208D9VSS209D6VSS210D3VSS211C34VSS212C32VSS213C29VSS214C28VSS215C24VSS216C22VSS217C20VSS218C19VSS219C16VSS220B31VSS221B25VSS222B21VSS223B18VSS224B17VSS225B13VSS226B11VSS227B8VSS228B6VSS229B4VSS230A29

VSS_NCTF1 AT35VSS_NCTF2 AT1VSS_NCTF3 AR34VSS_NCTF4 B34VSS_NCTF5 B2VSS_NCTF6 B1VSS_NCTF7 A35

VSS231A27VSS232A23VSS233A9

VSS

JCPU1H


VSS1AT20VSS2AT17VSS3AR31VSS4AR28VSS5AR26VSS6AR24VSS7AR23VSS8AR20VSS9AR17VSS10AR15VSS11AR12VSS12AR9VSS13AR6VSS14AR3VSS15AP20VSS16AP17VSS17AP13VSS18AP10VSS19AP7VSS20AP4VSS21AP2VSS22AN34VSS23AN31VSS24AN23VSS25AN20VSS26AN17VSS27AM29VSS28AM27VSS29AM25VSS30AM20VSS31AM17VSS32AM14VSS33AM11VSS34AM8VSS35AM5VSS36AM2VSS37AL34VSS38AL31VSS39AL23VSS40AL20VSS41AL17VSS42AL12VSS43AL9VSS44AL6VSS45AL3VSS46AK29VSS47AK27VSS48AK25VSS49AK20VSS50AK17VSS51AJ31VSS52AJ23VSS53AJ20VSS54AJ17VSS55AJ14VSS56AJ11VSS57AJ8VSS58AJ5VSS59AJ2VSS60AH35VSS61AH34VSS62AH33VSS63AH32VSS64AH31VSS65AH30VSS66AH29VSS67AH28VSS68AH27VSS69AH26VSS70AH20VSS71AH17VSS72AH13VSS73AH9VSS74AH6VSS75AH3VSS76AG10VSS77AF8VSS78AF4VSS79AF2VSS80AE35

VSS81 AE34VSS82 AE33VSS83 AE32VSS84 AE31VSS85 AE30VSS86 AE29VSS87 AE28VSS88 AE27VSS89 AE26VSS90 AE6VSS91 AD10VSS92 AC8VSS93 AC4VSS94 AC2VSS95 AB35VSS96 AB34VSS97 AB33VSS98 AB32VSS99 AB31

VSS100 AB30VSS101 AB29VSS102 AB28VSS103 AB27VSS104 AB26VSS105 AB6VSS106 AA10VSS107 Y8VSS108 Y4VSS109 Y2VSS110 W35VSS111 W34VSS112 W33VSS113 W32VSS114 W31VSS115 W30VSS116 W29VSS117 W28VSS118 W27VSS119 W26VSS120 W6VSS121 V10VSS122 U8VSS123 U4VSS124 U2VSS125 T35VSS126 T34VSS127 T33VSS128 T32VSS129 T31VSS130 T30VSS131 T29VSS132 T28VSS133 T27VSS134 T26VSS135 T6VSS136 R10VSS137 P8VSS138 P4VSS139 P2VSS140 N35VSS141 N34VSS142 N33VSS143 N32VSS144 N31VSS145 N30VSS146 N29VSS147 N28VSS148 N27VSS149 N26VSS150 N6VSS151 M10VSS152 L35VSS153 L32VSS154 L29VSS155 L8VSS156 L5VSS157 L2VSS158 K34VSS159 K33VSS160 K30

C580

22U_0805

_6.3V6M

1

2

C89

10U_0805

_6.3V6M

1

2

C166

10U_0805

_6.3V6M

1

2

C196

10U_0805

_6.3V6M

1

2

C577

22U_0805

_6.3V6M

1

2

C574

22U_0805

_6.3V6M

1

2

C197

10U_0805

_6.3V6M

1

2C

57122U

_0805_6

.3V6M

1

2

C568

22U_0805

_6.3V6M

1

2

C147

10U_0805

_6.3V6M

1

2

C573

22U_0805

_6.3V6M

1

2

+

C75

470U_D

2T_2VM

1

2 3

+

C164

470U_D

2T_2VM

1

2 3

C195

10U_0805

_6.3V6M

1

2

C87

22U_0805

_6.3V6M

1

2

C180

10U_0805

_6.3V6M

1

2

C179

10U_0805

_6.3V6M

1

2

C572

22U_0805

_6.3V6M

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_ A_D31

DDR_ A_D12

DDR_CKE0_DIMMA

DDR_ A_D59

DDR_A _D6

DDR_A_MA3

SMB_CLK_S3

DDR_CS1_DIMMA#

DDR_ A_D39

D DR_A_BS1

DDR _A_DQS0

DDR _A_WE#

DDR_A_MA7

DDR_A_MA0

DD R_A_DM2

DD R_A_DM1

DDR _A_DQS7

DDR_A _D0

DDR_ A_D57

DDR_ A_D46

DDR_ A_D28

DD R_A_DM0

DDR_ A_D19

DD R_A_DQS#5

DDR_ A_D51

DDR_A _D4

DD R_A_DM4

DDR_ A_D30

DDR _A_DQS2

DDR_ A_D44

DD R_A_RAS#

DDR_ A_D33

DDR_ A_D58

DD R_A_DM5

DDR _A_DQS3

DDR_A_MA8

DDR_CS0_DIMMA#

DDR_ A_D10

DDR_A_MA6

DDR_ A_D27

DDR_A _D3

DRAMRST#

DDR_A_MA10

DD R_A_DQS#7

DDR_A _D1

DD R_A_DQS#6

DDR_ A_D40

DDR_A_MA9

DDR_ A_D16

DDR_ A_D29

DD R_A_DQS#4

DDR_ A_D52

DD R_A_DM3

DDR _A_DQS5

DDR_ A_D54

DDR_ A_D49

D DR_A_BS2

DDR_ A_D45

DDR_A _D9

DD R_A_DM7

DDR_A _D7

DDR_A_MA1

DDR_ A_D13

DDR_ A_D20

DDR_ A_D60

D DR_A_BS0

DD R_A_CAS# M_ODT0

DDR_ A_D37

DDR_A_MA5

DD R_A_DQS#1

DDR_A_MA14

DDR_ A_D55

DDR_A_MA4

DDR_ A_D21

DDR_ A_D62

DDR_ A_D24

DDR_ A_D15

DDR_ A_D23

DDR_ A_D56

DDR_ A_D53

DDR_ A_D47

DDR_ A_D18

M_ODT1

DDR_ A_D43

DDR_ A_D34

M _CLK_DDR1M _CLK_DDR#1

DDR_ A_D48

SMB_DATA_S3

DD R_A_DQS#2

DDR_ A_D11

DDR_ A_D38


DD R_A_DQS#3

DDR_ A_D32

DDR_A _D8

DDR _A_DQS1

DDR_A_MA13

DDR_A_MA11

DDR_ A_D50

DDR_ A_D61

DDR_A_MA2

DDR_ A_D41

DDR_ A_D17

DDR_ A_D36

DDR_ A_D26

DDR_ A_D63

DDR_A _D2

DDR_A _D5

DDR_ A_D22

DDR_ A_D25

DDR _A_DQS6

DDR_ A_D35

DDR_ A_D14

DDR_A_MA12

DD R_A_DQS#0

DDR _A_DQS4

DD R_A_DM6

DDR_ A_D42

DDR_CKE1_DIMMA

PM_EXTTS#1_R

+VREF_DQ_DIMMA

DDR_A_MA15

DDR_A_DQS#[0..7]

DDR_A _D[0..63]DDR_A_DM[0..7]DDR_A_DQS[0..7]

DDR_A_MA[0..15]

DDR_CKE0_DIMMA

DDR_A_BS2

M _CLK_DDR0M_CLK_DDR#0

DDR_A_BS0

DDR_A_WE#DDR_A_CAS#

DDR_CS1_DIMMA#

DDR_CKE1_DIMMA

DDR_A_BS1 DDR_A_RAS#

DDR_CS0_DIMMA# M_ODT0

M _CLK_DDR1 M_CLK_DDR#1

M_ODT1

DRAMRST#

PM_EXTTS#1_R SMB_DATA_S3 SMB_CLK_S3

+0.75VS

+3VS

+1.5V +1.5V+VREF_DQ_DIMMA

+1.5V

+VREF_DQ_DIMMA

+1.5V

+0.75VS

+VREF_DQ_DIMMA

Title


Date: Sheet o f




0.3

DDRIII-SODIMM SLOT1Custom



LA-5752P

DDR3 SO-DIMM A

Layout Note:Place near DIMM

3A@

3A@3A@

3A@ 1.5V

1.5V1.5V

1.5V

0.

0.0.

0. [email protected]

[email protected]@0.75V

[email protected]

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs) 6*0603 10uf (PER CONNECTOR)

VDDQ(1.5V) =

3*0805 10uf VTT(0.75V) =

4*0402 1uf

1*0402 0.1uf VREF =

1*0402 2.2uf VDDSPD (3.3V)=

1*0402 0.1uf 1*0402 2.2uf

For Arranale only +VREF_DQ_DIMMA supply from a external 1.5V voltage divide circuit. 07/17/2009

C608

2.2U

_0603_6

.3V4Z

1

2

C310

10U_0603

_6.3V6M

1

2

+ C569220U_B2_2.5VM_R35

1

2

C317

0.1U

_0402_10V6K

1

2

C581

10U_0603

_6.3V6M

1

2

C316

0.1U

_0402_10V6K

1

2

C314

0.1U

_0402_10V6K

1

2

C617

0.1U

_0402_10V6K

1

2

C570

10U_0603

_6.3V6M

1

2

C347

2.2U

_0603_6

.3V4Z

1

2

C309

10U_0603

_6.3V6M

1

2

R2971K_0402_1%

1

2

C586

10U_0603

_6.3V6M

1

2

C315

0.1U

_0402_10V6K

1

2

C606

1U_0603

_10V4Z

1

2

C588

10U_0603

_6.3V6M

@

1

2

R3051K_0402_1%

1

2

C355

2.2U

_0603_6

.3V4Z

1

2

R571

10K_0402

_5%

1

2

C607

1U_0603

_10V4Z

1

2

C301

1U_0603

_10V4Z

1

2

C303

0.1U

_0402_10V6K

1

2

C300

1U_0603

_10V4Z

1

2

R57010K_0402_5%

1 2

C605

1U_0603

_10V4Z

1

2

C308

10U_0603

_6.3V6M

1

2

JDIMM1

FOX_AS0A626-U4SN-7F ME@

VREF_DQ1 VSS1 2VSS23 DQ4 4DQ05 DQ5 6DQ17 VSS3 8VSS49 DQS#0 10DM011 DQS0 12VSS513 VSS6 14DQ215 DQ6 16DQ317 DQ7 18VSS719 VSS8 20DQ821 DQ12 22DQ923 DQ13 24VSS925 VSS10 26DQS#127 DM1 28DQS129 RESET# 30VSS1131 VSS12 32DQ1033 DQ14 34DQ1135 DQ15 36VSS1337 VSS14 38DQ1639 DQ20 40DQ1741 DQ21 42VSS1543 VSS16 44DQS#245 DM2 46DQS247 VSS17 48VSS1849 DQ22 50DQ1851 DQ23 52DQ1953 VSS19 54VSS2055 DQ28 56DQ2457 DQ29 58DQ2559 VSS21 60VSS2261 DQS#3 62DM363 DQS3 64VSS2365 VSS24 66DQ2667 DQ30 68DQ2769 DQ31 70VSS2571 VSS26 72

A12/BC#83 A11 84A985 A7 86VDD587 VDD6 88A889 A6 90

CKE073 CKE1 74VDD175 VDD2 76NC177 A15 78BA279 A14 80VDD381 VDD4 82

A591 A4 92VDD793 VDD8 94A395 A2 96A197 A0 98VDD999 VDD10 100CK0101 CK1 102CK0#103 CK1# 104VDD11105 VDD12 106A10/AP107 BA1 108BA0109 RAS# 110VDD13111 VDD14 112WE#113 S0# 114CAS#115 ODT0 116VDD15117 VDD16 118A13119 ODT1 120S1#121 NC2 122VDD17123 VDD18 124NCTEST125 VREF_CA 126VSS27127 VSS28 128DQ32129 DQ36 130DQ33131 DQ37 132VSS29133 VSS30 134DQS#4135 DM4 136DQS4137 VSS31 138VSS32139 DQ38 140DQ34141 DQ39 142DQ35143 VSS33 144VSS34145 DQ44 146DQ40147 DQ45 148DQ41149 VSS35 150VSS36151 DQS#5 152DM5153 DQS5 154VSS37155 VSS38 156DQ42157 DQ46 158DQ43159 DQ47 160VSS39161 VSS40 162DQ48163 DQ52 164DQ49165 DQ53 166VSS41167 VSS42 168DQS#6169 DM6 170DQS6171 VSS43 172VSS44173 DQ54 174DQ50175 DQ55 176DQ51177 VSS45 178VSS46179 DQ60 180DQ56181 DQ61 182DQ57183 VSS47 184VSS48185 DQS#7 186DM7187 DQS7 188VSS49189 VSS50 190DQ58191 DQ62 192DQ59193 DQ63 194VSS51195 VSS52 196SA0197 EVENT# 198VDDSPD199 SDA 200SA1201 SCL 202VTT1203 VTT2 204

G1205 G2 206

C346

0.1U

_0402_10V6K

1

2

C589

10U_0603

_6.3V6M

@

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

DDR_ B_D26

DDR_B _D2

DDR_B _D5

DDR_ B_D22

DDR_ B_D25

DDR_ B_D14

DD R_B_DQS#0

DDR_ B_D31

DDR_ B_D12

DDR_B _D6

DDR _B_DQS0

DD R_B_DM2

DD R_B_DM1

+VREF_DQ_DIMMB

DDR_B _D0

DDR_ B_D28

DD R_B_DM0

DDR_ B_D19

DDR_B _D4

DDR_ B_D30

DDR _B_DQS2

DDR _B_DQS3

DDR_ B_D10

DDR_ B_D27

DDR_B _D3

DRAMRST#

DDR_B _D1

DDR_ B_D16

DDR_ B_D29

DD R_B_DM3

DDR_B _D9

DDR_B _D7

DDR_ B_D13

DDR_ B_D20

DD R_B_DQS#1

DDR_ B_D21

DDR_ B_D24

DDR_ B_D15

DDR_ B_D23DDR_ B_D18

DD R_B_DQS#2

DDR_ B_D11

DD R_B_DQS#3

DDR_B _D8

DDR _B_DQS1

DDR_ B_D17

DDR_ B_D36

DDR_ B_D63

DDR_B_MA15

DD R_B_DM6

DDR_CKE3_DIMMB

DDR_ B_D39

D DR_B_BS1

DDR_B_MA7

DDR_B_MA0

DDR _B_DQS7

DDR_ B_D46

DD R_B_DQS#5

DD R_B_DM4

DDR_ B_D44

DD R_B_RAS#

DDR_CS2_DIMMB#

DDR_B_MA6

DD R_B_DQS#7

DDR_ B_D52

DDR _B_DQS5

DDR_ B_D54

DDR_ B_D45

DDR_ B_D60

M_ODT2

DDR_ B_D37

DDR_B_MA14

DDR_ B_D55

DDR_B_MA4

DDR_ B_D62

DDR_ B_D53

DDR_ B_D47

M_ODT3


DDR_ B_D38

DDR_B_MA11

DDR_ B_D61

DDR_B_MA2

SMB_CLK_S3SMB_DATA_S3PM_EXTTS#1_R

DDR _B_DQS6

DDR_ B_D35

DDR_B_MA12

DDR _B_DQS4

DDR_ B_D42

DDR_CKE2_DIMMB

DDR_ B_D59

DDR_B_MA3

DDR_CS3_DIMMB#

DDR _B_WE#

DDR_ B_D57

DDR_ B_D51

DDR_ B_D33

DDR_ B_D58

DD R_B_DM5

DDR_B_MA8

DDR_B_MA10

DD R_B_DQS#6

DDR_ B_D40

DDR_B_MA9

DD R_B_DQS#4

DDR_ B_D49

D DR_B_BS2

DD R_B_DM7

DDR_B_MA1

D DR_B_BS0

DD R_B_CAS#

DDR_B_MA5

DDR_ B_D56

DDR_ B_D43

DDR_ B_D34

DDR_ B_D48


DDR_ B_D32

DDR_B_MA13

DDR_ B_D50

DDR_ B_D41

DRAMRST#

DDR_B_DQS#[0..7]DDR_B _D[0..63]DDR_B_DM[0..7]DDR_B_DQS[0..7]DDR_B_MA[0..15]

DDR_CKE3_DIMMB

M_CLK_DDR3 M _CLK_DDR#3

DDR_B_BS1 DDR_B_RAS#

DDR_CS2_DIMMB# M_ODT2

M_ODT3

SMB_DATA_S3 SMB_CLK_S3

PM_EXTTS#1_R

DDR_B_BS2

DDR_CKE2_DIMMB


DDR_B_BS0

DDR_B_WE#DDR_B_CAS#

DDR_CS3_DIMMB#

+0.75VS+3VS

+1.5V +1.5V+VREF_DQ_DIMMB

+1.5V

+0.75VS

+VREF_DQ_DIMMB

+1.5V

+VREF_DQ_DIMMB

Title


Date: Sheet o f




0.3

DDRIII-SODIMM SLOT2



LA-5752P



3A@

3A@3A@

3A@ 1.5V

1.5V1.5V

1.5V

0.

0.0.

0. [email protected]

[email protected]@0.75V

[email protected]

1*0402 0.1uf 1*0402 2.2uf

3*330uf / 12m ohm (TOTAL FOR 2 SO-DIMMs) 6*0603 10uf (PER CONNECTOR)

3*0805 10uf VTT(0.75V) =

4*0402 1uf

1*0402 0.1uf

VDDQ(1.5V) =

1*0402 2.2uf VDDSPD (3.3V)=

For Arranale only +VREF_DQ_DIMMBsupply from a external 1.5V voltage divide circuit. 07/17/2009

C587

10U_0603

_6.3V6M

@

1

2

C383

2.2U

_0603_6

.3V4Z

1

2

R3411K_0402_1%

1

2

R57210K_0402_5%

1 2

C382

2.2U

_0603_6

.3V4Z

1

2

C595

1U_0603

_10V4Z

1

2

C596

10U_0603

_6.3V6M

1

2

C299

1U_0603

_10V4Z

1

2

C304

0.1U

_0402_10V6K

1

2

C384

0.1U

_0402_10V6K

1

2

R3401K_0402_1%

1

2

C313

10U_0603

_6.3V6M

1

2

C305

0.1U

_0402_10V6K

1

2

R573 10K_0402_5%1 2

JDIMM2

TYCO_2-2013297-2~DME@

VREF_DQ1VSS3DQ05DQ17VSS9DM011VSS13DQ215DQ317VSS19DQ821DQ923VSS25DQS1#27DQS129VSS31DQ1033DQ1135VSS37DQ1639

VSS 2DQ4 4DQ5 6VSS 8

DQS0# 10DQS0 12

VSS 14DQ6 16DQ7 18VSS 20

DQ12 22DQ13 24VSS 26DM1 28

RESET# 30VSS 32

DQ14 34DQ15 36VSS 38

DQ20 40DQ1741VSS43DQS2#45DQS247VSS49DQ1851DQ1953VSS55DQ2457DQ2559VSS61DM363VSS65DQ2667DQ2769VSS71

CKE073VDD75NC77BA279VDD81A12/BC#83A985VDD87A889A591VDD93A395A197VDD99CK0101CK0#103VDD105A10/AP107BA0109VDD111WE#113CAS#115VDD117A13119S1#121VDD123TEST125VSS127DQ32129DQ33131VSS133DQS4#135DQS4137VSS139DQ34141DQ35143VSS145DQ40147DQ41149VSS151DM5153VSS155DQ42157DQ43159VSS161DQ48163DQ49165VSS167DQS6#169DQS6171VSS173DQ50175DQ51177VSS179DQ56181DQ57183VSS185DM7187VSS189DQ58191DQ59193VSS195SA0197VDDSPD199

DQ21 42VSS 44DM2 46VSS 48

DQ22 50DQ23 52VSS 54

DQ28 56DQ29 58VSS 60

DQS3# 62DQS3 64

VSS 66DQ30 68DQ31 70VSS 72

CKE1 74VDD 76A15 78A14 80

VDD 82A11 84A7 86

VDD 88A6 90A4 92

VDD 94A2 96A0 98

VDD 100CK1 102

CK1# 104VDD 106BA1 108

RAS# 110VDD 112S0# 114

ODT0 116VDD 118

ODT1 120NC 122

VDD 124VREF_CA 126

VSS 128DQ36 130DQ37 132VSS 134DM4 136VSS 138

DQ38 140DQ39 142VSS 144

DQ44 146DQ45 148VSS 150

DQS5# 152DQS5 154

VSS 156DQ46 158DQ47 160VSS 162

DQ52 164DQ53 166VSS 168DM6 170VSS 172

DQ54 174DQ55 176VSS 178

DQ60 180DQ61 182VSS 184

DQS7# 186DQS7 188

VSS 190DQ62 192DQ63 194VSS 196

EVENT# 198SDA 200

SA1201VTT203

GND1205

SCL 202VTT 204

GND1 206

C306

0.1U

_0402_10V6K

1

2

C575

10U_0603

_6.3V6M

1

2

C618

2.2U

_0603_6

.3V4Z

1

2

C616

0.1U

_0402_10V6K

1

2

C307

0.1U

_0402_10V6K

1

2

C385

0.1U

_0402_10V6K

1

2

C598

1U_0603

_10V4Z

1

2

C582

10U_0603

_6.3V6M

@

1

2

C590

10U_0603

_6.3V6M

1

2C

576

10U_0603

_6.3V6M

1

2

C311

10U_0603

_6.3V6M

1

2

C312

10U_0603

_6.3V6M

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

CLK_XTAL_IN

CLK_XTAL_OUT

CLK_XTAL_OUT

SMB_CLK_S3SMB_DATA_S3

CLK_XTAL_IN

CK_P WRGD

CPU_STOP#

CLK_14M_PCH

R_CLK_BUF_BCLK# CLK_BUF_BCLK#

CLK_48M_CR_R

R EF_0/CPU_SEL

CLK_14M_PCHCLK_BUF_DOT96#CLK_BUF_DOT96

L_CLK_BUF_DOT96#L_CLK_BUF_DOT96

CLK_DMI#CLK_DMI

L_CLK_DMI#L_CLK_DMI

CLK_48M_CR_R

CK_P WRGD

R EF_0/CPU_SEL

R EF_0/CPU_SEL

R _CLK_BUF_BCLK CLK_BUF_BCLK

VDD_3V3_1V5

VDD_3V3_1V5

VDD_3V3_1V5

VDD_3V3_1V5

CL K_BUF_CKSSCDCL K_BUF_CKSSCD#

CLK _BUF_CKSSCD_RCL K_BUF_CKSSCD#_R CLK_BUF_BCLK#

CLK_BUF_BCLK

CLK_14M_PCH

CLK_EN#

CLK_DMICLK_DMI#

CLK_BUF_DOT96CLK_BUF_DOT96#

SMB_DATA_S3 SMB_CLK_S3

CLK_48M_CR

CLK _BUF_CKSSCDCLK_BUF_CKSSCD#

+3VS +3VS_CK505

+1.05VS_CK505+1.05VS

+3VS_CK505 +1.05VS_CK505+3VS_CK505 +1.05VS_CK505

+1.05VS

+3VS_CK505

+3VS_CK505

VDD_3V3_1V5+3VS_CK505

+1.5VS

Title


Date: Sheet o f




0.3

CLOCK GENERATOR



LA-5752P

1 PCS CAP(0.1u) BY 1 INPUT PIN

ICS9LVS3199AKLFT MLF 32P CLK GEN (SA00003HR00)1 PCS CAP(0.1u) BY 1 INPUT PIN

1

CPU_1PIN 30 CPU_0

0 133MHz(Default) 133MHz

100MHz 100MHz

CLOSE U27

CLK GEN TO PCH1. CLK_DMI

EMI Capacitor

2. CLK_BUF_BCLK3. CLK_BUF_CKSSCD4. CLK_BUF_DOT965. CLK_14M_PCH

PIN8 IS GND FOR ICS3197 PIN8 IS 48MHz FOR ICS3199

CLK GEN TO VGA1. 27M_CLK

1. 27M_CLK_SS

RTM890N-631-GRT QFN 32P CLK GEN (SA00003HQ00)

Reserve for Low Power CLK GEN.RTM890N-632SLG8LV597VTR

1 PCS CAP(0.1u) BY 1 INPUT PIN

unstuff 09.09.08

R2780_0603_5%@

1 2

C366

0.1U

_0402_10V6K

1

2

C34822P_0402_50V8J

1

2

C36422P_0402_50V8J

12

C34922P_0402_50V8J

1

2

C331

10U_0805

_10V4K

1

2

R3080_0402_5%

1 2

Y1

1

4

.

3

1

8

1

8

M

H

Z

_

1

6

P

F

_

D

S

X

8

4

0

G

A

12

C367

0.1U

_0402_10V6K

1

2

U14

SLG8SP587VTR_QFN32_5X5

CPU_1# 19

SATA10

CKPWRGD/PD# 25

DOT_96#4

CPU_0# 22

XTAL_OUT 27VSS_REF 26

VDD_CPU 24CPU_0 23

27MHZ_SS7XTAL_IN 28

27MHZ6

USB_488

CPU_1 20VSS_CPU 21

VDD_CPU_IO 18

VDD_USB_481VSS_48M2

REF_0/CPU_SEL 30SDA 31SCL 32

VDD_275

VSS_27M9

SATA#11VSS_SRC12SRC_113SRC_1#14VDD_SRC_IO15

VDD_SRC 17

VDD_REF 29DOT_963

CPU_STOP#16

TGND33

R2790_0603_5%1 2

R2770_0603_5%1 2

R276 0_0402_5%1 2

R298

10K_0402_5%

1 2

C333

10U_0805

_10V4K

1

2

C343

0.1U

_0402_10V6K

1

2

G

D

SQ252N7002_SOT23-3

2

1

3

R2690_0603_5%1 2

C342

0.1U

_0402_10V6K

1

2

C330

0.1U

_0402_10V6K

1

2

C332

0.1U

_0402_10V6K

1

2

C334

0.1U

_0402_10V6K

1

2

R3060_0402_5%

1 2

C350

0.1U

_0402_10V6K

1

2

R31533_0402_1%

12

R319 0_0402_5%1 2

R3230_0402_5%@

12

C36510P_0402_50V8J@

12

R307 0_0402_5%1 2

R324 0_0402_5%1 2

C344

10U_0805

_10V4K

1

2

R32233_0402_1%@

1 2

R275 0_0402_5%1 2

R29910K_0402_5%

1 2

R316 10K_0402_5%1 2

R317 10K_0402_5%@1 2

R318 0_0402_5%1 2

C336

10U_0805

_10V4K

1

2

C335

0.1U

_0402_10V6K

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PCH_RTCX1

PCH_RTCX2

PCH_RTCX1PCH_RTCX2

PCH_RTCRST#

PCH_SRTCRST#

S M_INTRUDER#

PCH_INTVRMENS M_INTRUDER#

HDA_RST#

P CH_SPKR

HDA_ SDIN1

SE RIRQ

GPIO23

SATAICOMPPCH_JTAG_RST#

PCH_JTAG_TMS

PCH_JTAG_TDI

PCH_JTAG_TDO

BITCLK

HDA_SYNC

HDA_ SDIN0

H DA_SDOUT

PCH_INTVRMEN

SATA_ITX_DRX_P0SATA_ITX_DRX_N0

SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0

SATA_ITX_C_DRX_N0SATA_ITX_C_DRX_P0


SATA_ITX_DRX_P1SATA_ITX_DRX_N1

SATA_DTX_C_IRX_N1SATA_DTX_C_IRX_P1


PCH_JTAG_TCK

SPI_WP#

SPI_HOLD#

S PI_CLK_PCH_R

SPI_SB_CS0#

SPI_SI

SPI_SO_R

PCH_JTAG_TMS PCH_JTAG_RST#PCH_JTAG_TDO PCH_JTAG_TDI

GPIO19

GPIO21

GPIO19

GPIO21

P CH_SPKR

GPIO13

SPI_WP#SPI_HOLD#

SPI_SB_CS0#SPI_SO_R SPI_SO_L

SPI_SISPI_CLK_PCH

SPI_CLK_PCH

SPI_CLK_PCH

SATA_ITX_DRX_N4_CONN

SATA_DTX_C_IRX_N4

SATA_ITX_DRX_P4_CONN

SATA_DTX_C_IRX_P4

PCH_JTAG_TCK

HDA_SDIN1

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

LPC_FRAME#

SE RIRQ

HDD_LED#

HDA_BITCLK_CODEC

HDA_SYNC_CODEC

HDA_RST_CODEC#

HDA _SDOUT_CODEC

SATA_DTX_C_IRX_N0 SATA_DTX_C_IRX_P0 SATA_ITX_DRX_N0 SATA_ITX_DRX_P0

SATA_ITX_DRX_N1 SATA_ITX_DRX_P1

SATA_DTX_C_IRX_N1 SATA_DTX_C_IRX_P1

P CH_SPKR

ME_FLASH

SATA_DTX_C_IRX_P4 SATA_ITX_DRX_N4_CONN

SATA_DTX_C_IRX_N4

SATA_ITX_DRX_P4_CONN

+RTCVCC

+RTCVCC

+1.05VS

+3VS

+3VS

+3VS

+3VALW+3VALW +3VALW +3VALW +3VS

+RTCVCC

+RTCBATT

+3VS

+3VALW

+3VS

Title


Date: Sheet o f




0.3

IBEX-M(1/6)-HDA/JTAG/SATACustom



LA-5752P

H Integr ated VRM enableL Integra ted VRM disable*

GPIO33 = GPO , internal pull-up,should not be pulled low

GPIO19 = GPI,3.3V,CORE

GPIO21 = GPI,3.3V,CORE

GPIO23 = NATIVE,3.3V,CORE

GPIO13 = GPI,3.3V,SUS

flash ME core of strap pin pull down

*

No Install

No Install

No Install

100ohm 100ohm

100ohm 100ohm

10Kohm 10Kohm

20Kohm 20Kohm

100ohm

200ohm

200ohm

200ohm

200ohm

200ohm

51ohm

No Install

R580

No Install

No InstallPCH_JTAG_TMS

PCH JTAGPre-Production

PCH JTAGProduction

RefDesPCH Pin

No InstallPCH_JTAG_TDO

ES1 MPES2

PCH_JTAG_TDI

PCH_JTAG_TCK

PCH_JTAG_RST#

R584

R583

R591

R590

No InstallR587

R586

R595

R594

No Install

No Install

51ohm 51ohm

(2009,07,07)

4M SPI ROM FOR HM55 (ME code & BIOS code)SA00003K800

HDD

ODD

E-SATA

(2009,05,04)

FOR INTEL DPDG REV1.6 (MAY 2009)

R11810K_0402_5%

@12

R453 10K_0402_5%1 2

R144

100_0603_1%

1 2

T7 P AD

R 623.3K_0402_5%

1 2

R

T

C

I

H

D

A

S

A

T

A

L

P

C

S

P

I

J

T

A

G

U7A

IBEXPEAK-M_FCBGA1071

RTCX1B13RTCX2D13

INTVRMENA14INTRUDER#A16

HDA_BCLKA30

HDA_SYNCD29

HDA_RST#C30

HDA_SDIN0G30

HDA_SDIN1F30

HDA_SDIN2E32

HDA_SDOB29

SATALED# T3

FWH0 / LAD0 D33FWH1 / LAD1 B33FWH2 / LAD2 C32FWH3 / LAD3 A32

LDRQ1# / GPIO23 F34

FWH4 / LFRAME# C34

LDRQ0# A34

RTCRST#C14

HDA_SDIN3F32

HDA_DOCK_EN# / GPIO33H32

HDA_DOCK_RST# / GPIO13J30

SRTCRST#D17

SATA0RXN AK7SATA0RXP AK6SATA0TXN AK11SATA0TXP AK9

SATA1RXN AH6SATA1RXP AH5SATA1TXN AH9SATA1TXP AH8

SATA2RXN AF11SATA2RXP AF9SATA2TXN AF7SATA2TXP AF6

SATA3RXN AH3SATA3RXP AH1SATA3TXN AF3SATA3TXP AF1

SATA4RXN AD9SATA4RXP AD8SATA4TXN AD6SATA4TXP AD5

SATA5RXN AD3SATA5RXP AD1SATA5TXN AB3SATA5TXP AB1

SATAICOMPI AF15

SPI_CLKBA2

SPI_CS0#AV3

SPI_CS1#AY3

SPI_MOSIAY1

SPI_MISOAV1SATA0GP / GPIO21 Y9

SATA1GP / GPIO19 V1

JTAG_TCKM3

JTAG_TMSK3

JTAG_TDIK1

JTAG_TDOJ2

TRST#J4

SERIRQ AB9

SPKRP1

SATAICOMPO AF16

R115100_0402_1%

@12

U3

S IC FL 16M EN25F16-100HIP SOP 8P

CS#1SO2WP#3GND4

VCC 8HOLD# 7

SCLK 6SI 5

R74200_0402_5%

@12

C171

1

5

P

_

0

4

0

2

_

5

0

V

8

J

1

2

C460

0.1U_0402_16V4Z

1 2

R48210K_0402_5%

1

2

R10033_0402_5%

@

1

2

R167 33_0402_5%1 2

R114 51_0402_5%1 2

R420330K_0402_5%

1 2

CLRP3SHORT PADS

1

2

R44710K_0402_5%

1

2

CLRP2SHORT PADS

1

2

R500

37.4_0402_1%1 2

C1400.01U_0402_16V7K 12

C64812P_0402_50V8J@

1 2

C64712P_0402_50V8J@ 1 2

C18315P_0402_50V8J

1

2

R47910K_0402_5%12

X132.768KHZ_12.5PF_9H03200413

O

S

C

4

O

S

C

1

N

C

3

N

C

2

R169 33_0402_5%1 2

C4280.01U_0402_16V7K 12

R1023.3K_0402_5%

1 2

R99

0_0402_5%

1 2

C2021U_0603_10V4Z

1

2

R422 20K_0402_1%1 2

C4270.01U_0402_16V7K 12

R7520K_0402_5%

@

1

2

R116100_0402_1%

@12

R117100_0402_1%

@12

R452 1K_0402_5%@1 2

CLRP1SHORT PADS

1

2

C1420.01U_0402_16V7K ESATA@12

R168 33_0402_5%1 2

R154 10M_0402_5%1 2

R73200_0402_5%

@12

R166 33_0402_5%1 2

R425 0_0402_5%1 2

C1430.01U_0402_16V7K ESATA@12

C1410.01U_0402_16V7K 12

R424 10K_0402_5%@

1 2

R10315_0402_5%1 2

R409 1K_0402_5%@1 2

C441

0.1U_0402_16V4Z1

2

R72200_0402_5%

@12

R10115_0402_5%

12

C13822P_0402_50V8J

@

R4211M_0402_5%

1 2

R419 20K_0402_1%1 2

C1841U_0603_10V4Z

1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

C LK_PCIE_WLAN1_RC LK_PCIE_WLAN1#_R

PCIE_PTX_DRX_P3PCIE_PTX_DRX_N3PCIE_PRX_DTX_P3PCIE_PRX_DTX_N3


LID_OUT#

SMBCLK

SMBDATA

GPIO60

SML0CLK

SML0DATA

GPIO74

SMB_EC_CK2_REC_SMB_CK2

SMB_EC_DA2_REC_SMB_DA2

EC_SMB_CK2

EC_SMB_DA2

SML1CLK

SML1DATA

LID_OUT#

PEG_CLKREQ#

SMBCLK

SMBDATA

SML1CLK

SML1DATA

SML0CLK

SML0DATA

GPIO74

SMB_CLK_S3

SMB_DATA_S3

SMB_CLK_S3

SMB_DATA_S3

XTAL25_IN

CLK_14M_PCH

GPIO60

SMBCLK

SMBDATA SMB_DATA_S3

SMB_CLK_S3

SMB_EC_CK2_R

SMB_EC_DA2_R

EC_SMB_CK2

EC_SMB_DA2

PEG_CLKREQ#

C LK_PCI_FB

CLK_PCIE_LAN_RCLK_PCIE_LAN#_R

CLKOUT_DP_NCLKOUT_DP_P

CLK_14M_PCHC LK_PCI_FB

CLK_PCIE_VGA#CLK_PCIE_VGA

CLK_PCIE_VGA#_RCLK_PCIE_VGA_R

CLK_EXP#_RCLK_EXP_R

PCIE_PTX_DRX_P4

PCIE_PRX_DTX_N4PCIE_PRX_DTX_P4PCIE_PTX_DRX_N4

CLK_ PCIE_CARD_PCH#_RCLK_P CIE_CARD_PCH_R

CL K_PCI_DB_R

XTAL25_IN

XTAL25_OUT

XTAL25_OUTCLK_PCIE_EXP_PCH_RCLK_PCIE_EXP_PCH#_R

CLKREQ_EXP#


WLAN_CLKREQ1#

CLK_PCIE_WLAN1CLK_PCIE_WLAN1#

PCIE_PTX_C_DRX_P2

PCIE_PRX_DTX_N2

PCIE_PTX_C_DRX_N2PCIE_PRX_DTX_P2

PCIE_PTX_C_DRX_P3

PCIE_PRX_DTX_N3


SMB_EC_DA2_R

SMB_EC_CK2_R

EC_SMB_CK2

EC_SMB_DA2

CLK_14M_PCH

SMB_CLK_S3

SMB_DATA_S3

CLK_DMI# CLK_DMI

CLK_BUF_BCLK CLK_BUF_BCLK#

CLK_BUF_DOT96 CLK_BUF_DOT96#

CLK _BUF_CKSSCD CLK_BUF_CKSSCD#

SMBCLK

SMBDATA

CLK_PCI_FB

EC_LID_OUT#

CLKREQ_LAN#

CLK_PCIE_LANCLK_PCIE_LAN#

PEG_CLKREQ#

CLK_PCIE_VGA# CLK_PCIE_VGA

CLK_EXP CLK_EXP#

PCIE_PTX_C_DRX_P4PCIE_PTX_C_DRX_N4

PCIE_PRX_DTX_N4PCIE_PRX_DTX_P4

CLK _PCIE_CARD_PCH#CLK_PCIE_CARD_PCH

PCIECLKREQ3#

CLK_PCI_DB

CLK_PCIE_EXP_PCHCLK_PCIE_EXP_PCH#

CLKREQ_EXP#

PCIE_PTX_C_DRX_P5

PCIE_PRX_DTX_N5


+3VALW

+3VALW

+3VALW

+3VALW

+3VS

+3VALW

+3VS

+3VS

+3VS

+1.05VS

+3VS +3VALW

+3VS

+3VS

Title


Date: Sheet o f




0.3

IBEX-M(2/6)-PCI-E/SMBUS/CLKCustom



LA-5752P

WLAN

WLAN

LAN

LANNvidiathermalsensor

DTS , read from EC

DDR3*2 AND CLK GEN

EC_THERMAL

NEW CARD

WLAN

MINI1

LAN

WLAN

NEW CARD

LAN

6

4

DEVICEPORT

5

32

PCIE PORT LIST

1

78

X

XX

GPIO11 = NATIVE,3.3V,SUS



GPIO47 = 10Kohm PULL DOWN








EMI REQUEST 0303

25MHz crystal not used, XTAL25_INneed to GND.(checklist Rev1.6)

3G

3G

3G

X

C631 Resistor Pull down

EXP

EXP

R220 0_0402_5%1 2

R 81 0_0402_5%@1 2

R223 0_0402_5%3G@ 1 2

C222 0.1U_0402_10V6K1 2

R41333_0402_5%@

1

2

R1220_0402_5%

@1 2

R148 2.2K_0402_5%1 2

R404 2.2K_0402_5%1 2

R222 0_0402_5%3G@ 1 2

R598 1M_0402_5%@1 2

C231 0.1U_0402_10V6K3G@ 1 2

R491 90.9_0402_1%1 2

R106 0_0402_5%1 2R105 0_0402_5%1 2

C631

0_0402

_5%

1

2C26322P_0402_50V8J@

R434 10K_0402_5%1 2

R79 0_0402_5%

R224 0_0402_5%1 2

C221 0.1U_0402_10V6K1 2

C232 0.1U_0402_10V6K3G@ 1 2

C630

18P_0402

_50V8J

@1

2

R525 0_0402_5%1 2

C223 0.1U_0402_10V6K1 2

R225 0_0402_5%1 2

C229 0.1U_0402_10V6K1 2

C220 0.1U_0402_10V6K1 2

R4070_0402_5%

R431 10K_0402_5%1 2

R457 10K_0402_5%1 2

R197 0_0402_5%1 2

R 78 2.2K_0402_5%1 2

Y4

25MHZ_20P_1BG25000CK1A

@

1 2

R196 0_0402_5%1 2

R524 0_0402_5%1 2

R41210K_0402_5%1 2

R147 2.2K_0402_5%1 2

R19822_0402_5%

@1 2

R406 10K_0402_5%1 2

R80 0_0402_5%

R20933_0402_5%@

1

2

R400 10K_0402_5%1 2

Q8B2N7002DW-T/R7_SOT363-6

3

5

4

R 83 0_0402_5%@1 2

R435 10K_0402_5%1 2

C43922P_0402_50V8J@

R403 2.2K_0402_5%1 2

C230 0.1U_0402_10V6K1 2

R221 0_0402_5%1 2

R1242.2K_0402_5%

R145 10K_0402_5%1 2

R1190_0402_5%

@1 2

R123 2.2K_0402_5%1 2

R399 10K_0402_5%1 2

R121 10K_0402_5%1 2

P

C

I

-

E

*

S

M

B

u

s

C

o

n

t

r

o

l

l

e

r

F

r

o

m

C

L

K

B

U

F

F

E

R

P

E

G

C

l

o

c

k

F

l

e

x

L

i

n

k

U7B


PERN1BG30PERP1BJ30

PERN2AW30PERP2BA30

PERN3AU30PERP3AT30

PERN4BA32PERP4BB32

PERN5BF33PERP5BH33

PERN6BA34PERP6AW34

PERN7AT34PERP7AU34

PERN8BG34PERP8BJ34

PETN1BF29PETP1BH29

PETN2BC30PETP2BD30

PETN3AU32PETP3AV32

PETN4BD32PETP4BE32

PETN5BG32PETP5BJ32

PETN6BC34PETP6BD34

PETN7AU36PETP7AV36

PETN8BG36PETP8BJ36

SMBALERT# / GPIO11 B9

SMBCLK H14

SMBDATA C8

SML0CLK C6

SML0DATA G8

CLKOUT_PCIE0NAK48CLKOUT_PCIE0PAK47

CLKOUT_PCIE1NAM43CLKOUT_PCIE1PAM45


CLKOUT_PCIE3NAH42CLKOUT_PCIE3PAH41


CLKOUT_PCIE5NAJ50CLKOUT_PCIE5PAJ52

SML0ALERT# / GPIO60 J14

CL_CLK1 T13

CL_DATA1 T11

CL_RST1# T9

CLKIN_BCLK_N AP3CLKIN_BCLK_P AP1

CLKIN_DMI_N AW24CLKIN_DMI_P BA24

CLKIN_DOT_96N F18CLKIN_DOT_96P E18

CLKIN_SATA_N / CKSSCD_N AH13CLKIN_SATA_P / CKSSCD_P AH12

XTAL25_IN AH51XTAL25_OUT AH53

REFCLK14IN P41

CLKIN_PCILOOPBACK J42

CLKOUT_PEG_A_N AD43CLKOUT_PEG_A_P AD45

PEG_A_CLKRQ# / GPIO47 H1

PCIECLKRQ0# / GPIO73P9

PCIECLKRQ1# / GPIO18U4

PCIECLKRQ2# / GPIO20N4

PCIECLKRQ3# / GPIO25A8

PCIECLKRQ4# / GPIO26M9

PCIECLKRQ5# / GPIO44H6

CLKOUTFLEX0 / GPIO64 T45

CLKOUTFLEX1 / GPIO65 P43

CLKOUTFLEX2 / GPIO66 T42

CLKOUTFLEX3 / GPIO67 N50

CLKOUT_DMI_N AN4CLKOUT_DMI_P AN2

PEG_B_CLKRQ# / GPIO56P13CLKOUT_PEG_B_PAK51CLKOUT_PEG_B_NAK53

SML1ALERT# / GPIO74 M14

SML1CLK / GPIO58 E10

SML1DATA / GPIO75 G12

XCLK_RCOMP AF38

CLKOUT_DP_P / CLKOUT_BCLK1_P AT3CLKOUT_DP_N / CLKOUT_BCLK1_N AT1

R113 10K_0402_5%1 2

R822.2K_0402_5%

R120 10K_0402_5%1 2

Q7B

2N7002DW-T/R7_SOT363-63

5

4

Q8A2N7002DW-T/R7_SOT363-6

6 1

2

R454 10K_0402_5%1 2

Q7A

2N7002DW-T/R7_SOT363-66 1

2

55

4

4

3

3

2

2

1

1

D D

C C

B B

A A

PM_RSMRST#

SLP_S4#

SLP_S5#

SYS_RST#

PM_DRAM_PWRGD

GPIO61

GPIO62

S YS_PWROK

SLP_S3#

GPIO72

PBTN_OUT#

DMI_CTX_PRX_N2

DMI_CRX_PTX_N0DMI_CRX_PTX_N1DMI_CRX_PTX_N2DMI_CRX_PTX_N3

DMI_CRX_PTX_P0DMI_CRX_PTX_P1DMI_CRX_PTX_P2DMI_CRX_PTX_P3

DMI_CTX_PRX_N1DMI_CTX_PRX_N0

PM_RSMRST#

DMI_CTX_PRX_N3

DMI_CTX_PRX_P1DMI_CTX_PRX_P2

DMI_CTX_PRX_P0

DMI_CTX_PRX_P3

DMI_IRCOMP

AC_PRESENT_R

PCIE_WAKE#

CRT _IREF

FDI_CTX_PRX_N0FDI_CTX_PRX_N1FDI_CTX_PRX_N2FDI_CTX_PRX_N3FDI_CTX_PRX_N4

FDI_CTX_PRX_N6FDI_CTX_PRX_N5

FDI_CTX_PRX_P1

FDI_CTX_PRX_N7

FDI_CTX_PRX_P0

FDI_CTX_PRX_P3FDI_CTX_PRX_P2

FDI_CTX_PRX_P6FDI_CTX_PRX_P5FDI_CTX_PRX_P4

FDI_CTX_PRX_P7

FDI _INT

FDI_FSYN C1

FDI_FSYN C0

FDI_LSY NC1

FDI_LSY NC0

PCH_E NVDD

EDID_DATAEDI D_CLK

DAC _BLU

DAC_R EDDAC_G RN

HD MICLK_NBHDMIDAT_NB

TMDS_B_DATA2#_PCHTMDS_B_DATA2_PCHTMDS_B_DATA1#_PCH

TMDS_B_DATA0#_PCH

TMDS_B_CLK#_PCH

TMDS_B_DATA1_PCH

TMDS_B_DATA0_PCH

TMDS_B_CLK_PCH

DAC _BLU

DAC_R ED

DAC_G RN

PCH_ENBKL

EDI D_CLK

EDID_DATA

SUS _PWR_DN_ACK_R

S YS_PWROKVGATE

IC H_POK

VGATE

ICH_POK

PBTN_OUT#

PM_DRAM_PWRGD

PCIE_WAKE#

SLP_S5#

H_P M_SYNC

SLP_S4#

SLP_S3#

EC_RSMRST#

DMI_CRX_PTX_N0

DMI_CTX_PRX_N0DMI_CTX_PRX_N1DMI_CTX_PRX_N2DMI_CTX_PRX_N3

DMI_CTX_PRX_P0DMI_CTX_PRX_P1DMI_CTX_PRX_P2DMI_CTX_PRX_P3

DMI_CRX_PTX_N1DMI_CRX_PTX_N2DMI_CRX_PTX_N3

DMI_CRX_PTX_P0DMI_CRX_PTX_P1DMI_CRX_PTX_P2DMI_CRX_PTX_P3

AC_PRESENT

FDI_CTX_PRX_N0 FDI_CTX_PRX_N1




FDI_CTX_PRX_P1 FDI_CTX_PRX_P0




FDI_ INT

FDI_FSYNC0

FDI_LSY NC0

FDI_FSYNC1

FDI_LSY NC1

LVDS_ACLK#LVDS_ACLK

LVDS_A0#LVDS_A1#LVDS_A2#

LVDS_A0LVDS_A1LVDS_A2

EDID_DATA

PCH_E NVDD

PCH_PWM

EDID_CLK

CRT_HSY NCCRT_V SYNC

CRT_DDC_CLKCRT_DDC_DATA

DAC_BLUDAC_GRNDAC_RED

TMDS_B_HPD#

HDMIDAT_NB HDMICLK_NB

P CH_ENBKL

SUS_PWR_DN_ACK

TMDS_B_DATA2# TMDS_B_DATA2 TMDS_B_DATA1# TMDS_B_DATA1 TMDS_B_DATA0# TMDS_B_DATA0 TMDS_B_CLK# TMDS_B_CLK

+3VALW

+3VS

+3VALW

+3VALW

+3VALW

+1.05VS

+3VS

+3VALW

+3VS

+3VS

+3VS+3VS

Title


Date: Sheet o f




0.3

IBEX-M(3/6)-DMI/GPIO/LVDSCustom



LA-5752P



Checklist0.8 MEPWROKcan be connect toPWROK if iAMT disable

If not using integratedLAN,signal may be left as NC.

Can be left NC when IAMT isnot support on the platfrom

GPIO29 = GPO,3.3V,SUS



RSMRST circuit

4mil width and placewithin 500mil of the PCH

GPIO32 = GPO,3.3V,CORE

CRT OUT

(2009,05,04)

update R492 tolerance for DAC_CRT from 0.5% to 5%(checklist 2.0)

HDMI

Reserved (2009,09,08)

R418 10K_0402_5%@1 2

R496 10K_0402_5%1 2

R146 10K_0402_5%1 2

R417 10K_0402_5%@1 2

C640 0.1U_0402_10V6KUMA_HDMI@1 2

R77 8.2K_0402_1%1 2

T10 P AD

L

V

D

S

D

i

g

i

t

a

l

D

i

s

p

l

a

y

I

n

t

e

r

f

a

c

e

C

R

T

U7D


L_BKLTCTLY48

L_BKLTENT48

L_CTRL_CLKAB46L_CTRL_DATAV48

L_DDC_CLKAB48L_DDC_DATAY45

L_VDD_ENT47

LVDSA_CLK#AV53LVDSA_CLKAV51

LVDSA_DATA#0BB47LVDSA_DATA#1BA52LVDSA_DATA#2AY48LVDSA_DATA#3AV47

LVDSA_DATA0BB48LVDSA_DATA1BA50LVDSA_DATA2AY49LVDSA_DATA3AV48

LVDSB_CLK#AP48LVDSB_CLKAP47

LVDSB_DATA#0AY53LVDSB_DATA#1AT49LVDSB_DATA#2AU52LVDSB_DATA#3AT53

LVDSB_DATA0AY51

DDPB_0N BD42

DDPB_1N BJ42

LVD_VREFHAT43LVD_VREFLAT42

DDPD_2N BF37

DDPD_3N BE36

DDPB_2N BB40

DDPB_3N AW38

DDPC_0N BE40

DDPC_1N BF41

DDPC_2N BD38

DDPC_3N BB36

DDPD_0N BJ40

DDPD_1N BJ38

DDPB_0P BC42

DDPB_1P BG42

DDPD_2P BH37

DDPD_3P BD36

DDPB_2P BA40

DDPB_3P BA38

LVDSB_DATA1AT48LVDSB_DATA2AU50LVDSB_DATA3AT51

LVD_IBGAP39LVD_VBGAP41

DDPC_1P BH41DDPC_0P BD40

DDPC_2P BC38

DDPC_3P BA36

DDPD_0P BG40

DDPD_1P BG38

Date post:	31-Oct-2015
Category:	Documents
Upload:	baris-akdamar
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Lenovo G560 LA-5752P

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