OCTOBER 1991 VOLUME I NUMBER 2 LTC1272: Single-Supply, Sampling 12-Bit ADC Guarantees 3-microsecond Conversions LTC’s new 3μs, 12-bit sampling ADC converts 2.5 times faster than any sampling converter offered in the AD7572 pinout. In fact, the LTC1272 converts as fast as the fastest non- sampling AD7572-type ADCs, while providing an on-chip sample-and-hold, single 5V supply operation, and lower power consumption. This article de- scribes the converter’s technology, a typical application, some design ad- vantages, and some breadboarding and design techniques. Technology: High-Speed Design on a Low-Cost Process The LTC1272 is a high-speed, ca- pacitor-based, sampling A/D con- verter, designed on a low-cost BiCMOS process. It achieves a 250kHz sample rate and eliminates the need for a fast, external sample-and-hold. The design of the voltage reference and other cir- cuitry allows single 5V supply opera- tion. A fast-settling DAC design and a new, patented comparator takes the sampling successive approximation (SAR) conversion architecture to new heights in speed. The LTC1272 does so well that it converts faster than many ADCs which use supposedly faster architectures (for example, the 4μs subranging AD678 and AD1678). In Figure 1, the sample-and-hold function is provided when the input signal is stored on the sample-and- hold capacitor, C sample . The acquisi- tion time to 12 bits is typically 450ns (1μs maximum). Sample-and-hold er- rors are included in the accuracy speci- fication of the ADC, reducing system errors and cost. The DAC is a binary-weighted ca- pacitor array that is wafer trimmed to within 1/2 LSB maximum linearity error, using a fusible-link ROM. It is designed to switch and settle extremely quickly. As a result of our attention to process, layout, and design, only the three most-significant bits require trimming. The comparator is optimized for speed. At a 3μs conversion rate, only 250ns are available for each bit test. To achieve a 3μs spec over temperature IN THIS ISSUE . . . COVER ARTICLE LTC1272: Single-Supply, Sampling 12-Bit ADC Guarantees 3-microsecond Conversions ...................... 1 William Rempfer EDITOR'S PAGE ................ 2 Richard Markell DESIGN FEATURES The LT1190 Family, A Product of Design Innovation ........... 3 John Wright New LTC1264-7 Allows Linear Phase Data Transmission to 200kHz ............................. 4 Richard Markell The LTC1100, LT1101 and LT1102: A Trio of Effective Instrumentation Amplifiers ........................ 5 George Erdi The LTC1155 Dual, High-Side MOSFET Driver .................. 6 Tim Skovmand DESIGN IDEAS LT1109 Generates V pp for Flash Memory .................. 16 Steve Pietkiewicz RF Leveling Loop .............. 16 Jim Williams Ultra-low Noise and Low Drift Chopped-FET Amplifier ..... 17 Jim Williams NEW DEVICE CAMEOS ...... 18 LTC Marketing by William Rempfer – + 0V-5V ANALOG INPUT SAMPLE-AND-HOLD CAPACITOR C SAMPLE COMPARATOR 12 BITS 12-BIT DIGITAL OUTPUT CURVATURE CORRECTED BANDGAP REFERENCE V REF 2.42V OUTPUT S A R CAPACITIVE DAC Figure 1. Block Diagram Shows Fast Settling DAC and Patented Comparator: The Heart of the 3μs Sampling ADC continued on page 8 LINEAR TECHNOLOG Y LINEAR TECHNOLOG Y LINEAR TECHNOL OG Y
LTC’s new 3µs, 12-bit sampling ADCconverts 2.5 times faster than anysampling converter offered in theAD7572 pinout. In fact, the LTC1272converts as fast as the fastest non-sampling AD7572-type ADCs, whileproviding an on-chip sample-and-hold,single 5V supply operation, and lowerpower consumption. This article de-scribes the converter’s technology, atypical application, some design ad-vantages, and some breadboardingand design techniques.
Technology: High-SpeedDesign on a Low-Cost Process
The LTC1272 is a high-speed, ca-pacitor-based, sampling A/D con-verter, designed on a low-cost BiCMOSprocess. It achieves a 250kHz samplerate and eliminates the need for a fast,external sample-and-hold. The designof the voltage reference and other cir-cuitry allows single 5V supply opera-tion.
A fast-settling DAC design and anew, patented comparator takes thesampling successive approximation(SAR) conversion architecture to newheights in speed. The LTC1272 doesso well that it converts faster thanmany ADCs which use supposedlyfaster architectures (for example, the4µs subranging AD678 and AD1678).
In Figure 1, the sample-and-holdfunction is provided when the inputsignal is stored on the sample-and-
hold capacitor, Csample. The acquisi-tion time to 12 bits is typically 450ns(1µs maximum). Sample-and-hold er-rors are included in the accuracy speci-fication of the ADC, reducing systemerrors and cost.
The DAC is a binary-weighted ca-pacitor array that is wafer trimmed towithin 1/2 LSB maximum linearityerror, using a fusible-link ROM. It isdesigned to switch and settle extremelyquickly. As a result of our attention toprocess, layout, and design, only thethree most-significant bits requiretrimming.
The comparator is optimized forspeed. At a 3µs conversion rate, only250ns are available for each bit test. Toachieve a 3µs spec over temperature
Ultra-low Noise and Low DriftChopped-FET Amplifier..... 17Jim Williams
NEW DEVICE CAMEOS ......18LTC Marketing
by William Rempfer
–
+
ART. 5, FIG. 1
0V-5V ANALOG
INPUT
SAMPLE-AND-HOLD CAPACITOR
CSAMPLE
COMPARATOR
12 BITS12-BIT DIGITAL OUTPUT
CURVATURE CORRECTED BANDGAP
REFERENCE
VREF 2.42V OUTPUT
S A R
CAPACITIVE DAC
Figure 1. Block Diagram Shows Fast SettlingDAC and Patented Comparator: The Heart ofthe 3µs Sampling ADC
continued on page 8
LINEAR TECHNOLOGY LINEAR TECHNOLOGY LINEAR TECHNOLOGY
2 Linear Technology Magazine • October 1991
DESIGN FEATURES
Linear Technology ContinuesAnalog Excellence by Richard Markell
The second issue of Linear Technol-ogy from the corporation of the samename, continues to present new prod-ucts, applications, innovations, andproduct highlights from the designersat Linear.
Reader response to the first issue ofLinear Technology has been excellent.Both the overall concept and the tech-nical level of the magazine were favor-
ably received. LT will continue to offerboth application articles that focus oncircuit theory and system design, andarticles on the inside details of newproducts conceived by the designers atLTC.
We would like, in a future issue, tobegin a question and answer columndriven by reader involvement. If youhave a question on a specific circuit
problem or an issue that you would liketo see addressed in the magazine, pleasewrite a note or send a FAX detailingyour question to: Richard Markell, c/oLTC World Headquarters (see page 20for our address and FAX number). Inaddition, do not hesitate to send usideas and/or suggestions for new prod-ucts that you would like to see LTCmanufacture. We are always listening!
challenges involved in crafting high-speed amplifiers for the bipolar pro-cess is quite fascinating, but John isequally capable of discussing fly fish-ing on Hat Creek with zest.
In his Design Feature, George Erdidiscusses the new family of Instru-mentation Amplifiers (IAs) recently in-troduced by LTC. George is the fatherof the precision low-noise operationalamplifiers, having designed such partsas the OP07, the OP27, the LT1028,the LT1013, and the LT1078. Georgehas been with LTC since the companywas founded. In his article, George getsright to the heart of the IA issue byoffering detailed specifications and se-lection criteria for each new IA offeredby LTC.
Tim Skovmand writes about theLTC1155, a new, low-quiescent-cur-rent MOSFET driver designed specifi-cally for low-voltage, high-efficiencyswitching applications, such as thosefound in power supplies for notebookand laptop computers. Tim has beendesigning power control and automo-tive IC’s for almost twelve years and he
Issue HighlightsThe second issue of Linear Technol-
ogy features five “Design Feature”articles. These articles highlight thefeatures and performance characteris-tics of new LTC products.
William Rempfer, in the first article,introduces the LTC1272, a 12-bit, 3microsecond, 250kHz sampled-data Ato D converter. Willie discusses thetechnological innovations which allowLTC’s first 12-bit parallel A/D con-verter (with sample-and-hold) to con-vert faster than any AD7572 typeconverter. The LTC1272 was first in-troduced at LTC’s popular “For De-signers by Designers” seminar series.
John Wright presents the LT1190series of high-speed, low-cost, videoamplifiers in his article. These amplifi-ers are a significant addition to the LTCproduct line and are aimed at a widevariety of video as well as general-purpose high-speed amplifier applica-tions. John has been designingintegrated circuits for almost fifteenyears and high-speed op amps for fiveof those years. His discussion of the
is a member of the new Power ControlGroup of designers at LTC.
In our final Design Feature, RichMarkell discusses a filter for data trans-mission that grew from a customerbuilding the same filter using 29 opamps, 30 adjustments and, in thecustomer’s words, “no cigar.” TheLTC1264-7 is a linear-phase filter withcut-off frequencies to 200kHz. Rich, inhis article, explains the eye-diagrammethod of filter characterization fordata transmission and the uses forthis new filter technology.
The “Design Ideas” section presentscircuit ideas from Jim Williams on theultimate in chopper amplifiers as wellas an AGC circuit. Steve Pietkiewiczprovides a surface-mountable circuitto program Intel memory devices.
The “New Device Cameos” section ispresented by LTC Marketing to intro-duce many new families of devicesfrom LTC. In fact, so many new devicesare included in this issue that the “NewDevice Cameos” page has been ex-panded to two pages.
EDITOR’S PAGE
HAPPY BIRTHDAY LTC ... and a big thank you to all those who helped establish and run the company during its first ten years. Thanks to all our customers, also!
Linear Technology Magazine • October 1991 3
DESIGN FEATURES
by John Wright
must also be well controlled. For cleansettling dynamics, the net open-loopresponse of an amplifier should closelyresemble a single-pole roll-off, a diffi-cult goal to achieve as bandwidth in-creases and multiple poles and zeroscontribute phase shift. The poor set-tling time often associated withfeedforward amplifiers is due to dou-blets, or closely-spaced pole zero/pairsin the signal path. Indeed, examina-tion of the 118’s rolloff shows just sucha doublet “bump.” In the design of theLT1190 series amplifiers, several de-sign innovations contribute to a wellcontrolled gain/phase response, re-sulting in good settling characteris-tics.
What’s Inside?Figure 1 is a schematic of the
LT1190/91/92 op amps, revealing howthe settling-time problem was addressedvia several design steps. The NPN inputstage has a single-ended output takenfrom the collector of Q1, instead of adifferential output as in other designs.This measure eliminates the shunt ca-pacitor otherwise needed on the collec-tor of Q2 (used to produce single-endedAC level shift drive). In such shunt-capacitor-based designs (e.g., the 118)
settling time is degraded by the inputstage, which generates a pole/zero pairseparated by an octave.
In the second stage of LT1190 cir-cuit, a local DC reference voltage Vref isgenerated, which tracks Q1’s collector.This feature provides the amplifier witha low Vos, just as if a more conventionaldifferentially loaded Q1–Q2 stage wereused.
The second stage of the amplifier,consisting of Q3 through Q8 and theirassociated components, functions as aDC-balanced, AC-feedforward levelshifter. The transconductance of thelevel shift is set by R2, R3, Q5, and Q6,while CFF feeds AC signals around Q6.A second doublet is formed by the ft ofPNP Q6 and feedforward capacitor CFF.However, by enclosing the level shifterwithin the Q9–Q10 integrator loop, theeffects of this doublet are reduced as aresult of Q10’s gain. Also, unlike previ-ous designs, there is no AC signal paththrough the current mirror Q7–Q8,which could otherwise cause high-fre-quency phase shift in the level shift.
In keeping with a single-ended de-sign, the output stage is a class-AB
Figure 1. LT1190 Family Low Cost Operational Amplifier
+
–OUTV
BIASV
ART. 3, FIG. 1
REFV
MC
FFC
+V+V
3
2
1 85BAL BALS/D
6
V7 +
V4 –
Q10
R4
I1
R3R2
R1
Q3 Q4
Q9
Q12
Q11
Q2Q1
Q7
Q5
Q8
Q6
The LT1190 amplifier family is anew series of low-cost, high-speed,video amplifiers from LTC. These am-plifiers are aimed at a wide variety ofvideo applications, as well as general-purpose, high-speed amplification. Thefamily consists of three voltage-feed-back amplifiers (op amps), and twovideo-difference amplifiers (video am-plifiers with uncommitted (+) and (–)inputs). The performance levels at-tained with these amplifiers havetraditionally been realized only withmore expensive processes, such asfull-complementary or dielectricallyisolated technologies. The LT1190family is unique because of its patent-pending circuitry, and because it isfabricated on a low-cost bipolar pro-cess with high-speed NPN and slowlateral PNP transistors.
All of the LT1190 series amplifiersdrive video cables directly at 450V/µs,they source and sink 50mA of outputcurrent, and have gain-bandwidthproducts ranging from 50 to 350MHz.The family is optimized for ±5V sup-plies, and is guaranteed from ±8Vdown to a single +5V supply.
The Challenges of High SpeedThe lateral PNP transistors of stan-
dard bipolar IC processes cause prob-lems in all but general-purpose,low-frequency amplifiers. They aremuch slower than NPNs, and have f tsless than 10MHz, greatly limiting theirusefulness in fast amplifiers. Whilethey are suited for level shifters at DC,they are unacceptable for fast AC sig-nals due to excessive phase shift.
The classic solution to this problemis to pass AC signals around the PNPsby means of a feedforward capacitor,as used in amplifiers such as theLM118. However, this techniquecauses serious settling-time problems,with “long tails” of up to several micro-seconds. Other response anomalies
The LT1190 Family, A Product of DesignInnovation
continued on page 11
4 Linear Technology Magazine • October 1991
DESIGN FEATURES
New LTC1264-7 Allows Linear PhaseData Transmission to 200kHz by Richard Markell
The pace of digital communicationsis increasing at a tremendous rate.Daily, the digital data-compaction en-gineer is expected to transmit moredata in the same channel bandwidthwith closer channel spacing. All knowncompaction techniques involve simul-taneous combinations of amplitudeand phase modulation to reduce thebandwidth-to-data-rate ratio. Filter de-sign has not kept up with this “com-pact-or-else” scenario until now.Although filters such as the LTC1064-3 linear-phase, switched-capacitor fil-ter have excellent transient response,they have poor adjacent-channel re-jection. DSP is a help if the designer isworking with telephone bandwidths,but it is not fast enough for efficientuse of 100kHz of bandwidth, let alone200kHz, where one can send 400–800kbits/second of data.
Non-Bessel linear-phase filters andother non-traditional filter designs weredifficult to implement before the devel-opment of the FilterCAD design soft-ware, and, as a result, such designswere seldom employed. Expensive testprocedures, network analyzers, anddifficult adjustments are required forthe successful implementation of thesefilters. With the aid of FilterCAD, LTChas created the LTC1264-7 linear-
phase filter, thus sparing digital com-munications engineers from the chal-lenges of non-traditional filter design.
Although its group delay is equal tothat of the Bessel in the pass band, theLTC1264-7 has stopband rejection atthe second harmonic of the cut-offfrequency of –30 dB, versus the Bessel’s–12dB. Even the most conservativedata-compaction engineer will agreethat the LTC1264-7 is “better thanBessel.” Enough hoopla—let’s get intothe details.
For the first time in history, LinearTechnology has incorporated two com-plex poles and two complex zeros ofphase compensation and six real polesplus two real zeros of low-pass ellipticfiltering into a single 14-pin package.This is the LTC1264-7 filter. Just de-cide on a cutoff frequency and specifythe appropriate clock frequency. Noexternal resistors are required. TheLTC1264-7 is the first member of thelinear phase filter family: the “-7s.”This group will include, in addition tothe LTC1264-7, the low power (4mA)LTC1164-7, with cutoff frequencies to20kHz, and the originator of the fam-ily, the LTC1064-7, which will providecutoff frequencies to 100kHz.
The eye diagram shown in Figure 1illustrates 100 kHz phase performance.Notice the lack of overshoot or under-
Figure 2. Filter Roll-Off Comparison, fCUTOFF= 40kHz, for Butterworth 8th Order LowpassFilter (LPF), LTC1064-2, Bessel 8th OrderLPF, LTC1064-3, and LTC1264-7 LinearPhase Filter
Some Principles of DataTransmission
Transmission of data in a channelwith a given bandwidth is most effi-cient when as many bits-per-secondas possible can be transmitted throughsaid channel. Nyquist theorems showthat the theoretical data-rate limit is
continued on page 13
shoot at the transitions. The real ad-vantage of the LTC1264-7, however, isin its stopband rejection. Figure 2shows an amplitude comparison ofthe responses of the LTC1264-7, the8-pole Butterworth (the LTC1064-2),and the 8-pole Bessel filter (theLTC1064-3). The difference is dramatic.The LTC1264-7 attains 30dB attenua-tion at two times cutoff, while theLTC1064-3 attains only 12dB. Thephase responses of both filters remainlinear through their passbands, al-though the LTC1064-3 extends thisresponse to almost two times cutoff.We will explore the effect this has ondigital transmission later in this ar-ticle, but to make this comparison, ashort explanation of some principlesof digital transmission is first needed.
FREQUENCY (kHz)
10–90
GAIN
(dB)
–80
–60
–40
40 100 200
ART. 1, FIG. 2
–70
–50
–30
–20
–10
0
10
LTC1064-3
LTC1064-2
LTC1264-7
Linear Technology Magazine • October 1991 5
DESIGN FEATURES
ART. 4, FIG. 1b
+
–
A
REF R2R1
INPUT
–
+
G = GAIN = 1 + WHEN ≡
R4 R3
R4 R1 R3 R2
R3
+
–
B
R4
OUTPUT
ART. 4, FIG. 1a
+
–
A
REFR3 R4
R2R1
OUTPUT
INPUT
–
+
G = GAIN = R2 R1
R2 R4 R1 R3
≡
The LTC1100, LT1101 and LT1102:A Trio of Effective InstrumentationAmplifiers by George Erdi
Figure1a. Basic Single Op Amp Instrumen-tation Amplifier
Figure 2. Instrumentation Amplifiers in 8-Pin Packages
Next to the universally used opamp, perhaps the most useful linear-IC building block is the instrumenta-tion amp, or “IA.” Using IA’s effectivelycan in some ways be more challengingthan selecting op amps, because IA’shave different specs, and can also usedifferent topologies. However, the ba-sic task is a fixed-gain, differential-input, single-ended output amplifier,the definition of an IA. The differentialsignal typically rides on top of a com-mon-mode signal; the differential in-put is amplified and the common-modevoltage is rejected by the IA.
The instrumentation amplifier canbe implemented with dedicated IA de-signs, or with one to three op amps torealize the gain function, and a mini-mum of four ratio-matched precisionresistors, configured as two like-ratiopairs.
The most familiar IA type is thesingle-op-amp variety, usually calleda difference amplifier, and shown inFigure 1a. Using just two parts (one opamp and one resistor network), this IAis the height of simplicity and utility.For modest requirements, it is builtwith just a general-purpose op ampand four precision resistors. A draw-back to this type of IA is that theresistor bridge loads the source. Thethree-op-amp configuration usesseven resistors and has high inputimpedance. It is obviously more diffi-cult to implement than the single-op-amp version. A nice compromisebetween these two approaches is il-lustrated in Figure 1b. This IA designuses two op amps to buffer the signalinputs and requires only four resis-tors. The use of two op amps withmodern dual devices causes no pen-alty, and in fact this arrangement hasreal virtues over the more basic setupof Figure 1a.
This IA architecture presents mini-mum loading to the differential source,namely the bias current of the op ampused, which is balanced between thetwo inputs. The resistor network needs
very precise trimming for high com-mon-mode rejection (CMRR) and gainaccuracy. The trimming is non-inter-active; first the R4/R3 ratio is trimmedfor gain accuracy, then the R1/R2ratio is trimmed for high CMRR. Trim-ming compensates not only for resis-tor inaccuracies, but also for the finitegain and CMRR of the op amps. Theamplified difference appears betweenthe output terminal and the voltageapplied to the REF terminal (normallygrounded).
As a basic building block, this IAcan be performance optimized for vari-ous applications by a choice of opamps. LTC has taken this step withthe LTC1100, LT1101, and LT1102,an instrumentation-amplifier series
offered in an 8-pinfootprint with connec-tions as shown in Fig-ure 2. As illustrated,the gain of these IA’sis user programmedby taps on the resis-tor array, for pre-trimmed precisiongains of either 10 or100 for the LT1101Figure 1b. Buffered Dual Op Amp Instrumentation Amplifier
continued on page 14
ART 4, FIG 2
90R
9RR
8
7
6
5V+
NON-INVERTING INPUT
OUTPUT1GROUND
(REF)
2
3INVERTING INPUT
4V–
90R
9RR
–
+B
–
+A
LT1101 AND LT1102
99R
R
8
7
6
5V+
NON-INVERTING INPUT
OUTPUT1GROUND
(REF)
2
3INVERTING INPUT
4V–
99R
R
–
+B
–
+A
LTC1100
G = 100, NO ADDITIONAL CONNECTIONS
G = 10, SHORT PIN 2 TO PIN 1 SHORT PIN 7 TO PIN 8
R ≈ 1.8k FOR LTC1100 AND LT1102
R ≈ 9.2k FOR LT1101
LT1101 AND LT1102 ONLY
6 Linear Technology Magazine • October 1991
DESIGN FEATURES
ART. 2, FIG. ?a
100mV REFERENCE COMP 10µs
DELAY
ANALOG
DIGITAL
VOLTAGE REGULATORSINPUT
R
S
INPUT LATCH
ONE SHOTOSCILLATOR AND CHARGE
PUMP
GATE CHARGE AND
DISCHARGE CONTROL LOGIC
FAST/SLOW GATE CHARGE
LOGIC
GATE
DRAIN SENSE
VSUPPLY
GND
LOW STANDBY CURRENT
REGULATOR
ANALOG SECTION
TTL-TO-CMOS CONVERTER
The LTC1155 Dual, High-SideMOSFET Driver by Tim Skovmand
The LTC1155 is a new, micropowerMOSFET driver, specifically designedfor low-voltage, high-efficiency switch-ing applications, such as those foundin lap-top or notebook computers. TheLTC1155 facilitates the use of lowcost, N-channel MOSFETs in place ofthe larger and more expensive P-chan-nel devices used in many applications.
The LTC1155 does this by produc-ing a gate voltage higher than thepower supply rail. This higher voltageis produced by on-chip capacitorswhich successively deliver charge tothe gate of the power MOSFET. Thisso-called “charge pump” has been de-signed to be very efficient, requiringonly 8µA in standby mode and 85µA inoperation from a 5 volt rail while pro-ducing 7 volts of gate drive (12 voltsabove ground). This efficiency is due inlarge part to the capabilities affordedby the proprietary LTC CMOS process,which yields low-leakage, compact ca-pacitor structures and efficient CMOSswitches.
The LTC1155 also includes two in-dependently operating protection cir-cuits. These circuits are designed todetect a drop of 100mV across a senseresistor in series with the drain of thepower MOSFET. If this limit is ex-ceeded, the gate of the MOSFET isquickly discharged (pulled to ground)and the MOSFET protected againstdestructive over-current conditions. Adelay can be inserted between thesense resistor and the drain senseinput in order to prevent false trigger-ing while driving high inrush loads,such as large capacitors, DC motors,or lamp loads.
The LTC1155 is a true, mixedanalog and digital system, as evidencedby the block diagram shown in Figure1. The block diagram reveals the care-ful segregation of analog and digitalfunctions.
The analog section, containing the100mV reference, comparator, and aninternal 10µs delay, is powered from aseparate voltage regulator to eliminatethe possibility of interference or falsetriggering by the densely packed CMOSlogic section. The analog reference andcomparator devices are relatively largecompared to their digital counterparts,so as to reduce offsets and increasegain.
APPLICATIONS
Lap-top Computer PowerManagement
Lap-top computer power must bemanaged very carefully because thebattery pack is a finite energy source.Low loss (efficient) switching is re-quired to gain the maximum operatingtime from the discharging batteries.
The digital portions of the LTC1155are designed for maximum packingdensity and are therefore powered froma low-voltage regulator. The inputsand outputs to these sections are in-terfaced by level-shift circuitry, whichtranslates the input TTL levels to CMOSlevels and converts the low-voltageCMOS levels back to the rail-to-raillevels used by the gate charge andprotection circuitry.
The ultra-low standby current, typi-cally 8µA, is achieved by removingpower from all the analog and digitalcircuit blocks when the input is turnedoff. Only the two TTL-to-CMOS con-verters are continuously powered. Thegate of the MOSFET is held low via ahigh-voltage, N-channel CMOS switchthat is voltage driven and thereforerequires no power.
Figure 1. LTC1155 Block Diagram
The LTC1155 facilitates the use ofextremely low loss, N-channel MOSFETswitches to control the flow of energyto the variety of loads found in acomputer system.
Figure 2 is a schematic diagramthat demonstrates the use of theLTC1155 for switching the power busesin a lap-top computer system. Thedisk drive, display, printer and themicroprocessor system itself are se-lectively engaged via high-side switch-ing with minimum loss and areshutdown completely when not in use.
The quiescent current of theLTC1155 is designed to be extremelylow in both the OFF and ON states, sothat efficiency is preserved even whendriving loads which require very little
continued on page 7
Linear Technology Magazine • October 1991 7
DESIGN FEATURES
ART. 2, FIG. 3
10µFC 0.1 F
DLYµ Ω
R 0.1
SEN
IRLR024 OR EQUIVALENT
R 30kDLY
LTC1155
GND
GNDIN1 IN2
G2
DS2VSDS1
G1
1A MAX
1N4148
510k
1 Fµ1/6 74C14
OR
10 Fµ
LT1117-2.85
47 Fµ
PROTECTED TERM. POWER
2.85V TO TERM. RESISTORS
+ +
1N5817SIMILAR CIRCUIT
1 SEC FROM Pµ
+
V = 4.75 TO 5.25VS
1N4148
R 100k
fbk
input again. The drain sense resistor,Rsen, is selected to trip the LTC1155protection circuitry when the MOSFETcurrent exceeds 1A. This current limitprotects both the LT1117 and anyperipheral system powered by the SCSItermination power line.
The delay time afforded by Rdly andCdly is chosen to be considerablysmaller than the reset time period(>100:1), so that very little power isdissipated while the short circuit con-dition persists, i.e., the LTC1155 willdeliver small pulses of current duringevery reset time period until the shortcircuit condition is removed.
The power MOSFET gate isdriven to 12V and theMOSFET is fully enhanced.
The delay afforded bythe two delay components,Rdly and Cdly, ensure thatthe protection circuit is nottriggered by a high inrush-current load. If, however,the source of the MOSFETis shorted to ground, or ifthe output of LT1117 isshorted, the delay will beexceeded and the MOSFETwill be held OFF until thepulse from the free-run-ning oscillator resets the
ART. ?, FIG. 4
S
+
+10µF 0.1µF
300k0.02Ω
IRLZ24100k
0.1µF
10µA STANDBY CURRENT
10k
200pF
LT1431
8
7
6 5
4
3 5V/3A
470µF*
1
5V
CMOS OR TTL LOGIC
*CAPACITOR ESR SHOULD BE < 0.5Ω.
5.5V-18V
LTC1155
GNDIN1 GATE 1
DS2VS
+
Figure 4. 5V/3A Extremely Low Voltage Drop Regulator
The LTC1155 and the LT1117, aswell as the power MOSFET shown, areavailable in surface mount packagingand therefore consume very little boardspace.
Extremely Low Voltage DropRegulator
An extremely low voltage drop regu-lator can be built around the LTC1155and a low-resistance power MOSFET,as shown in Figure 4. The LTC1155charge pump boosts the gate voltageabove the supply rail and continuouslycharges a 0.1µF reservoir capacitor.The LT1431 works against this capaci-tor and the 100k series resistor to
Figure 3. SCSI Termination Power with Short Circuit Protection
Figure 2. Laptop Computer Power Bus Switching
ART. 2, FIG. 2
RSEN 20mΩ
CDLY 0.1µF
10 Fµ
30m MOSFET
Ω30m MOSFET
Ω
RDLY 300k
5A MAX
POWER BUS
µP SYSTEM
DISK DRIVE
DISPLAY PRINTER, ETC.
LTC1155
TTL, CMOS INPUT
TTL, CMOS INPUT
GND
GNDIN1 IN2
G2
DS2VSDS1
G1
+
VS = 4.5V TO 18V
CDLY 0.1µF
RSEN 20mΩ
RDLY 300k
LTC1155 continued from page 6
current to operate in standby, butrequire much larger peak currentswhen in operation. This combinationof a low RDSon MOSFET and anefficient driver delivers the maximumenergy to the load.
Protected SCSI TerminationPower
The circuit shown in Figure 3 dem-onstrates how the LTC1155 providesprotected power to SCSI terminators.The LTC1155 is initially triggered bythe free-running 1Hz oscillator (it couldalso be triggered by a pulse from themicroprocessor) and latches ON viathe positive feedback provided by Rfbk.
continued on page 15
8 Linear Technology Magazine • October 1991
DESIGN FEATURESLTC1272 continued from page 1
and process extremes, the typical con-version time must be about 2µs, or170ns per bit test. In that time, the DACmust settle, the comparator must makea bit decision, and the successive ap-proximation register (SAR) must latchthe bit value and update the DAC. TheSAR consumes roughly 30ns, whichleaves 140ns for the DAC and the com-parator. The speed was achieved bymeans of a DAC which settles to 0.002%in 80ns and a high-gain, wide-band-width comparator, which responds in60ns to an overdrive of 30µV. The com-parator is oscillation free, in spite of itsgain-bandwidth product of 60GHz (2k •30MHz bandwidth). The comparator isalso designed to cause minimum dis-turbance to the power supply andground lines. This makes the ADC re-markably easy to use, considering itsspeed.
The curvature-corrected bandgapreference provides 25ppm/°C maxi-mum full-scale drift on a single 5Vsupply. (We chose a bandgap referencebecause 5V is not enough to power aburied-zener reference.) The reference-output voltage is nominally 2.42V. (Thisdiffers from the –5.25V reference volt-age of the AD7572, but the LTC1272design provides the same 0V to 5Vinput range as the AD7572. It is plug-compatible with the AD7572 if the po-larity of the bypass cap is reversed.)
put. Data can be read as either a 12-bitword or two 8-bit bytes on the dataoutputs (D0/8-D11).
Design Advantages: SystemPerformance and Cost
Both DC and AC signals can bedigitized. DC performance is shown byFigure 3, a curve of typical integral non-linearity (INL) and differential non-lin-earity (DNL). DC specs include ±1/2LSB INL over temperature. 12-bit, no-missing-code resolution is assured by±1 LSB DNL. The conversion time is3µs, which is faster than the non-sampling 5µs AD7572 and equal to the
10 Fµ
IN
REF
D11 (MSB)
D10
D9
D8
D7 CLK
CLK
HBEN
RD
CS
BUSY
NC
V
LTC1272
D6
D5
D4
DGND D3/11
D2/10
D1/9
D0/8
A
V
AGND
DD
OUT
IN
P CONTROL LINES
µ
µ0.1 F
5V
8 OR 12-BIT PARALLEL
BUS
ANALOG INPUT (0V-5V)
10 Fµµ0.1 F
ART. 5, FIG. 2
++
+2.42V V
OUTPUTREF
Figure 2. 12-Bit, Single 5V System Converts AC or DC Inputs
continued on page 9
Figure 3. DC Performance is Typically Much Better Than the Specifications of a) ±0.5 LSB Maximum INL, and b) ±1.0 LSB Maximum DNL
Figure 3b.Figure 3a.
A TypicalApplication: 12Bits on a Single5V Supply
The typical hook-up in Figure 2 showsa single 5V systemthat can convert 0-to-5V input signals ata 250kHz rate. Asingle-point “star”ground is formed tothe analog groundplane at the LTC1272analog ground pin.The power-supply andreference-output pinsare each bypassed tothe analog ground plane with a 10µFtantalum in parallel with a 0.1µF diskceramic. Pin 23 is not internally con-nected and can accommodate the –15Vsupply of the AD7572 and its copies.The digital ground pin is also tied to theanalog ground plane.
The analog input range is 0V to 5V.The conversion time is set by the fre-quency of the clock applied to the clock-input pin, CLKIN, (4MHz for 3µsconversion time). The conversion isstarted and read with the chip select(CS), read (RD), and high-byte-enable(HBEN) inputs and the end of the con-version is detected with the BUSY out-
Linear Technology Magazine • October 1991 9
DESIGN FEATURESLTC1272 continued from page 8
Figure 5. For Sampling Systems, the Sampling LTC1272 a) Offers Cost, Power, Speed,Accuracy and Board Space Advantages over the Non-Sampling AD7572 with anExternal Sample-and-Hold, b). The LTC1272 Sample-and-Hold is Invisible to UsersWho do not Require It
FREQUENCY (kHz)
0–140
AMPL
ITUD
E (d
B)
20 40 60 80
ART. 5, FIG. 4
–120
–100
–80
–60
–40
–20
0
100 120
Figure 4. AC Performance is Characterized by theFFT of the Output Spectrum. S/(N + D) = 71.6dB,Effective Number of Bits (ENOBs) = 11.6
Cost-effective system design re-sults from the LTC1272’s features.Providing the sample-and-hold atthe same conversion speed savescost and board space, reducespower consumption, and improvesaccuracy (see Figure 5). Single-supply operation can also savepower and eliminates the need for anegative supply (see Figure 6).
Breadboarding and Design:Four “Inputs” to any ADC
To breadboard and design withADCs it helps to recognize that anyADC has at least four inputs (see Fig-ure 7):
1. The analog ground pin, AGND2. The analog input, AIN
3. The reference, VREF
4. The power supplies (in this caseonly one supply: VDD)To achieve high accuracy and low
noise, system design should concen-trate on eliminating noise on thesefour “input” pins.
If a well-designed and correctly func-tioning ADC gives erroneous outputcodes, it is doing so for a reason. Theseerroneous outputs can be DC errors,noisy codes, or tones and harmonics inthe frequency domain. If you're notgetting the answer you expect, it isprobably because some unexpected
Figure 6. The –15V Supply of the AD7572 isnot Required for the LTC1272 ConverterMaking Single 5V Supply ApplicationsPossible. Because the LTC1272 has anUnconnected Pin Where the AD7572’s –15VSupply is, It can Upgrade AD7572 Designswithout Board Changes
ART. 5, FIG. 6
MPULTC12720V-5V INPUTS
NOT REQUIRED
–15V
AIN
5V SUPPLY
fastest AD7572 copy. Full-scaleerror is ±10 LSBs, with a maximumtemperature drift of 25ppm/°C.Maximum power consumption is100mW, 45% less than that of theAD7572.
Time-domain AC performance ischaracterized by the 1µs maximum0.01% acquisition time of thesample-and-hold. In SAR ADCswithout sample-and-holds (e.g., theAD7572), signal bandwidths mustbe restricted to avoid conversionerrors, often to frequencies below10Hz. Also, the buffer driving the ana-log input must have extremely lowoutput impedance at high frequenciesin order to hold the analog input stablein the presence of large input-currenttransients that occur during the con-
version. In contrast, the samplingLTC1272 can handle rapidly changinginputs and does not require the com-plex input buffer.
Figure 4 shows an FFT plot taken ata sample rate of 250kHz and an inputsignal of 10kHz. Signal to noise plusdistortion (S/(N+D)) is 71.6dB.
continued on page 10
ART. 5, FIG. 5a
ANALOG INPUT 0V TO 5V
fSAMPLE = 250kHz
LTC1272
RD
Figure 5a.
ART. 5, FIG. 5b
+
23
24
+
19
20
21
CONTROL INPUTS
VDD
CS
RD
HBEN
DGND
AGNDVSS
BUSY
VREF
AIN
12
+VSLOGIC
REF
HOLD
VOUT
–VIN
HOLDGND
+VIN
–VS
6
2
AD585 AD7572
+
+
10µF 0.1µF
10µF
0.1µF
10µF 0.1µF
R5 10
R2 6.19k
R1 13k
10µF0.1µF
10µF0.1µF
R3 6.19kANALOG
INPUT –2.5V TO +2.5V
22
2
18
14
1
4
11
12
13
3
R4 13k
Figure 5b.
10 Linear Technology Magazine • October 1991
DESIGN FEATURES
Figure 8. Digital Signals can CoupleMagnetically to Analog Sections ThroughWhat is Effectively an Air Transformer. ToReduce This: 1) Separate Digital and AnalogSections as Much as Possible, and 2) Reducethe Area of Both Loops by Putting AnalogGround Plane Under Analog Signals andDigital Ground Under Digital Lines
LTC1272 continued from page 9
condition exists on one of the fourinputs. If you know the pin conditions,then the answer the ADC is giving willmake sense.
The task in troubleshooting ADCsystems is to find out which of the fourinputs has something unexpected onit. Then make circuit changes to re-store that pin to the desired condition.It’s that simple.
The task in designing ADC systemsis similar: take steps ahead of time inthe design and layout toensure that pin condi-tions will be as desired.The steps shown in Fig-ure 7 help ensure properconditions on the fourpins:
A single-point groundshould be formed byconstructing an analogground plane around pin3 (AGND) of the LTC1272.This becomes the zeroreference for all analogcircuitry. Noise on this ground addsdirectly to the analog input. Pin 12(DGND) of the LTC1272 should also beconnected to the ground plane. Thisground plane should have only oneconnection to the rest of the systemground. This prevents system-groundcurrents from taking a short cutthrough the analog ground. This singleconnection should be made to a pointon the ground plane near the DGNDpin.
The circuitry driving the analog in-put, AIN, must be referenced to thesingle-point ground near pin 3 of theADC. The analog signals should berouted away from all digital circuitry. Itis also a good idea to shield the analog
signal lines with analog ground wher-ever possible. Shielding digital signallines with digital ground also helpsreduce the magnetic radiation of thedigital currents by keeping the looparea of the digital return currents small(see Figure 8). For best analog perfor-mance, the input clock (CLKIN) shouldbe synchronous with the CS and RD-conversion start signals (for example,derive the CLKIN signal from the pro-cessor clock). This keeps digital-clocknoise from coupling into the input
when the sample-and-hold goes intohold mode.
Noise on the voltage reference has aunique signature: it contributes nonoise at zero-scale inputs but adds tothe converter noise increasingly as theADC output moves from zero scale tofull scale. To minimize reference noise,bypass the reference directly to theanalog ground plane with a 10µF tan-talum paralleled by a 0.1µF ceramicwith short leads (C1 and C2 of Figure 7).
Noise on the powersupply can also causeADC errors. At low fre-quencies, the converterhas very good power-sup-ply rejection, but as thefrequency increases, allconverters lose the abil-ity to reject power supplynoise. Unfrotunatelymost power-supply noiseis high frequency noise,so bypassing to eliminateit is critical. To eliminatepower-supply noise, the
VDD pin should be bypassed directly tothe analog ground plane with a 10µFtantalum in parallel with a 0.1µF ce-ramic with short leads (C3 and C4 ofFigure 7).
ConclusionWith the LTC1272, you can get a 2.5
times speed increase in designs whichuse other companies sampling AD7572clones. You can also upgrade yourstandard, non-sampling AD7572 de-signs or get 3µsec, single supply, sam-pling 12-bit conversion in your newdesigns.
For further information refer tothe LTC1272 data sheet and upcom-ing Application Notes and DesignNotes.
ART. 5, FIG. 8
dB dt
dI dt
ANALOG SECTION
DIGITAL SECTION
ANALOG INPUT
SIGNAL
ADC
AGNDAIN+
–
ART. 5, FIG. 7
AIN
AGND VREF VDD DGND
LTC1272 OR OTHER ADC DIGITAL SYSTEM
C1 C2 C3 C4
+
–
ANALOG GROUND PLANE
GROUND CONNECTION TO DIGITAL CIRCUITRY
ANALOG INPUT
CIRCUITRY
Figure 7. Noise on All Four of the Potential “Inputs” of an ADC Must beMinimized by Referencing Them to a Single Point Ground Plane
input-impedance differential inputs,both (+) and (–), and a CMRR in excessof 40dB at 10MHz. They function ineither single-ended or differential con-figurations, making them ideal for videoloop-through connections. The LT1193has adjustable gain set via two exter-nal resistors for AV ≥ 2, whereas theLT1194 has an internally fixed gain of±10.
Although the LT1193/94 video am-plifiers are similar in some respects tothe op amp family members, there aresome clear differences, as shown inFigure 3. To make a video differenceamplifier, another differential inputstage, consisting of Q3 and Q4, wasadded to the LT1190 op amp, as shownin the figure. This differential amplifieracts as a reference and feedback con-nection, freeing Q1 and Q2 to serve asthe uncommitted differential inputs.
In the LT1193, the feedback resis-tors are external, giving two sets of (+)and (–) inputs for signal input and gainadjustment/DC control, pin pairs 2-3and 1-8, respectively (plus the afore-mentioned shutdown option, at pin 5).
In the LT1194, the feedback resis-tors are internal, for a fixed gain of 10,
LT1191 is operated in a gain of –1, theinput step is from +3V to 0V, andsettling time to 0.1% is within 110ns.The observed output settling is not afalse sum node, but rather the trueoutput.
LT1190 Family MembersA specification summary of the en-
tire LT1190 family is detailed in Table1. Of the three op amps, the 50MHzunity-gain-stable LT1190 is most tol-erant of power-supply bypassing andcapacitive loading, but has slightlyless gain and more DC offset than theLT1191. The higher gain and loweroffset 90MHz LT1191 is also unity-gain stable, and produces only 0.1%differential gain and 0.06 degrees ofdifferential phase shift in 3.58MHzNTSC video use. For applications witha minimum gain of +5, the 350MHzLT1192 operates with even lower er-rors, and is well suited for high-gainapplications such as photo-diode am-plifiers.
Comparison of the LT1193 andLT1194 video difference amplifiers isnot adequately covered by the table, asthey have a unique functional topol-ogy that is unlike that of the op amps.These ICs have two uncommitted, high- continued on page 12
emitter follower, with a 10mA quies-cent current and the ability to slew a20pF load at over 450V/µs. The stagealso has an intrinsically low outputimpedance, about 2.5Ω open-loop atlow frequencies. For sinking more than10mA in the output stage, extra drivecurrent is supplied to Q11, from R4and Q10.
In addition, the LT1190/91/92/93include an optional logic-controlledshutdown feature. With pin 5 open,these devices operate in their normalmode. However, when this pin is pulledto the V– potential, the supply currentdrops to 1.3mA, and the output isforced into a high impedance state.The outputs of these amplifiers canthen be WIRE-OR connected, and se-lected with low cost logic for multiplex-ing video signals to a cable.
As with all amplifiers, LT1190 seriespower supply rejection degrades at highfrequency. To achieve minimum set-tling time, multiple low ESR/low in-ductance bypass capacitors should beused, such as 0.1µF ceramic discsparalleled by 4.7µF tantalums. In ad-dition, compact layout and ground-plane construction with appropriatehigh-frequency techniques should beused for best results. When pushingfor maximum bandwidth with the opamps, it also helps to use low feedbackimpedances for Rf and Rg, say, 300Ω,which reduces the effects of stray ca-pacitance on the (–) input.
The single-ended output design andthe overall attention to open-loop dou-blets results in very clean settling, asshown in Figure 2. For this test, an
–3V
ART. 3, FIG. 2
0V
V OUT
(1V/
DIV)
0V
VSETTLE (10m
V/DIV)
Figure 2: LT1191 settling from a 3V step.AV = –1
12 Linear Technology Magazine • October 1991
DESIGN FEATURES
+
–
OUTV
ART. 3, FIG. 3
3
2
6
V7 +
V–
1BAL/LIM
8BAL/LIM
5S/D (LT1193) REF (LT1194)
Q3 Q4Q2Q1
R1 R2
Q8Q7Q6
–FB1
+REF
(LT1193)(LT1194)
500 (LT1194)
4.5k (LT1194)
REFV LT1190LEVEL SHIFT + OUTPUT
8
4
IC6IC5
Q5
and the balance pins are externallyavailable at pins 1–8. Pins 1 and 8 canoptionally be used for either conven-tional DC-offset balancing, or for inputlimiting to prevent overload.
For use as a current mode limiter,the LT1194 input stage operates asfollows: The maximum allowable in-put signal is determined by the maxi-mum available current swing in R1.This is set for an input condition whichtilts the differential input stage com-pletely to one side, allowing either Ic5or Ic6 to develop voltage across R1. Byexternally shorting the balance pinstogether and raising them above the
V– rail, the currents in Q5 and Q6 arereduced, lowering the maximum dropacross R1, and thereby lowering themaximum input signal. Figure 4 dem-onstrates the effect of the limiting volt-age on the maximum output voltage.
Since no devices saturate in thislimiting process, the result is very fastand clean limiting, with the exact leveluser controllable. When Q1, Q2, Q5,and Q6 are completely turned off, theoutput-level, DC-loop integrity is main-tained through the feedback path ofQ3-Q4.
ApplicationsThe video loop-through connection
is a popular method of connectingdifferent pieces of equipment.Prior to its widespread use, theusual method of connectionwas the video distribution box,a “fan-out” method of signaldistribution. Although limitedin flexibility, this method didprovide proper cable termina-tion. In contrast, the loop-through connection distributessignals by a daisy chain ap-proach, passing the signalcontinuously to each subse-
Figure 3. The LT1194 has Adjustable Input Limiting Through the Balance Pins and FixedGain. The LT1193 has Shutdown Capability and User-Defined Gain
LT1190 continued from page 11
quent piece of equipment, with thelast site providing cable termination.At each tap along the loop, the signal islocally replicated by an amplifier, withminimal disturbance to the line.
Each tap location requires a videodifferential amplifier with good CMRRat high frequency. This is necessarybecause there are ground loops be-tween pieces of equipment, and highfrequency common mode noise is of-ten induced in the cable.
While a fast op amp and a well-matched resistor network can makesuch a differential amplifier, perfor-mance suffers with all but video-ratedop amps, such as the LT1191/92/93.A pair of current-feedback amplifiers,such as LT1223s1 can also be used tomake a differential amplifier, but at acost of two ICs plus the resistor net-work. In studio NTSC applications,where the high voltage swings of theLT1223 are not absolutely required, asingle video-difference IC is more effi-cient, as well as more cost-effective.
Figure 5 shows the LT1193 used ina unity-gain, loop-through connec-tion, with a -3dB bandwidth of 80MHz.The signal is distributed to each sub-sequent site, and the LT1193 is con-figured by RF and RG for a gain of 2,since back termination of the cableattenuates the signal by 6 dB. RT is thetermination resistor, with the output
continued on page 15
ART. 3, FIG. 5
ΩCABLE
VDC CONTROL
+5V
7
6LT1193
5
+
+
3
1
RL 75
–
–
2
8
ΩΩ
Ω
RT 75
RF 300
–5V
4
RG 300
SHUTDOWN
CABLE
Figure 5. Video Loop Through Connection with DCControl, –3dB Bandwidth is 80MHz
VOLTAGE ON BALANCE PINS (V)
–6–6
OUTP
UT V
OLTA
GE (V
)
–4
–2
0
2
4
6
–5 –4 –3 0
ART. 3, FIG. 4
–2 –1
V = 5VS ±
+LIMITING
–LIMITING
Figure 4. LT1194 Maximum Output Voltagevs Voltage on Balance Pins
Linear Technology Magazine • October 1991 13
DESIGN FEATURES
transmission of fs symbols in abandwidth (bw=B) of only fs/2Hertz. For a binary transmis-sion, where one symbol con-tains one bit, fb, the number ofbits-per-second is equal to thesymbol rate, fs. For “M-ary” sys-tems, such as four-level pulseamplitude modulation (PAM),each transmitted symbol con-tains n information bits, wheren = log2 M. In this case, thesymbol rate is fs= fb/n. Con-sider the example where it isrequired to transmit a 100Kb/sec. source (=fb). Theoretically, thiscould be accomplished with a channelbandwidth B = fs/2 = fb/2 = 50kHz.With the above mentioned four-levelPAM scheme the channel bandwidthis reduced to 25kHz = fs/2 = fb/4.
The Eye DiagramSince the perfect, low-passed trans-
mission channel does not exist, ameans must be found to evaluate chan-nel quality. The means is the so called“eye” diagram. The eye dia-gram is generated by the set-up shown in Figure 3.
Symbols transmittedthrough a theoretical chan-nel (Nyquist) have no degra-dation in amplituderesponse, and hence themeasured eye diagram open-
LTC1264-7 continued from page 4
ART. 1, FIG. 3
OSCILLOSCOPE WITH
PERSISTANCE
BANDLIMITED CHANNEL (FILTERS)
RANDOM DATA
SOURCE
BIT RATE CLOCK, fbTRIGGER INPUT
DATA
CLOCK
DATA
CLOCK
SAMPLE POINT
Figure 3. Eye Diagram Generation Circuitry and Data Timing
With this background,let’s look at some “eyeopening” diagrams to seehow we have optimizedthe LTC1264-7 filter forapplications in data com-munications.
Figures 4 and 5 showthe eye diagrams of theLTC1064-2 (eighth-orderButterworth LPF) and thenew LTC1264-7 linear-phase filter (sixth-orderelliptic LPF plus second-order, phase correction
network). It can be seen that if a digitalsystem switches at the midpoint in theeye diagrams, the bit-error rate (BER)will be higher for the eye diagram withthe smaller “eye opening.” The calcu-lation of inter-symbol interference deg-radation due to channel or filterimperfections is a measure of degra-dation in BER and is calculated:
Thus, it can be seen thatthe LTC1264-7 is a far supe-rior filter when used to maxi-mize channel efficiency in adigital system. However, westill need to look at theLTC1064-3 (eighth-orderBessel LPF) for comparison.
Figure 6 is the eye dia-gram of the LTC1064-3. This
ing of a real channel shows graphi-cally the “quality” of the transmissionchannel, which includes the low-passfilter inserted in the transmission path.It can be shown that the degradationin the eye opening is directly related tointer-symbol interference (the inter-ference in the detection of one symbolin the presence of another), and there-fore is a measure of the system’s bit-error rate. (see Feher)1
Vs (total, mode) 4–18V 1.8–44V 10–44V(single/dual) (single/dual) (dual)
Is (mA) 2.4 0.09 3.4
Gain-bandwidth (MHz) 2 0.37 35
SR (V/µs) 4 0.1 30
1 Unless otherwise stated, all specs are typical at Ta=25°C. Vs=±15V for LT1101/LT1102, and ±5V forLTC1100.2 A gain option of 10/100 is available in LTC1100CS (16-pin SOL).
LTC1100 continued from page 5
and LT1102. The 8-pin LTC1100 has afixed gain of 100, but makes the sum-ming points available for user connec-tions. The key specifications of thesethree devices are summarized inTable 1.
It is apparent from Table 1 that forthese three IA’s, there are no outputcontributions to input errors. Withdedicated IA’s or with the three-op-amp configuration, there are separatespecifications for input and outputoffset voltage, input and output driftand noise, and input and output power-supply rejection ratio. To calculatesystem errors, these input and outputterms must be combined. With the1100/01/02, these error calculationsare simple.
With these three IA choices, the usercan optimize performance for a varietyof factors. The LTC1100 operates withdual or single supplies ranging from 4Vto 18V, whereas the LTC1101 accepts asupply range of from 1.8V to 40V. In
some caveats apply to using it mosteffectively. One concern is AC CMRR.As noted in Figure 2, the first op amp (A)is configured for unity gain, while thesecond op amp (B) provides all of thevoltage gain. This has the effect of mak-ing the respective CMRR’s frequencymismatched, since the CMRR of thehigher-gain, “B” side corners at a muchlower frequency. The resulting differen-tial CMRR will therefore degrade morequickly with frequency than that of atopology with better AC balance. On theLT1102 this problem is resolved bydecompensating amplifier B to gain-of-ten stability. This increases slew rateand bandwidth, and also matches theCMRR roll-off with the frequencies ofthe two op amps when G = 10. At a gainof 100, this roll-off match no longerholds. However, connecting an 18pFcapacitor between pins 1 and 2 matchesthe CMRRs of the two sides and im-proves CMRR by an order of magnitudein the 300Hz-30kHz range (Figure 3).As shown on the LTC1100 and 1101data sheets, similar improvements canbe obtained from those devices by con-necting external capacitors.
The LTC1100 and LT1101 alsopresent some important usage consid-erations because of their single-sup-ply abilities, i.e., when operating withthe V– terminal tied to ground. In thisconfiguration, these devices handleCM inputs near ground and voltage
Figure 3. LT1102 Common-Mode RejectionRatio vs Frequency
continued on page 15
addition, the LT1101 consumes only100µA standby current. For applica-tions that require very low offset voltageand drift, the LTC1100 excels, with 1µVof offset and 5nV/°C drift. Where bothhigh speed and low bias current areimportant, the LT1102 is the IA ofchoice, albeit at a cost of slightly higherpower consumption and dual supplies.As can be seen from the table, all ofthese devices are outstanding with re-gard to gain accuracy, linearity andstability. The LTC1100, which is basedon a dual-chopper amplifier prototype(the LTC1051), is by far the best interms of offset and drift. Either theLTC1100 or the LT1102 could be theunit of choice in terms of lowest biascurrent, with the LT1102 gaining anedge at higher temperatures.
Application ConsiderationsWhile this IA type is generally out-
standing in terms of performance andsimplicity, independent of the op amps,
Linear Technology Magazine • October 1991 15
DESIGN FEATURES
LTC1155continued from page 7
(0 and 5 volts). For M-level systems,the increasedspectrum efficiencymeans greatersignal-to-noise ratios arerequired,necessitating the rolloff char-acteristics of filters like the LTC1264-7.
To conclude, the LTC1264-7 is alinear-phase, “better than Bessel,”switched-capacitor filter, optimized fordata communications applications.The filter will operate to a cutoff fre-quency of 200kHz while providing lin-ear phase through its passband. Thefilter can be used in satellite commu-nications, cellular phones, microwavelinks, ISDN networks and many othertypes of digital systems.
2. Feher, Kamilo, and Engineers of HewlettPackard Ltd. Telecommunications, Measure-ments, Analysis and Instrumentation.Englewood Cliffs, New Jersey: Prentice-Hall,Inc., 1987
3. Feher, Kamilo. Digital Communications:Satellite/Earth Station Engineering.Englewood Cliffs, New Jersey: Prentice-Hall,Inc., 1981
LT1190continued from page 12
appearing across load resistor RL. Useof the shutdown pin is optional, andthe output DC level can be adjusted ifdesired, by a voltage applied to the VDCinput. When this pin is grounded, theoutput is centered at 0 volts.
The low-cost LT1190 family of opamps and video difference amps willfind its way into many applications,including I/V converters, fast integra-tors, active filters, and photo-diodeamplifiers, in addition to tape and discdrive products and instrumentation.
1 See Bill Gross’ “The LT1223, a New HighSpeed Current Feedback Amplifier,” Linear Tech-nology, Volume 1, Number 1, June 1991.
LTC1264-7continued from page 13
diagram shows ISI degradation simi-lar to that of the LTC1264-7, withbetter jitter specifications. Althoughthe Bessel filter appears to be superiorfrom the viewpoint of the eye diagram,the reader should remember that theLTC1264-7 has far superior stopbandattenuation, meaning better attenua-tion of the carrier (at 27.5kHz in thisexample). This translates to better bit-error rates. The system user musttrade off ISI degradation, jitter, andstopband attenuation to ensure thebest channel performance. In addi-tion, remember that the eye diagramsshown here are for two-level systems
LT1100, LT1101 and LT1102continued from page 14
High Frequency OpAmp Design Hints
High speed operational amplifierdesign is a non-trivial task whichrequires careful layout, attention tostray capacitance, separation of in-put and output grounds and othertechniques which the casual designerof low frequency circuits is not famil-iar with.
Linear Technology now has twopublications which deal specificallywith the difficulties of designing withhigh speed operational amplifiers.
Application Note 47, an opus byJim Williams entitled “High SpeedAmplifier Techniques” contains nu-merous segments detailing problemsencountered in high speed circuitdesign. In addition to a section en-titled “Perspectives on High SpeedDesign” there is a section entitled“Mr. Murphy’s Gallery of High SpeedAmplifier Problems.” Williams alsoincludes a tutorial section which dis-cusses cables, probes, ground planesand other techniques which are es-sential to the proper design and char-acterization of high speed circuitry.Applications are, of course, also in-cluded in profusion on a variety oftopics including amplifiers, oscilla-tors, and data conversion. Applica-tion Note 47 is available upon requestfrom Linear Technology Corp.
Design Note 50 by Mitchell Leedescribes a High Frequency Ampli-fier Evaluation Board which is avail-able from LTC. Mitchell, in this Note,summarizes many of the techniqueswhich Williams describes in detail. Ademonstration circuit layout is alsoavailable for use in layout and/orbreadboarding of prototype circuitry.Design Note 50 is available uponrequest from LTC.
control the MOSFET gate voltage andmaintain a constant 5V at the output.
The regulator is switched ON andOFF by the control logic or the micro-processor to conserve power in thestandby mode. The LTC1155 standbycurrent drops to about 10µA when theinput is switched OFF. The total ONcurrent, including the LT1431, is lessthan 1mA.
swings to ground, and their referenceterminals can be tied to ground. One ofthe most common uses of these twoIA’s is as bridge amplifiers, in conjunc-tion with single-supply-powered DCstrain gauges. As such, these IA’s havea unique ability to deliver high gainwith precision, while operating with a1/2-supply-voltage CM input. At firstglance, it appears that a dual-supplyIA could operate, for example, on a 9Vbattery supply, with 4.5V common-mode input, but its output will notswing to ground, and its referenceterminal cannot be tied to ground.
For SPICE simulation purposes, amodel for the LT1101 is included in theLTC macromodel library. The model isconfigured as the resistor networkshown for the LT1101, combined with amodel for the LT1078. A similar model
for the LTC1100 can be made by scal-ing the four resistors appropriately,and using an LTC1051 model from thesame library. A close model approxi-mation for the LT1102 can be madewith the LT1102 resistor values, com-bined with an LT1057 model for the “A”side, and a LT1022 model for the “B”side (both also in the library).
16 Linear Technology Magazine • October 1991
DESIGN FEATURES
+
–A3
LT1006
ART. ?, FIG. ?
+
–
A2 CFA
1/2 LT1228
100Ω
10kRF INPUT 0.6VRMS-1.3VRMS
25MHz
300Ω
–15V
+15V
+
–
A1 OTA
1/2 LT1228
470Ω
10Ω
0.01
10k
0.01
+15V
–15V
4pF
10k
100k
AMPLITUDE ADJUST
10k 4.7k–15V
LT1004 1.2V
10k
OUTPUT 2Vp-p
1N4148’s COUPLE THERMALLY
ISET
nents, including the inductor, are sur-face mount devices. The SHUTDOWNinput turns off the converter, reduc-ing quiescent current to 300µA when
Flash memory chips such as theIntel 28F020 2Megabit device requirea Vpp program supply of 12 volts at30mA. A DC–DC converter may beused to generate 12 volts from the 5volt logic supply. The converter mustbe physically small, available in sur-face-mount packaging, and have logic-controlled shutdown. Additionally, theconverter must have carefully con-trolled rise time and zero overshoot.Vpp excursions beyond 14 volts for20ns or longer will destroy the ETOX1-process based device.
Figure 1’s circuit is well suited forproviding Vpp power for a single flashmemory chip. All associated compo-
L1 47 H
ART ? • FIG 1
µ
+
GND
SWSENSE
LT1109CS8-12
10 Fµ
V 12V 50mA
OUT
MBRL120
INVIN+V 5V
SHUTDOWN PROGRAM
SHUTDOWN*
* 8-PIN PACKAGE ONLY L1 = ISI LCS2414 OR TDK NLC2220-470K
Figure 1. All Surface Mount Flash MemoryVpp Generator
The RF input is applied to A1, anLT1228 operational transconduc-tance amplifier. A1’s output feeds A2,the LT1228’s current-feedback am-
plifier. A2’s output, the output of thecircuit, is sampled by the A3-basedgain control configuration. This ar-rangement closes a gain-control loopback at A1. The 4pF capacitor com-pensates rectifier diode capacitance,enhancing output flatness vs fre-quency. A1’s ISET input current con-trols its gain, allowing overall outputlevel control. This approach to RFleveling is simple and inexpensive,and provides low output drift anddistortion.
by Jim Williams
by Steve Pietkiewicz
Leveling loops are often a require-ment for RF transmission systems.More often than not, low cost is moreimportant than absolute accuracy.Figure 1 shows such a circuit.
RF Leveling Loop
Figure 1. Simple RF Leveling Loop
LT1109 Generates Vpp for FlashMemory
DESIGN IDEAS
pulled to a logic 0. Vpp rises in acontrolled fashion, reaching 12 volts±5% in under 4ms. Output voltagegoes to Vcc minus a diode drop whenthe converter is in shutdown mode.This is an acceptable condition forIntel flash memories and does notharm the memory.
1ETOX is a trademark of Intel Corporation.
Linear Technology Magazine • October 1991 17
DESIGN FEATURES
B = 5V/DIV
HORIZ = 100µs/DIVART ? • FIG 3
A = 500µV/DIV
10 SECONDS ART ? • FIG 2
50nV
+
–
100k
100kR1
R2Ω10
+
–
1k* 200*
450* 900*
+15
+15
–15
–15
0.02
A1 LTC1150
Q1, Q2 = 2x
2SK147 TOSHIBA
A2 LT1097
OPTIONAL OVER
COMPENSATION
OUTPUT
– INPUT
Q1
5
+ INPUT
* = 1% FILM RESISTOR750Ω*
10k
–15V
Q3 2N2907
Q2
Ultra-low Noise and Low DriftChopped-FET Amplifier
Figure 1’s circuit combines the ex-tremely low drift of a chopper-stabi-lized amplifier with a pair of low noiseFETs. The result is an amplifier with0.05µV/°C drift, offset within 5µV,100pA bias current and 50nV noise ina 0.1Hz–10Hz bandwidth. The noiseperformance is especially noteworthy;it is almost 35 times better than mono-lithic chopper-stabilized amplifiers.
FETs Q1 and Q2 differentially feedA2 to form a simple low-noise op amp.
Feedback, provided by R1 and R2, setsclosed-loop gain (in this case 10,000)in the usual fashion. Although Q1 andQ2 have extraordinarily low noise char-acteristics, their offset and drift areuncontrolled. A1, a chopper-stabilizedamplifier, corrects these deficiencies.It does this by measuring the differ-ence between the amplifier’s inputsand adjusting Q1’s channel currentvia Q3 to minimize the difference. Q1’sskewed drain values ensure that A1will be able to capture the offset. A1
and Q3 supply whatever current isrequired to force offset to within 5µVinto Q1’s channel. Additionally, A1’slow bias current does not appreciablyadd to the overall 100pA amplifier biascurrent. As shown, the amplifier is setup for a non-inverting gain of 10,000,although other gains and invertingoperation are possible. Figure 2 is aplot of the measured noise perfor-mance.
The FETs’ Vgs can vary over a 4:1range. Because of this, they must beselected for 10% Vgs matching. Thismatching allows A1 to capture theoffset without introducing any signifi-cant noise.
Figure 3 shows the response (traceB) to a 1mV input step (trace A). Theoutput is clean, with no overshoots oruncontrolled components. If A2 is re-placed with a faster device (e.g. LT1055)speed increases by an order of magni-tude with similar damping. A2’s op-tional overcompensation can be used(capacitor to ground) to optimize re-sponse for low closed loop gains.
by Jim Williams
Figure 1. Chopper Stabilized FET Pair Combines Low Bias, Offset and Drift with 45nV Noise
Figure 3. Step Response for the Low Noise +10,000Amplifier. A 10x Speed Increase is Obtainable by ReplacingA2 with a Faster Device
Figure 2. 45nV Noise Performance for Figure 1. A1’s Low Offset andDrift are Retained, but Noise is Almost 35 Times Better
DESIGN IDEAS
18 Linear Technology Magazine • October 1991
DESIGN FEATURES
by LTC Marketing
LT1027 High-Accuracy 5VReference
The LT1027 is the industry’s mostprecise 5V reference. The LT1027Cgrade provides 0.05% maximum ini-tial accuracy and 3 ppm/°C maximumoutput-voltage drift with temperature.The LT1027D grade has 0.05% maxi-mum initial accuracy, with 5 ppm/°Cmaximum temperature drift. TheLT1027E grade provides 0.1% maxi-mum initial accuracy, and 7.5 ppm/C° maximum temperature drift. Allthree grades improve upon the indus-try-standard precision 5V reference,the LT1021-5. This high level of perfor-mance is obtained without the use of apower-hungry heated substrate.
In addition to excellent accuracyand drift performance, the LT1027provides 2µs settling to 0.01%. Set-tling time can be improved to 500ns byconnecting a 4.7µF tantalum capaci-tor between VOUT and ground.
The LT1027 reference voltage is de-rived from a buried-zener reference,which provides excellent low-noisecharacteristics (10Hz to 1kHz noise is2µV RMS) and excellent long-term sta-bility (20 ppm/month for the TO-5package). Connecting a 1µF capacitorbetween the noise reduction (NR) pinand ground reduces 10Hz to 1kHznoise to 1.2µV RMS. The LT1027 guar-antees a ±30mV trim range with a 10ktrimpot. Unlike previous references,trimming doesn’t affect the tempera-ture coefficient of the device.
The LT1082 is a 60kHz switchingvoltage regulator, designed for high-voltage, low-current applications suchas isolated and non-isolated –48V to5V telecom supplies. All control cir-cuitry and a high-efficiency 1A powerswitch are included in a compact 8-pinminidip, 5-lead TO-220, or 5-lead TO-3 package. The LT1082 utilizes cur-
New Device CameosThe LT1124 and LT1125 have loweroffset voltage and bias current andhigher slew rate, bandwidth, and gainthan the OP270 and OP470 devicesComparable specifications are im-proved by a factor of two, not just a fewpercent.
Decompensated versions of thesedevices are also available. The LT1126dual and LT1127 quad are stable inclosed-loop gains of ten or more. Theslew rate of the LT1126/27 is 2.5times faster and the gain-bandwidthproduct is four times higher than thoseof the LT1124/25. Thus, the LT1126/27 can upgrade systems using thedecompensated OP37 single op amp.
LT1228 100MHz Current Feed-back Amplifier with DC GainControl
The LT1228 is the first monolithicvideo amplifier with electronic gaincontrol. The 8-pin packaged LT1228uses a 75MHz transconductance am-plifier and 100MHz current feedbackamplifier to realize AGC amplifiers,tunable filters, sinewave oscillators,audio and video mixers, audio andvideo faders, and DC restore circuits.A differential input, DC gain controlledamplifier is easily made with theLT1228 and just a few resistors. Now itis possible to locate gain trim pots atthe front of professional video equip-ment without having to route the videosignals all over the PC board.
The variable gain transconductanceamplifier is the heart of the LT1228and it has over a 60dB of gaincontrol range. The output of thetransconductance amplifier is bufferedby the built in current feedback ampli-fier for an output drive current capa-bility of 30mA. The current feedbackamplifier is optimized for video perfor-mance; when driving a cable, the dif-ferential gain is only 0.04% and thedifferential phase is 0.10 degrees. Whendriving an A to D converter these specsimprove to 0.01% and 0.01 degrees!
rent-mode switching techniques to ob-tain excellent AC and DC line and loadregulation. The LT1082 operates in allstandard switching topologies. In theisolated-flyback mode the LT1082senses the primary-flyback voltage toregulate output voltage, without theneed of an optoisolator.
The LT1082 can provide 5V at 800mAfrom –48V, while consuming only 4.5mAquiescent current. The LT1082 fea-tures a high maximum-input voltage of75V and a maximum switch voltage of100V, making it ideal for isolated andnon-isolated –48V to +5V converters.The LT1082 can easily be shutdown to120µA supply current. When the out-put is shorted, the LT1082 lowers itsoperating frequency from 60kHz to16kHz to protect the outputs, even with70 volts at the input.
LT1124, LT1126 Dual and LT1125,LT1127 Quad Low-Noise Op Amps
Linear Technology’s new LT1124dual and LT1125 quad low-noise, high-speed, precision operational amplifi-ers outperform the industry standardOP27 single op amp as well as theOP270 dual and OP470 quad op ampsthey are designed to replace. The indi-vidual amplifiers in each LT1124 andLT1125 are 100% tested for inputvoltage noise (4.2 nV/root Hz maxi-mum), something that has not beendone with their predecessors. TheLT1124 is the first low-noise, high-speed, precision dual op amp to beoffered in the 8-pin, small-outline sur-face-mount package.
Usually, dual and quad performanceis inferior to that of single op amps dueto the difficulty of designing and manu-facturing multiple op amps. In thiscase the performance is better. TheLT1124 and LT1125 have faster slewrate and greater bandwidth, lowerbias and offset currents, and highergain than the OP27. The total supplycurrent of the dual LT1124 is less thanthe supply current of the OP27 single.
NEW DEVICE CAMEOS
Linear Technology Magazine • October 1991 19
DESIGN FEATURES
MOS output transistors, to maintain ahigh impedance state when the out-puts are forced up to 7V beyond thesupply rails or when the device is off.This crucial RS485 specification al-lows for a ±7V common-mode voltagebetween drivers on an interface line.Output-current limit and full thermal-overload protection are incorporatedon all LTC RS485 products. The fullline is offered in DIP and surface-mount packages for use over the com-mercial and industrial temperatureranges.
LT1229/30 Dual and QuadCurrent-Feedback Amplifiers
The LT1229 is a dual current-feed-back amplifier that provides 100MHzbandwidth, 1000V/µs slew rate, and30mA minimum output drive capabil-ity, in a space-saving 8-lead DIP or 8-lead SOIC package. The LT1229 settlesto 0.1% in 45ns and draws 6mA sup-ply current per amplifier. The LT1229operates on supplies ranging from ±2Vto ±15V with an input-voltage rangeand output swing to within 1.5V of thesupply rails. The LT1230 quad offersthe same performance as the LT1229in a 14-pin DIP or 14-pin SOIC pack-age. Both the LT1229 and LT1230 areoptimized for video performance. Thedifferential gain and phase are only0.04% and 0.1 degrees when driving a75Ω cable and drop to 0.01% and 0.01degrees when driving flash A to Dconverters.
The LT1229’s and LT1230’s 25MΩinput impedance and 30mA minimumoutput drive make the devices usefulas buffers and video instrumentationamplifiers, and excellent for generalhigh-speed cable-driving applications.
low THD (less than 0.02%) in a com-pact 14-pin package. No external re-sistors are required to realize the filterfunctions. Cutoff frequencies up to20kHz (±7.5V supplies) or up to 10kHz(±5V supplies) can be achieved.
The LTC1164-5 can be configuredeither as an 8th-order Butterworth(100:1 or 50:1 clock to cutoff frequencyratio), or as an 8th-order Bessel (150:1clock ratio) low pass filter. TheLTC1164-6 is an 8th-order elliptic lowpass filter with 64dB attenuation at1.45 times the cutoff frequency at a100:1 clock to cutoff frequency ratio.Both the LTC1164-5 and the -6 canoperate on a single 5V supply with a 1VRMS input signal. Typical applica-tions for the LTC1164-5 and LTC1164-6 include low-power data-acquisitionsystems, battery-powered instru-ments, and telecommunications.
CMOS RS485 Interface Family
LTC’s growing family of RS485 in-terface devices now includes sevenmembers that are compatible withindustry-standard pinouts and achievesignificant power savings. The firstmember, the LTC485 half-duplextransceiver, reduces power consump-tion by 60X when dropped into 75176sockets, for applications up to 2.5MHz.The LTC486 and LTC487 quad-differ-ential line drivers draw only 200µAmaximum supply current, and directlyreplace the 75172 and 75174 quaddrivers for applications up to 10MHz.Their companion differential line re-ceivers, the LTC488 and LTC489, dropinto 75173 and 75175 sockets to ob-tain a 10X power reduction and datarates up to 10MHz. For full-duplex, 4-wire RS485 interface applications, LTCoffers the LTC490 and LTC491 full-duplex transceivers which directly re-place the 75179 and 75ALS180transceivers with at least a 60X powersavings. The LTC490 and LTC491 sup-port data rates up to 5MHz. All LTCCMOS RS485 line drivers drive cablesof up to 4000 feet at slower data rates.
All members of the LTC CMOSRS485 family utilize a unique fabrica-tion process and design that placesSchotkey diodes in series with the
These features and the wide supplyrange of ± 2V (4V total) to ±15V (30Vtotal) make it easy to use the LT1228 inalmost any system.
In RGB and other computer videosystems, the excellent transient re-sponse of the current feedback ampli-fier eliminates smearing (rise time isonly 3.5ns). The DC control to theLT1228 is a current to simplify theinterfacing of remotely located controlcircuitry.
The LT1228 is available in 8-pindual-in-line plastic and ceramic pack-ages as well as the 8-pin small outlinepackages. Military, industrial and com-mercial temperature range versionsare available.
LTC1046 50mA Switched-Capacitor Voltage Converter
Our newest switched-capacitor volt-age converter, the LTC1046, is de-signed for voltage inversion anddoubling in 3–6V battery-powered sys-tems, where voltage loss and quies-cent current are critical. The LTC1046’soutput resistance of only 35Ω maxi-mum translates to a 65% reduction involtage loss compared to the LTC1044and ICL7660. The LTC1046 does thiswhile consuming only 300µA maxi-mum supply current. The LTC1046provides a power-conversion efficiencyof 97% and a voltage-conversion effi-ciency of 99.9% (no load). Oscillatorfrequency is nominally 30kHz whenoperating on a 5V supply, and can beincreased with use of a boost pin tooptimize efficiency for a particular ap-plication. The LTC1046 is functionallyand pin-for-pin compatible with theLTC1044 and the ICL7660, but pro-vides 2.5 times the drive capability for6V and lower voltage conversion appli-cations.
LTC1164-5 8th-Order Butterworthor Bessel and LTC1164-6 8th-OrderElliptic Low Pass Filters
The LTC1164-5 and LTC1164-6 of-fer the user low supply currents (4mAwith ±5V supplies), low wide-band noise(100µV RMS for the LTC1164-5 and120µV RMS for the LTC1164-6), and
Information furnished by Linear Technology Corporationis believed to be accurate and reliable. However, noresponsibility is assumed for its use. Linear TechnologyCorporation makes no representation that theinterconnection of its circuits as described herein will notinfringe on existing patent rights.
For further information on the aboveor any other devices mentioned in thisissue of Linear Technology, use thereader service card or call the LTCliterature service number, (800) 637-5545. Ask for the pertinent data sheetsand application notes.
NEW DEVICE CAMEOS
20 Linear Technology Magazine • October 1991
DESIGN FEATURES
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Linear Technology Corporation1630 McCarthy BoulevardMilpitas, CA 95035-7487Phone: (408) 432-1900FAX: (408) 434-0507Telex: 499-3977
Applications on DiskNOISE DISKThis IBM-PC (or compatible) progam allows the user tocalculate circuit noise using LTC op amps, determine thebest LTC op amp for a low noise application, display thenoise data for LTC op amps, calculate resistor noise, andcalculate noise using specs for any op amp.
SPICE MACROMODEL DISKThis IBM-PC (or compatible) high density diskette containsthe library of LTC op amp SPICE macromodels. Themodels can be used with any version of SPICE for generalanalog circuit simulations. The diskette also contains work-ing circuit examples using the models, and a demonstrationcopy of PSPICETM by MicroSim.
FILTERCAD DISKFilterCAD is a menu-driven filter design aid program whichruns on IBM-PCs (or compatibles). This collection of designtools will assist in the selection, design, and implementationof the right switched capacitor filter circuit for the applicationat hand. Standard classical filter responses (Butterworth,Cauer, Chebyshev, etc.) are available, along with a CUS-TOM mode for more esoteric filter responses. SAVE andLOAD utilities are used to allow quick performance com-parisons of competing design solutions. GRAPH mode,with a ZOOM function, shows overall or fine detail filterresponse. Optimization routines adapt filter designs forbest noise performances or lowest distortion. A design timeclock even helps keep track of on-line hours.
Technical BooksLinear Databook — This 1,600 page collection of datasheets covers op amps, voltage regulators, references,comparators, filters, PWMs, data conversion and interfaceproducts (bipolar and CMOS), in both commercial andmilitary grades. The catalog features well over 300 devices.$10.00
Linear Applications Handbook — 928 pages chock full ofapplication ideas covered in-depth through 40 ApplicationNotes and 33 Design Notes. This catalog covers a broadrange of “real world” linear circuitry. In addition to detailed,systems-oriented circuits, this handbook contains broadtutorial content together with liberal use of schematics andscope photography. A special feature in this edition in-cludes a 22-page section on SPICE macromodels.$20.00Monolithic Filter Handbook — This 232 page book comeswith a disk which runs on PCs. Together, the book and diskassist in the selection, design and implementation of theright switched capacitor filter circuit. The disk containsstandard filter responses as well as a custom mode. Thehandbook contains over 20 data sheets, Design Notes andApplication Notes. $40.00
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