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Low Density Parity Check (LDPC) Code Implementation

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Low Density Parity Check (LDPC) Code Implementation. Matthew Pregara & Zachary Saigh Advisors: Dr. In Soo Ahn & Dr. Yufeng Lu Dept. of Electrical and Computer Eng. Contents. Background and Motivation Linear Block Coding Example Hard Decision Tanner Graph Decoding Constructing LDPC Codes - PowerPoint PPT Presentation
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Low Density Parity Check (LDPC) Code Implementation Matthew Pregara & Zachary Saigh Advisors: Dr. In Soo Ahn & Dr. Yufeng Lu Dept. of Electrical and Computer Eng.
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Page 1: Low Density Parity Check (LDPC) Code Implementation

Low Density Parity Check(LDPC) Code Implementation

Matthew Pregara & Zachary Saigh

Advisors: Dr. In Soo Ahn & Dr. Yufeng Lu

Dept. of Electrical and Computer Eng.

Page 2: Low Density Parity Check (LDPC) Code Implementation

2

Contents Background and Motivation

Linear Block Coding Example

Hard Decision Tanner Graph Decoding

Constructing LDPC Codes

Soft Decision Decoding

Results

Conclusion

Page 3: Low Density Parity Check (LDPC) Code Implementation

3

Background ARQ: Automatic Repeat Request

Detects errors and requests retransmission

Example: Even or Odd Parity

FEC: Forward Error Correction Detects AND Corrects Errors

Examples: Linear Block Coding

Turbo Codes

Convolutional Codes

Page 4: Low Density Parity Check (LDPC) Code Implementation

Why LDPC?

Low decoding complexity

Higher code rate

Better Error performance

Industry standard for: 802.11n Wi-Fi

Digital Video Broadcasting

WiMAX and 4G

4

Page 5: Low Density Parity Check (LDPC) Code Implementation

Performance Comparison

5

(taken from [1])

Page 6: Low Density Parity Check (LDPC) Code Implementation

Project Goals Create LDPC code system simulation with

MATLAB/Simulink

Implement a scaled down LDPC system on a FPGA using Xilinx System Generator

Complete System performance comparison between MATLAB/Simulink and FPGA implementation

6

Page 7: Low Density Parity Check (LDPC) Code Implementation

7

Linear Block Coding Block Codes are denoted by (n, k).

k = message bits (message word)

n = message bits + parity bits (coded bits)

# of parity bits: m = n - k

Code Rate R = k/n

Ex: (7,4) code

4 message bits

+3 parity bits

= 7 coded bits

Code rate R = 4/7

Page 8: Low Density Parity Check (LDPC) Code Implementation

8

Hamming Code Example

G(encoder matrix)

+ u m

e

rH’

(decoder matrix)

+

e

r u’

Error Lookup TableS

e = error patternm = message bit wordu = code wordr = received code word with errorS = syndromeu’ = corrected code wordm’ = received message word

Remove Parity bits m’

ChannelTransmitter Receiver

Page 9: Low Density Parity Check (LDPC) Code Implementation

9

Constructing Hamming Code

Factor xn +1

Populate G matrix (k x n) with shifted factor

Take reduced row echelon form to find

Systematic G matrix from G matrix

H matrix is obtained by manipulating the

systematic G matrix.

Page 10: Low Density Parity Check (LDPC) Code Implementation

10

Encoding Example

101

111

110

011

1000

0100

0010

0001

1101

321 ppp1101

1111mmmp 4311 0101mmmp 3212 0110mmmp 4323

0011101

Page 11: Low Density Parity Check (LDPC) Code Implementation

11

Decoding

1 2 3 4 1 2 3

1 1 0

0 1 1

1 1 1

m m m m p p p 1 0 1

1 0 0

0 1 0

0 0 1

1 2 3

1 1 3 4 1

2 1 2 3 2

3 2 3 4 3

m m m p

m m m p

m m m p

S S S

S

S

S

S = rcvd. code word × HT

Page 12: Low Density Parity Check (LDPC) Code Implementation

12

Correcting Errors

0 1 1S

In this case the 2nd bit is corrupted Invert the corrupted bit according to the

location found by the syndrome table

0011101

0000010

0011111

Page 13: Low Density Parity Check (LDPC) Code Implementation

13

Tanner Graph and Hard Decision Decoding

C1

C2

C3

V1

V2

V3

V4

V5

V6

V7

V8

C4

01011001

11100100

00100111

10011010

H

(2458)

(1236)

(3678)

(1457)

(8,4) Example

87654321 VVVVVVVV

4

3

2

1

C

C

C

C

Page 14: Low Density Parity Check (LDPC) Code Implementation

14

Hard Decision Decoding

C1

C2

C3

V1

V2

V3

V4

V5

V6

V7

V8

C4

1

0

1

0

1

0

1

1CheckNodes

Activities

C1

Receive V2→ 1 V4→ 1 V5→ 0 V8→ 1

Send 0 → V2 0 → V4 1 → V5 0 → V8

C2

Receive V1→ 1 V2→ 1 V3→ 0 V6→ 1

Send 0 → V1 0 → V2 1 → V3 0 → V6

C3

Receive V3→ 0 V6→ 1 V7→ 0 V8→ 1

Send 0 → V3 1 → V6 0 → V7 1 → V8

C4

Receive V1→ 1 V4→ 1 V5→ 0 V7→ 0

Send 1 → V1 1 → V4 0 → V5 0 → V7

Page 15: Low Density Parity Check (LDPC) Code Implementation

15

Hard Decision Decoding

C1

C2

C3

V1

V2

V3

V4

V5

V6

V7

V8

C4

1

0

1

0

1

0

1

1CheckNodes

Activities

C1

Receive V2→ 1 V4→ 1 V5→ 0 V8→ 1

Send 0 → V2 0 → V4 1 → V5 0 → V8

C2

Receive V1→ 1 V2→ 1 V3→ 0 V6→ 1

Send 0 → V1 0 → V2 1 → V3 0 → V6

C3

Receive V3→ 0 V6→ 1 V7→ 0 V8→ 1

Send 0 → V3 1 → V6 0 → V7 1 → V8

C4

Receive V1→ 1 V4→ 1 V5→ 0 V7→ 0

Send 1 → V1 1 → V4 0 → V5 0 → V7

Update

Page 16: Low Density Parity Check (LDPC) Code Implementation

1616

Hard Decision Decoding

C1

C2

C3

V1

V2

V3

V4

V5

V6

V7

V8

C4

1

0

1

0

1

0

1

1CheckNodes

Activities

C1

Receive V2→ 1 V4→ 1 V5→ 0 V8→ 1

Send 0 → V2 0 → V4 1 → V5 0 → V8

C2

Receive V1→ 1 V2→ 1 V3→ 0 V6→ 1

Send 0 → V1 0 → V2 1 → V3 0 → V6

C3

Receive V3→ 0 V6→ 1 V7→ 0 V8→ 1

Send 0 → V3 1 → V6 0 → V7 1 → V8

C4

Receive V1→ 1 V4→ 1 V5→ 0 V7→ 0

Send 1 → V1 1 → V4 0 → V5 0 → V7

Update

Page 17: Low Density Parity Check (LDPC) Code Implementation

171717

Hard Decision Decoding

C1

C2

C3

V1

V2

V3

V4

V5

V6

V7

V8

C4

1

0

1

0

1

0

1

1CheckNodes

Activities

C1

Receive V2→ 1 V4→ 1 V5→ 0 V8→ 1

Send 0 → V2 0 → V4 1 → V5 0 → V8

C2

Receive V1→ 1 V2→ 1 V3→ 0 V6→ 1

Send 0 → V1 0 → V2 1 → V3 0 → V6

C3

Receive V3→ 0 V6→ 1 V7→ 0 V8→ 1

Send 0 → V3 1 → V6 0 → V7 1 → V8

C4

Receive V1→ 1 V4→ 1 V5→ 0 V7→ 0

Send 1 → V1 1 → V4 0 → V5 0 → V7

Update

Page 18: Low Density Parity Check (LDPC) Code Implementation

18

Variable Node DecisionsVariable Nodes yi Messages from Check Nodes Decision

V1 1 C2 → 0 C4 → 1 1

V2 1 C1 → 0 C2 → 0 0

V3 0 C2 → 1 C3 → 0 0

V4 1 C1 → 0 C4 → 1 1

V5 0 C1 → 1 C4 → 0 0

V6 1 C2 → 0 C3 → 1 1

V7 0 C3 → 0 C4 → 0 0

V8 1 C1 → 0 C3 → 1 1

Page 19: Low Density Parity Check (LDPC) Code Implementation

19

Differences of LDPC Code

Construct H matrix first

H is sparsely populated with 1s

Fewer edges → less computations

Find the systematic H and G matrices

G will not be sparse

Page 20: Low Density Parity Check (LDPC) Code Implementation

Soft Decision Decoding

Uses Tanner Graph representation with an iterative process

No “hard-clipping” of received code word 2dB performance gain over hard decision [2]

20

Page 21: Low Density Parity Check (LDPC) Code Implementation

21

Encoder Matrix

G+ u m

e

r LDPCDecoder u’

e = error patternm = message bit wordu = code wordr = received code word with errorS = syndromeu’ = corrected code wordm’ = received message word

Remove Parity bits m’

ChannelTransmitter Receiver

High Level LDPC System Block Diagram

Page 22: Low Density Parity Check (LDPC) Code Implementation

22

Soft Decision Decoder Diagram

Page 23: Low Density Parity Check (LDPC) Code Implementation

23

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

1

1

2

2

3

3

4

4

5

5

6

7

8

9

10

Page 24: Low Density Parity Check (LDPC) Code Implementation

24

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-1.5320

-0.3289

5.7602

1

Page 25: Low Density Parity Check (LDPC) Code Implementation

2525

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-1.5320

-0.3289

5.7602

1

Page 26: Low Density Parity Check (LDPC) Code Implementation

262626

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

1

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-1.5320

-0.3289

5.7602

SUM

-1.5320

Update Algorithm

Page 27: Low Density Parity Check (LDPC) Code Implementation

27272727

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

1

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-1.5320

5.7602

SUM

-0.3289

Update Algorithm

-0.3289

Page 28: Low Density Parity Check (LDPC) Code Implementation

28282828

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

1

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-1.5320

-0.3289

5.7602

This Updated Value is Sent back to Variable Node 1

SUM

5.7602

Update Algorithm

0.2096

0.2096

Page 29: Low Density Parity Check (LDPC) Code Implementation

2929

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-0.3289

5.7602

-7.11158

1

Page 30: Low Density Parity Check (LDPC) Code Implementation

303030

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

12

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

5.7602

-7.11158

-1.5320

1

Page 31: Low Density Parity Check (LDPC) Code Implementation

31313131

-7.11158

-1.5320

-0.3289

5.7602

2.7111

0.4997

-5.1652

1.5357

-5.0942

1.2526

2

2

3

3

4

4

5

5

6

7

8

9

10

Re-Calculate Each Edge

-7.11158

-1.5320

-0.3289

1

1

Page 32: Low Density Parity Check (LDPC) Code Implementation

Decoding Algorithm

32

Difficult to implement on a FPGA Solutions:

Find an approximation Construct lookup table

Phi function:

Page 33: Low Density Parity Check (LDPC) Code Implementation

Lookup table Approach

33

Note: all inputs are >=0

Page 34: Low Density Parity Check (LDPC) Code Implementation

Simulation Results

34

Page 35: Low Density Parity Check (LDPC) Code Implementation

Simulink LDPC System

35

Page 36: Low Density Parity Check (LDPC) Code Implementation

36Encoder Comparison

Page 37: Low Density Parity Check (LDPC) Code Implementation

Encoder with Xilinx blocks

38

Page 38: Low Density Parity Check (LDPC) Code Implementation

38

Co-Simulation Results

Page 39: Low Density Parity Check (LDPC) Code Implementation

39

Xilinx LDPC Decoder

Page 40: Low Density Parity Check (LDPC) Code Implementation

40

Decoder Control Logic

Page 41: Low Density Parity Check (LDPC) Code Implementation

41

Check Node Implementation

Page 42: Low Density Parity Check (LDPC) Code Implementation

42

Conclusion MATLAB/Simulink simulation of LDPC system has been

completed.

An efficient approximation of decoding algorithm has been

developed for hardware implementation.

Xilinx System generator design for the decoder has been

constructed.

Comparison and verification has not been completed for

those results from MATLAB and Xilinx system generator.

FPGA implementation and a scaled up system may not be

completed.

Page 43: Low Density Parity Check (LDPC) Code Implementation

43

References[1] Valenti, Matthew. Iterative Solutions Coded Modulation Library

Theory of Operation. West Virginia University, 03 Oct. 2005. Web. 23 Oct. 2012. <www.wvu.edu>.

[2] B. Sklar, Digital Communications, second edition: Fundamentals and Applications, Prentice-Hall, 2000.

[3] Xilinx System Generator Manual, Xilinx Inc. , 2011.

Page 44: Low Density Parity Check (LDPC) Code Implementation

Questions?

44

Page 45: Low Density Parity Check (LDPC) Code Implementation

Appendix

45

Page 46: Low Density Parity Check (LDPC) Code Implementation

Matrix Manipulation

46

Page 47: Low Density Parity Check (LDPC) Code Implementation

Reducing Decoding Complexity

Square_add function: y = max_star(L1,L2) - max_star(0, L1+L2);

MAX* function: if (L1==L2)

y = L1;

return;

end;

y = max(L1,L2) + log(1+exp(-abs(L1-L2)));

end;

47

Page 48: Low Density Parity Check (LDPC) Code Implementation

Reducing Decoding Complexity This: y = max(L1,L2) + log(1+exp(-abs(L1-L2)));

Becomes Approximated MAX* function: x = -abs(L1-L2);

if ((x<2) && (x>=-2))

y = max(L1,L2) + 3/8;

else

y = max(L1,L2);

end;

No costly log function

48

Page 49: Low Density Parity Check (LDPC) Code Implementation

In Practice

49

Using MATLAB’s Code Profiler…

MAX* function takes: 25.85s of simulation

Approx. MAX* function takes: 28.02s of equally sized simulation

Difference of 2.17s

Page 50: Low Density Parity Check (LDPC) Code Implementation

Simulation Results

50

(10,5) Code 1000 codewords

per datapoint, or 10,000 bits

Page 51: Low Density Parity Check (LDPC) Code Implementation

Timeline

Jan 28, 2013 May 15, 2013

Feb 1, 2013 Mar 1, 2013 Apr 1, 2013 May 1, 2013

Apr 15, 2013 - Apr 19, 2013Student Expo

Feb 11, 2013MATLAB Implementation

Feb 25, 2013Performance Analysis

Mar 4, 2013Xilinx System Generator Model

Apr 2, 2013FPGA Implementation

May 9, 2013 - May 15, 2013Project Presentations

Mar 29, 2013Student Expo Abstract Due

Apr 21, 2013Design Scaling

50

Page 52: Low Density Parity Check (LDPC) Code Implementation

Division of LaborZack

Simulink Model Xilinx System

generator design of decoder

Implementation of VHDL on FPGA

Performance analysis of FPGA implementation

Matt MATLAB Simulation Error Performance

Analysis Xilinx System

generator design of encoder

Performance analysis of MATLAB/Xilinx implementation

52


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