Department of
Engineering Technology
LSN 5
Combinational Logic
ECT 224 Digital Computer Fundamentals
ECT 224 Digital Computer [email protected]
LSN 5 – AND-OR Logic
• Direct implementation of a SOP expression
ECT 224 Digital Computer [email protected]
LSN 5 – AND-OR-Invert Logic
• Direct implementation of a POS expression
ECT 224 Digital Computer [email protected]
LSN 5 – Truth Tables to Gates
• Recall
– Where X = 1, OR product terms for standard SOP
– Where X = 0, AND sum terms for standard POS
_
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 1
1 1 1 0
ABC
ABC
ABC
___
X = ABC + ABC + ABC_ _ _
ECT 224 Digital Computer [email protected]
LSN 5 – Truth Tables to Gates
• Example:
– Reduce to a minimum form and find the associated logic
circuit
A B C X
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 1
ECT 224 Digital Computer [email protected]
LSN 5 – NAND and NOR Gates
• Universal Property of NAND and NOR Gates
– NAND
• Universal gate because it can be used as a functional replacement for
the NOT, AND, NOR, and OR logic functions
– NAND → NOT
– NAND → AND
ECT 224 Digital Computer [email protected]
LSN 5 – NAND and NOR Gates
– NOR
• Can also be used to represent all logic functions
– NOR → NOT
– NOR → OR
ECT 224 Digital Computer [email protected]
LSN 5 – NAND and NOR Gates
– Examples:
• Depict the following logical expressions using the desired logic gate
NAND or NOR
X = A + B using NAND
X = AB using NOR
_
_
ECT 224 Digital Computer [email protected]
LSN 5 – Functions of Combinational Logic
• Adders
• Comparators
• Decoders
• Encoders
• Multiplexers
• Demultiplexers
ECT 224 Digital Computer [email protected]
LSN 5 – Half Adders
0 + 0 = 0
0 + 1 = 1
1 + 0 = 1
1 + 1 = 1 0
carry
sum
ECT 224 Digital Computer [email protected]
LSN 5 – Full Adders
A B Cin Cout Sum
0 0 0 0 0
0 0 1 0 1
0 1 0 0 1
0 1 1 1 0
1 0 0 0 1
1 0 1 1 0
1 1 0 1 0
1 1 1 1 1
ECT 224 Digital Computer [email protected]
LSN 5 – Parallel Binary Adders
• A full adder is required for each bit in the numbers
being added
• For the LSB a half adder can be used or a full adder
with the carry-in input grounded (0)
101
+ 011
A
B
ECT 224 Digital Computer [email protected]
LSN 5 – Comparators
• Determine equality between two binary numbers
– Recall the exclusive-OR equals 1 when the inputs are not
equal
A B X
0 0 0
0 1 1
1 0 1
1 1 0
ECT 224 Digital Computer [email protected]
LSN 5 – Comparators
• To determine equality between two binary numbers
with greater than two digits
– Use one exclusive-Or gate per digit
– AND the complimented output of the exclusive-OR gates
ECT 224 Digital Computer [email protected]
LSN 5 – Comparators
• To determine inequality between two binary numbers
– Examine each bit starting at the highest order bit
• The first bit that the numbers are not equal, the number that has a one
at this bit location is the larger number
– Example:
A = 1011 A = 1101
B = 1010 B = 1011
ECT 224 Digital Computer [email protected]
LSN 5 – Comparators
• Comparator ICs provide comparison outputs for a
fixed number of bits
– Some comparators contain cascading inputs to increase the
number of bits that can be compared
– Example:
• Show a comparison circuit for the two 8-bit numbers 11001010 and
11001110
ECT 224 Digital Computer [email protected]
LSN 5 – Decoders
• Detect when a particular bit pattern is located
• Uses an AND gate to detect bit pattern
– All bit positions containing 0s must first be inverted
– Example:
Show the circuit for a detector for the bit pattern 0110
ECT 224 Digital Computer [email protected]
LSN 5 – Decoders
• 4-bit decoders
– For 4 inputs there are 24 input combinations
– Each input combination will activate one unique output
• Referred to as a 1-of-16 decoder / 4-line-to-16-line decoder
ECT 224 Digital Computer [email protected]
LSN 5 – Decoders
• Example:
Using two 1-of-16 decoders, design a circuit for decoding a
5-bit number
ECT 224 Digital Computer [email protected]
LSN 5 – Encoders
• Creates a bit representation for a particular digit
(decimal, octal, etc.)
– Each input when active will create an unique output bit
pattern
• Decimal to BCD encoders
ECT 224 Digital Computer [email protected]
LSN 5 – Multiplexers
• Device that takes digital information from several sources and routes it to a single output
– For n data selects there can be at most 2n data input lines
ECT 224 Digital Computer [email protected]
LSN 5 – Multiplexers
• The output of a mux is the product of the input and a specific input combination
S1 S2 Y
0 0
0 1
1 0
1 1
ECT 224 Digital Computer [email protected]
LSN 5 – Multiplexers
• Mux representation of a truth table
– Connect the inputs to the data select lines
– The associated outputs are connected to the data input lines
– Example:
Implement a truth table using a mux and demonstrate how the
output is the SOP representation in standard form
A B X
0 0 0
0 1 1
1 0 1
1 1 0
ECT 224 Digital Computer [email protected]
LSN 5 – Demultiplexers
• Takes digital information from one line and
distributes it to a given number of output lines
• Uses select input lines to guide the digital
information to desired output
– n data select lines can map data onto 2n output lines
ECT 224 Digital Computer [email protected]
LSN 5 – Homework
• Reading
– Chapter 5.1 – 5.4
– Chapter 6.1 – 6.5 and 6.7 – 6.8
• Assignment – HW7
– Chapter 5, problems 2, 5(d,e,f), 11(b,c,d), 20a, 22a
– Chapter 6, problems 2, 8, 15, 17(d,h), 22, 29, 35