+ All Categories
Home > Documents > M05 - 4DSP

M05 - 4DSP

Date post: 09-Apr-2017
Category:
Upload: mike-pochkowski
View: 126 times
Download: 0 times
Share this document with a friend
15
FMCs for improved project risk management and faster time to market Are you measuring the right metrics? Mike Pochkowski
Transcript

FMCs for improved project risk

management and faster time to market

Are you measuring the right metrics?

Mike Pochkowski

© Copyright 2014 4DSP LLC

Outline

2

FMC Overview

Features which motivate designers and integrators

Metrics

Metrics that motivate program managers, execs, and corporate stakeholders

Risk Minimization and Faster Time to Market Development

Strategy

FMC: A sure bet for a solution ready on time

© Copyright 2014 4DSP LLC

FMCs: Flexibility & Ease of System Development

3

Today’s FPGAs are really SoCs; Latest Gen offers

Current Technology FPGA

Logic Cells 326K–693K

CLB 408K–864K

Block RAM (kb) 27,000–52,920

DSP Slices 1,120–3,600

Serial Gbit Transceivers 28–80

User I/O 700–1,000

FPGA-FMC: The perfect combination for optimal performance and flexibility

Addresses the bandwidth, latency, and connectivity limitations of PMC and XMC

FMC ½ size of XMC; <10W of heat

Becoming easier to integrate FMC and FMC carrier cards from different vendors (VITA 57.2)

© Copyright 2014 4DSP LLC

FMCs: Flexibility & Ease of System Development

4

Applications

Intelligence Systems

Real-time Video

Processing

Surveillance

Reconnaissance

Counter Measures

Simply great for system upgrades and technology insertion

Customization – Easier to track new technologies as they become available

(higher resolution A/Ds and D/As)

Flexibility to reuse carrier, firmware, and software on new projects

Standardized engineering knowledge base while decreasing spin up time on new projects and programs

© Copyright 2014 4DSP LLC

Typical DAQ architecture

5

ANALOG TO DIGITAL CONVERSION

Filtering, Frequency Analysis,

Beamforming, etc…

MEM IF

M E M O R Y

ANALOG TO DIGITAL CONVERSION

A/D IF

A/D IF

HOST CPU IF

FPGA: Virtex-7

CPU HD

© Copyright 2014 4DSP LLC

Exploring a potential solution

6

© Copyright 2014 4DSP LLC

Exploring a potential solution

7

© Copyright 2014 4DSP LLC

Exploring a potential solution

8

© Copyright 2014 4DSP LLC

Exploring a potential solution

9

© Copyright 2014 4DSP LLC

Potential solution costs

10

SBC $5,000 FPGA Carrier $13,000 FMC 4 Ch 1Gsps $2,800 3U VPX Chassis $20,000 Hardware Subtotal $40,800 Firmware Design $23,077 Software Design $11,538 Engineering Labor Subtotal $34,615 Engineer overhead waiting to begin integration ($57,692)

© Copyright 2014 4DSP LLC

A complementary DAQ platform

11

© Copyright 2014 4DSP LLC

A risk mitigating schedule

12

© Copyright 2014 4DSP LLC

A program budget saving solution

13

VC707 $3,500 FMC 4 Ch 1Gsps $2,800 Dev Kit HW $6,300 Engineering Overhead $65,385 SW/FW Int & Test Pull In $30,769 Savings via dev kit approach $96,154

© Copyright 2014 4DSP LLC

FMCs: It’s becoming the standard

14

FMC sites are available on most Xilinx development boards

A/D, D/A, RF, Video, TI DSPs, touch screen, optical, etc…

70+ FMC and FMC carriers from a dozen vendors

Becoming easier to integrate FMC and FMC carrier cards from different vendors (VITA 57.2)

Reduces overall risk (shorter lead-times)

The best I/O approach outside of a monolithic solution

Effectively manage project budgets (cost effective solutions) for

the most demanding applications

© Copyright 2014 4DSP LLC

Thank you

15

Mike Pochkowski , Director of Business Development

Contact information:

[email protected]

http://www.4dsp.com

Thank you!


Recommended