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Magnetic Random Access Memory (MRAM ... - …jzhu/class/18200/F04/Lecture05_18200... · 1 24 August...

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1 24 August 2004 Magnetic Random Access Memory (MRAM) Jimmy Zhu ABB Professor in Engineering Department of Electrical and Computer Engineering Carnegie Mellon University J. Zhu, 18-200 Lecture, Fall 2004 2 Computer System Computer System Disk Drive CPU SRAM TLB SRAM DRAM L1 Cache L2 Cache Main Memory Archival Memory Volatile Memory Non-Volatile Memory
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  • 1

    24 August 2004

    Magnetic Random Access Memory (MRAM)Magnetic Random Access Memory (MRAM)

    Jimmy ZhuABB Professor in Engineering

    Department of Electrical and Computer EngineeringCarnegie Mellon University

    J. Zhu, 18-200 Lecture, Fall 2004 2

    Computer SystemComputer System

    DRAM

    SRAM

    Disk Drive

    CPU

    SRAM

    TLB

    SRAM

    DRAM

    L1 Cache

    L2 Cache

    Main Memory

    Archival Memory

    Volatile Memory

    Non-Volatile Memory

  • 2

    J. Zhu, 18-200 Lecture, Fall 2004 3

    Static RAM (SRAM)

    6-Transistor CMOS SRAM Access time: < 1 ns

    Expensive:

    Fast:

    Cache Memory

    $100 / MByte

    Low Density:

    >120 F2

    F -- minimum fabrication feature size

    = 10-9 second

    J. Zhu, 18-200 Lecture, Fall 2004 4

    Field Effect Transistor (FET)

    symbol

    D

    S

    G Source

    Gate

    Drain n+n+ p

    n-channel FET

    Conducting metal plate

    Insulating oxide layer

    Semiconductor

    Conducting ground

    MOSFET: Metal-Oxide-semiconductor-FET

  • 3

    J. Zhu, 18-200 Lecture, Fall 2004 5

    electron with charge e

    http://www.pbs.org/transistor/science/info/transmodern.html

    TGG VV >

    Source

    Gate

    Drain

    n+n+

    ++ + + + + + +

    DI

    p

    DDV

    GGV

    n-channel FET

    S D

    G

    Active condition:

    TGS VV >i.e.

    S

    D

    GDR

    DDV

    Drain current will be a function of gate voltage.

    Di

    How a FET Works: Transistor On

    J. Zhu, 18-200 Lecture, Fall 2004 6

    How a FET Works: Transistor Off

    Source

    Gate

    Drain n+n+ p

    electron with charge e

    No current

    S

    DG

    DDD VV =

    DR

    DDV

    TGS VV


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