MAHALAKSHMI

ENGINEERING COLLEGE

TIRUCHIRAPALLI-621213.

QUESTION BANK

SEMESTER : V DEPARTMENT: EEE

SUBJECT NAME: POWER ELECTRONICS SUBJECT CODE: EE2301

UNIT 1- POWER SEMICONDUCTOR DEVICES

PART A (2 Marks)

1. Compare MOSFET and IGBT (AUC MAY 13)

2. Draw the two transistor model of SCR and mark all the currents (AUC MAY 13)

3. What is the limitation of high frequency operation of a power device. (AUC MAY 13)

Switching losses will be high

Switching stress is high

Harmonics in distortion is increased.

4. What is the use of snubber circuit.(AUC MAY 13)

It is used to prevent the device from dv/dt.

It provides the path for sudden current rise due to sudden voltage rise across the

device.

5. Define Latching Current (AUC NOV 12, MAY 08)

The latching current is the minimum current, above which the SCR gets conducted into

the forward conduction state. So current higher than the latching current is to be applied

to the SCR to make it to conduct in the forward conducting region.

6. Why are IGBT becoming popular in their applications to controlled converters?

(AUC NOV 12)

IGBT has high input impedance like a MOSFET and low on state power loss as in BJT.

Moreover IGBT is free from secondary breakdown as in BJT. So IGBT has the

advantages of both MOSFET & BJT. Hence it is becoming popular in the applications of

controlled devices.

7. What are the parameters involved in switching loss of a power device

(AUC MAY 11)

Conduction losses which involve dissipation losses through resistors, on time losses, off

time losses are involved in all devices and reverse recovery time losses involved in

diodes.

8. What are the methods to turn ON the SCR (AUC MAY 11)

Forward voltage triggering

Gate triggering

dv/ dt triggering

temperature triggering

light triggering

9. In TRIAC which of the modes the sensitivity is high (AUC NOV 11)

Sensitivity of TRIAC is greatest in I quadrant when turned on with positive gate current

and also in III quadrant when turned on with negative gate current.

10. Define the term pinch off voltage of MOSFET (AUC MAY 12, NOV 11)

In the drain characteristics as Vds increases at one point Id remains constant and this

current is referred to as drain source saturation current Idss. At this point the channel

appears as pinch off. The drain source voltage corresponding to this point is called pinch

off voltage.

11. What are the advantages of MOSFET over BJT (AUC MAY 08)

S. No MOSFET BJT

1. Lower switching losses Higher switching losses

2. More conduction losses Low conduction losses

3. Voltage controlled device Current controlled device

4. Operating frequency is MHz Operating frequency is KHz

5. Secondary breakdown does not occur

Has secondary breakdown.

PART B (16, 8 Marks)

1. Sketch the switching characteristics of a thyristor during its turn ON and turn OFF

process. Show the variation of voltage across the thyristor and current through it during

these two dynamic processes. Indicate clearly the various intervals into which turn ON

and turn OFF times can be subdivided. Discuss briefly the nature of these curves.

(AUC MAY 13)

Switching Characteristics of a Thyristor During Turn on and Turn off process a thyristor is subjected to different voltages across

it and different currents through it. The time variations of the voltage across a thyristor

and the current through it during Turn on and Turn off constitute the switching

characteristics of a thyristor.

Turn on Switching Characteristics A forward biased thyristor is turned on by applying a positive gate voltage between the

gate and cathode as shown in below figure.

+ -

i g vAK

iA

t Vi

ig

R

iA 0.9 ION

ION

0.1 ION

t

Firing angle

α Vi

vAK 0.9 VON

vAK iA

VON Expanded scale

0.1 VON

t

tON

d rtp

Fig. 4.10: Turn on characteristics of a thyristor.

The figure shows the waveforms of the gate current (ig), anode current (iA) and anode cathode

voltage (VAK) in an expanded time scale during Turn on. The reference circuit and the

associated waveforms are shown in the inset. The total switching period being much smaller

compared to the cycle time, iA and VAK before and after switching will appear flat.

As shown in Figure above there is a transition time “tON” from forward off state to forward on

state. This transition time is called the thyristor turn of time and can be divided into three

separate intervals namely, (i) delay time (td) (ii) rise time (tr) and (iii) spread time (tp). These

times are shown in Figure for a resistive load.

Delay time (td): After switching on the gate current the thyristor will start to conduct over the

portion of the cathode which is closest to the gate. This conducting area starts spreading at a

finite speed until the entire cathode region becomes conductive. Time taken by this process

constitute the turn on delay time of a thyristor. It is measured from the instant of application of

the gate current to the instant when the anode current rises to 10% of its final value (or VAK falls

to 90% of its initial value). Typical value of “td” is a few micro seconds.

Rise time (tr): For a resistive load, “rise time” is the time taken by the anode current to rise from

10% of its final value to 90% of its final value. At the same time the voltage VAK falls from 90% of

its initial value to 10% of its initial value. However, current rise and voltage fall characteristics

are strongly influenced by the type of the load. For inductive load the voltage falls faster than the

current. While for a capacitive load VAK falls rapidly in the beginning. However, as the current

increases, rate of change of anode voltage substantially decreases.

If the anode current rises too fast it tends to remain confined in a small area. This can give rise

to local “hot spots” and damage the device. Therefore, it is necessary to limit the rate of rise of

the

ON state current diA/dt by using an inductor in series with the device. Usual values of maximum

allowable diA/dt is in the range of 20-200 A/μs.

Spread time (tp): It is the time taken by the anode current to rise from 90% of its final value to

100%. During this time conduction spreads over the entire cross section of the cathode of the

thyristor. The spreading interval depends on the area of the cathode and on the gate structure

of the thyristor.

Turn off Switching Characteristics

Once the thyristor is on, and its anode current is above the latching current level the gate loses

control. It can be turned off only by reducing the anode current below holding current. The turn

off time tq of a thyristor is defined as the time between the instant anode current becomes zero

and the instant the thyristor regains forward blocking capability. If forward voltage is applied

across the device during this period the thyristor turns on again.

During turn off time, excess minority carriers from all the four layers of the thyristor must be

removed. Accordingly tq is divided in to two intervals, the reverse recovery time (trr) and the gate

recovery time (tqr). The below figure shows the variation of anode current and anode cathode

voltage with time during turn off operation on an expanded scale.

The anode current becomes zero at time t1 and starts growing in the negative direction with the

same diA/dt till time t2. This negative current removes excess carriers from junctions J1 & J3. At

time t2 excess carriers densities at these junctions are not sufficient to maintain the reverse

current and the anode current starts decreasing. The value of the anode current at time t2 is

called the reverse recovery current (Irr). The reverse anode current reduces to the level of

reverse saturation current by t3. Total charge removed from the junctions between t1 & t3 is

called the reverse recovery charge (Qrr). Fast decaying reverse current during the interval t2 t3

coupled with the diA/dt limiting inductor may cause a large reverse voltage spike (Vrr) to appear

across the device. This voltage must be limited below the VRRM rating of the device. Up to time t2

the voltage across the device (VAK) does not change substantially from its on state value.

However, after the reverse recovery time, the thyristor regains reverse blocking capacity and

VAK starts following supply voltage vi. At the end of the reverse recovery period (trr) trapped

charges still exist at the junction J2 which prevents the device from blocking forward voltage just

after trr. These trapped charges are removed only by the process of recombination. The time

taken for this recombination process to complete (between t3 & t4) is called the gate recovery

time (tgr). The time interval tq = trr + tgr is called “device turn off time” of the thyristor.

No forward voltage should appear across the device before the time tq to avoid its inadvertent

turn on. A circuit designer must provide a time interval tc (tc > tq) during which a reverse voltage

is applied across the device. tc is called the “circuit turn off time”.

The reverse recovery charge Qrr is a function of the peak forward current before turn off and its

rate of decrease diA/dt . Manufacturers usually provide plots of Qrr as a function of diA dt for

different values of peak forward current. They also provide the value of the reverse recovery

current Irr for a given IA and diA/dt . Alternatively Irr can be evaluated from the given Qrr

characteristics following similar relationships as in the case of a diode.

As in the case of a diode the relative magnitudes of the time intervals t1 t2 and t2 t3 depends on

the construction of the thyristor. In normal recovery “converter grade” thyristor they are almost

equal for a specified forward current and reverse recovery current. However, in a fast recovery

“inverter grade” thyristor the interval t2 t 3 is negligible compared to the interval t1 t2. This helps

reduce the total turn off time tq of the thyristor (and hence allow them to operate at higher

switching frequency). However, large voltage spike due to this “snappy recovery” will appear

across the device after the device turns off. Typical turn off times of converter and inverter grade

thyristors are in the range of 50-100 μs and 5-50 μs respectively.

As has been mentioned in the introduction thyristor is the device of choice at the very highest

power levels. At these power levels (several hundreds of megawatts) reliability of the thyristor

power converter is of prime importance. Therefore, suitable protection arrangement must be

made against possible overvoltage, over current and unintended turn on for each thyristor. At

the highest power level (HVDC transmission system) thyristor converters operate from network

voltage levels in excess of several hundreds of kilo volts and conduct several tens of kilo amps

of current. They usually employ a large number of thyristors connected in series parallel

combination. For maximum utilization of the device capacity it is important that each device in

this series parallel combination share the blocking voltage and on state current equally. Special

equalizing circuits are used for this purpose.

2. With a neat diagram explain the turn ON process of TRIAC (AUC MAY 13)

The TRIAC

The Triac is a member of the thyristor family. But unlike a thyristor which conducts only in one

direction (from anode to cathode) a triac can conduct in both directions. Thus a triac is similar to

two back to back (anti parallel) connected thyristor but with only three terminals. As in the case

of a thyristor, the conduction of a triac is initiated by injecting a current pulse into the gate

terminal. The gate looses control over conduction once the triac is turned on. The triac turns off

only when the current through the main terminals become zero. Therefore, a triac can be

categorized as a minority carrier, a bidirectional semi -controlled device. They are extensively

used in residential lamp dimmers, heater control and for speed control of small single phase

series and induction motors.

Construction and operating principle

The below figure (a) and (b) show the circuit symbol and schematic cross section of a triac

respective. As the Triac can conduct in both the directions the terms “anode” and “cathode” are

not used for Triacs. The three terminals are marked as MT1 (Main Terminal 1), MT2 (Main

Terminal 2) and the gate by G. As shown in Fig (b) the gate terminal is near MT1 and is

connected to both N3 and P2 regions by metallic contact. Similarly MT1 is connected to N2 and

P2 regions while MT2 is connected to N4 and P1 regions.

MT1

N2

MT2 P2

N2

G

N3

P2

N3 P2 N1

G N1

P1

MT1

(a) N4 P1

MT2 (b)

Circuit symbol and schematic construction of a Triac (a) Circuit symbol (b) Schematic construction.

Since a Triac is a bidirectional device and can have its terminals at various combinations of

positive and negative voltages, there are four possible electrode potential combinations as given

below

1. MT2 positive with respect to MT1, G positive with respect to MT1

2. MT2 positive with respect to MT1, G negative with respect to MT1

3. MT2 negative with respect to MT1, G negative with respect to MT1

4. MT2 negative with respect to MT1, G positive with respect to MT1

The triggering sensitivity is highest with the combinations 1 and 3 and are generally used.

However, for bidirectional control and uniforms gate trigger mode sometimes trigger modes 2

and 3 are used. Trigger mode 4 is usually averded. Fig (a) and (b) explain the conduction

mechanism of a triac in trigger modes 1 & 3 respectively.

In trigger mode-1 the gate current flows mainly through the P2 N2 junction like an ordinary

thyristor. When the gate current has injected sufficient charge into P2 layer the triac starts

conducting through the P1 N1 P2 N2 layers like an ordinary thyristor.

In the trigger mode-3 the gate current Ig forward biases the P2 P3 junction and a large number of

electrons are introduced in the P2 region by N3. Finally the structure P2 N1 P1 N4 turns on

completely.

G

IG

MT1

( - )

IG N2

P2

N1

P1

MT2

( + )

(a)

IG

MT1 ( + )

N3 IG

P2

N1

P1

N4

MT2 ( - )

(b)

Conduction mechanism of a triac in trigger modes 1 and 3

(a) Mode – 1 , (b) Mode – 3 .

Steady State Output Characteristics and Ratings of a Triac

I

Ig3 > Ig2 > Ig1 > Ig = 0

-VBO

Ig = 0

VBO V

-Ig3 < Ig2 < Ig1

Steady state V – I characteristics of a Triac

From a functional point of view a triac is similar to two thyristors connected in anti parallel.

Therefore, it is expected that the V-I characteristics of Triac in the 1st and 3rd quadrant of the V-I

plane will be similar to the forward characteristics of a thyristors. As shown in Fig. 4.14, with no

signal to the gate the triac will block both half cycle of the applied ac voltage provided its peak

value is lower than the break over voltage (VBO) of the device. However, the turning on of the

triac can be controlled by applying the gate trigger pulse at the desired instance. Mode-1

triggering is used in the first quadrant where as Mode-3 triggering is used in the third quadrant.

As such, most of the thyristor characteristics apply to the triac (ie, latching and holding current).

However, in a triac the two conducting paths (from MT1 to MT2 or from MT1 to MT1) interact with

each other in the structure of the triac. Therefore, the voltage, current and frequency ratings of

triacs are considerably lower than thyristors. At present triacs with voltage and current ratings of

1200V and 300A (rms) are available. Triacs also have a larger on state voltage drop compared

to a thyristor. Manufacturers usually specify characteristics curves relating rms device current

and maximum allowable case temperature as shown in the above figure. Curves relating the

device dissipation and RMS on state current are also provided for different conduction angles.

3. Explain the switching characteristics of IGBT with a neat circuit diagram and waveforms

(AUC MAY 11)

Switching characteristics of IGBT

Switching characteristics of the IGBT will be analyzed with respect to the clamped

inductive switching circuit shown in (a). The equivalent circuit of the IGBT shown in Fig

(b) will be used to explain the switching waveforms.

VCC

C

iL iD

iC

DF D

+ CGD

Rg ig C VCE

G

G Q1 S

E

-

CgE E

Vgg

(a)

(b)

Inductive switching circuit using an IGBT 4. (a) Switching circuit; (b) Equivalent circuit of the IGBT The switching waveforms of an IGBT is, in many respects, similar to that of a Power

MOSFET. This is expected, since the input stage of an IGBT is a MOSFET as shown in

Fig (b). Also in a modern IGBT a major portion of the total device current flows through

the MOSFET. Therefore, the switching voltage and current waveforms exhibit a strong

similarity with those of a MOSFET. However, the output p-n-p transistor does have a

significant effect on the switching characteristics of the device, particularly during turn

off. Another important difference is in the gate drive requirement. To avoid dynamic latch

up, (to be discussed later) the gate emitter voltage of an IGBT is maintained at a

negative value when the device is

off.

Switching Waveforms of IGBT

The switching waveforms of an IGBT is shown in the above figure. Similarity of these

waveforms with those of a MOSFET is obvious. To turn on the IGBT the gate drive voltage

changes from –Vgg to +Vgg. The gate emitter voltage vgE follows Vgg with a time constant τ1.

Since the drain source voltage of the drive MOSFET is large the gate drain capacitor assumes

the lower value CGD1. The collector current ic does not start increasing till vgE reaches the

threshold voltage vgE(th). Thereafter, ic increases following the transfer characteristics of the

device till vgE reaches a value vgEIL corresponding to ic = iL. This period is called the current rise

time tri. The free wheeling diode current falls from IL to zero during this period. After ic reaches IL,

vgE becomes clamped at vgE IL similar to a MOSFET. vCE also starts falling during this period.

First vCE falls rapidly (tfv1) and afterwards the fall of vCE slows down considerably. Two factors

contribute to the slowing down of voltage fall. First the gate-drain capacitance Cgd will increase

in the MOSFET portion of the IGBT at low drain-source voltages. Second, the pnp transistor

portion of the IGBT traverses the active region to its on state more slowly than the MOSFET

portion of the IGBT. Once the

pnp transistor is fully on after tfv2, the on state voltage of the device settles down to vCE(sat). The

turn ON process ends here.

The turn off process of an IGBT follows the inverse sequence of turn ON with one major

difference. Once vgE goes below vgE(th) the drive MOSFET of the IGBT equivalent circuit turns

off. During this period (tfi1) the device current falls rapidly. However, when the drive MOSFET

turns off, some amount of current continues of flow through the output p- n-p transistor due to

stored charge in its base. Since there is no reverse voltage applied to the IGBT terminals that

could generate a negative drain current, there is no possibility for removing the stored charge by

carrier sweep-out. The only way these excess carriers can be removed is by recombination

within the IGBT. During this recombination period (tfi2) the remaining current in the IGBT decays

relatively slowly forming a current fail. A long tfi2 is undesirable, because the power dissipation

in this interval will be large due to full collector-emitter voltage. tfi2 can be reduced by decreasing

the excess carrier life time in the p-n-p transistor base. However, in the process, on state losses

will increase. Therefore, judicious design trade offs are made in a practical IGBT to give

minimum total loss.

The gate drive circuit of an IGBT should ensure fast and reliable switching of the device. In

particular, it should.

• Apply maximum permissible VgE during ON period.

• Apply a negative voltage during off period.

• Control dic dt during turn ON and turn off to avoid excessive Electro magnetic interference (EMI).

• Control dvce dt during switching to avoid IGBT latch up.

• Minimize switching loss.

• Provide protection against short circuit fault.

SSathya Priyadharshini. Asst. Prof./EEE 15

UNIT 2 – PHASE RECTIFIED CONTROLLERS

PART A (2 Marks)

1. Define Displacement factor & Current harmonic factor. Give the displacement

factor for two pulse inverter. (AUC MAY 13)

2. What is current turn off time for single phase full converter? (AUC NOV 11)

3. Under what conditions a single phase fully controlled converter gets operated

as inverter (AUC MAY 12)

4. Define total harmonic distortion. (AUC MAY 12)

5. What is inversion mode of converters? (AUC NOV 12)

6. Why is power factor of semi converter better than full converter (AUC NOV

12)

7. Write any four performance parameters of phase controlled rectifiers. (AUC

MAY 11)

SSathya Priyadharshini. Asst. Prof./EEE 16

8. What is a Dual Converter? (AUC MAY 11)

9. Write two difference between a single phase full converter and a semi

converter

(AUC NOV 11)

10. What do mean by Line Commutated Inverter? (AUC NOV 11)

11. Draw the circuit diagram of single phase Dual converter. (AUC NOV 10)

12. Define voltage and current ripple factor. (AUC NOV 10)

13. What is Inversion mode of converters? (AUC MAY 08)

14. Why is the power factor of semi converter better than full converter. (AUC

MAY 08)

PART B (16, 8 Marks)

1. Sketch the switching characteristics of a Thyristor during its Turn on &

Turn off processes. Show the variation of voltage across the thyristor

and current through it during these two dynamic processes. Indicate

clearly the various intervals into which turn on & turn off times can be

subdivided. Discuss briefly the nature of these two curves. (AUC MAY

13)

2. With a neat diagram explain the turn on process of TRIAC. (AUC MAY

13)

3. With necessary circuits & waveforms, explain the operation of 6 pulse

converter. Derive the expression for average output voltage in it.

(AUC MAY 12)

SSathya Priyadharshini. Asst. Prof./EEE 17

4. A single phase two pulse bridge converter feeds power to RLE load with

R=6Ω, L=6mH, E=60V. AC source voltage is 230V, 50Hz for continuous

conduction. Find the average value of load current for a firing angle of

50o. in case one off the 4 SCRs gets open circuited, find the new value

of average load current assuming the output current as continuous.

(AUC MAY 12).

5. Explain the operation of 3 phase semi converter with a neat diagram.

(AUC NOV 12)

6. A 220V, 1kW reistive load is supplied by 220V, 50Hz source through

single phase fully controlled rectifier. Determine the following for 800W

output.

Output voltage

RMS value of input current

Fundamental component of input current

Displacement factor (AUC NOV 12)

7. Explain the operation of three phase full converter with R load for the

firing angle of 60o, 90o & 150o. (AUC NOV 11)

8. Explain the operation of single phase full bridge converter with RL load

for continuous and discontinuous load current. (AUC NOV 11)

9. A single phase full bridge converter is connected to R load. The source

voltage is of 230V, 50 Hz. The average load current is 10A. For 10Ω

find the firing angle. (AUC NOV 11)

10. Discuss the effects of source inductance on the performance of a

single phase full converter indicating clearly the conduction of various

thyristors during one cycle. Derive the expression for its output voltage.

(AUC MAY 11)

11. Explain the principle of single phase Dual converter with a neat

diagram. (AUC MAY 11)

SSathya Priyadharshini. Asst. Prof./EEE 18

12. Describe the operation of single phase two pulse bridge converter using

4 SCRs with relevant waveforms. (AUC NOV 10)

13. A single phase semi converter is operated from 120V, 50Hz supply. The

load current with average value Idc is continuous and ripple free for

firing angle α=π/6. Determine, (AUC NOV 10)

Displacement factor

Harmonic factor

Input power factor

14. write note on battery charger. (AUC NOV 10)