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MAX 5V R=1K

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Experiment 1 Module I Tutorial I Wave Shaping Circuits Objectives: To Design and test the clipping and clamping circuits Case 1: Demonstrate a positive, negative source signal clipping circuits to clip the input AC waveforms in series and shunt ways. Use a DC source of 5V. Design Steps: Use diode 1N4007, with maximum current IMAX=5mA along with a DC source of VDC=5V Use a sine wave source of 10V peak. Maximum diode current IMAX=5mA= −5 = 10−5 R=1KΩ. Clipping Circuits: Procedure: Place the components on bread board, and connect them as shown in the circuit diagram. Set the source to supply a sine wave of 10 V peak and 1 KHz frequency. Set the DC voltage to 5 V in case of the cases Connect the input and output of the circuit to the two channels of the CRO to observe the input and output waveforms. Measure the voltage amplitude, clipping voltage using CRO.(Note: Both the channel ground should be common) Set the CRO to display in XY mode to observe the transfer characteristics.(both the channels are set to same attenuation factor) Repeat the same for all the clipping circuits. R=1K Vi 5V V O Fig 1.1 R=1K Vi 5V V O Fig 1.3
Transcript
Page 1: MAX 5V R=1K

Experiment 1 Module I Tutorial I

Wave Shaping Circuits Objectives: To Design and test the clipping and clamping circuits Case 1: Demonstrate a positive, negative source signal clipping circuits to clip the input AC waveforms in series and shunt ways. Use a DC source of 5V. Design Steps: Use diode 1N4007, with maximum current IMAX=5mA along with a DC source of VDC=5V Use a sine wave source of 10V peak.

Maximum diode current IMAX=5mA= 𝑣𝑖𝑀𝐴𝑋−5

𝑅= 10−5

𝑅 R=1KΩ.

Clipping Circuits: Procedure:

Place the components on bread board, and connect them as shown in the circuit diagram.

Set the source to supply a sine wave of 10 V peak and 1 KHz frequency. Set the DC voltage to 5 V in case of the cases Connect the input and output of the circuit to the two channels of the CRO to

observe the input and output waveforms. Measure the voltage amplitude, clipping voltage using CRO.(Note: Both the channel ground should be common)

Set the CRO to display in XY mode to observe the transfer characteristics.(both the channels are set to same attenuation factor)

Repeat the same for all the clipping circuits.

R=1K

Vi

5V

VO

Fig 1.1

R=1KVi

5V

VO

Fig 1.3

Page 2: MAX 5V R=1K

Case 2: Design a clipper circuit to clip the input signal between two independent levels (VR1=5V> VR2=2V). Design steps: Use R=1K and Vi=10sin (2000𝜋t)

Procedure: Connect the circuit on the breadboard as shown in the circuit diagram. Set the source to supply a sine wave of 10 V peak and suitable frequency. Connect the input and output of the circuit to the two channels of the CRO to

observe the input and output waveforms. Measure the voltage amplitude, clipping voltage using CRO.

Set the CRO to display in XY mode to observe the transfer characteristics. Repeat the same for all the clipping circuits.

Case 3: Demonstrate a positive, negative and biased source signal clamping circuits to clamp the input square waveforms .Use a DC source of 3V. Study of clamping circuits Procedure:

Use the breadboard to place and connect the components as shown in circuit diagram.

Switch on the circuit and the function generator and set the waveforms to required amplitude of 10V P-P and frequency of 1 kHz.

vi

R

VR

1=

5V

VR

2=

2V

D1D2

V0

Fig 1.5

0.47uF

Vi

Vo

Fig 1.6

0.47uF

Vi

Vo

3V

Fig 1.7

Page 3: MAX 5V R=1K

Use two channels of the CRO to observe the input and output of the circuit waveform. (in DC mode only)

Repeat the procedure for all the other circuits.

Observation/Conclusion:

Assignment:

1. Change the VR2= -2Vin the circuit shown in fig 1.5, observe the output waveform and

transfer characteristic. Hence write the conclusion

2. Reverse the bias voltage (VDC= -3V) in the circuit shown in fig 1.7 and 1.8, observe the output wave form and give the reason.

3. Simulate all the circuits in tutorial 1 (Figure 1.1 to Figure 1.9) using PSpice schematics.

Perform the time domain (transient) analysis. Compare the test and simulated results.

Fig 1.4

R=1KVi

5V

VO

R=1K

Vi

5V

VO

Fig 1.2

0.47uF

Vi

Vo

3V

Fig 1.9Fig 1.8

0.47uF

Vi

Vo

Page 4: MAX 5V R=1K

w x y z

1 2 1

2

3

3 4

5 6

9 8

1

1213

34

5

2

6

1

2

3 4

5

6

EXPERIMENT 2

Module II

DIGITAL SYSTEM DESIGN USING SSI/MSI

Tutorial 1

Combinational Circuit Design Using Logic Gates

Objectives: To design, build and test simple combinational circuits using logic gates

1. Realize the Boolean function f (W, X, Y, Z) = ∑m (1, 3, 5, 7, 8, 12, 14) using

(i) basic gates (ii) only NAND gates

Sample solution:

i) ICs required: IC7404(1 No), IC 7411(1 No), IC7408(1 No), IC7432(1 No)

2. Design an Excess-3 to BCD code converter and implement using residual gates

Sample Solution:

a) Block diagram defining the inputs & outputs

CODE

CONVERTOR

EXCESS -3 BCD

Page 5: MAX 5V R=1K

a) Truth Table

Assumption: Illegal inputs do not occur.

Excess-3 BCD E3 E2 E1 E0 B3 B2 B1 B0 0 0 1 1 0 0 0 0 0 1 0 0 0 0 0 1 0 1 0 1 0 0 1 0 0 1 1 0 0 0 1 1 0 1 1 1 0 1 0 0 1 0 0 0 0 1 0 1 1 0 0 1 0 1 1 0 1 0 1 0 0 1 1 1 1 0 1 1 1 0 0 0 1 1 0 0 1 0 0 1

b) Output logic expressions

B3 (E3, E2, E1, E0) = (11, 12)

B2 (E3, E2, E1, E0) = (7, 8, 9, 10)

B1 (E3, E2, E1, E0) = (5, 6, 9, 10)

B0 (E3, E2, E1, E0) = (4, 6, 8, 10, 12)

c) Minimize using Karnaugh Maps

e) Minimized logic functions

013233EEEEEB

02120122 EEEEEEEB

01011EEEEB

00EB

f) Draw the Circuit diagram

Page 6: MAX 5V R=1K

g) List the Components used.

3. Design a 3-bit binary adder ( full adder ) and a 3-bit ( full-subtractor) binary

subtractor.

Assignments:

Simulate the following circuits using OrCAD PSpice

1. Realize the Boolean function f (W, X, Y, Z) = ∑m (1, 3, 5, 7, 8, 12, 14) using only NOR

gates.

2. Design a 2 bit binary magnitude comparator and realize it using minimum number of

gates.

3. Design an BCD to Gray code converter and implement using residual gates.

Page 7: MAX 5V R=1K

APPENDIX A

List of components available in the Integrated Electronics Laboratory

Low Power Resistors

¼ W

4.7ohm 10ohm 33ohm 47ohm 100ohm

150ohm 180ohm 220ohm 330ohm 470ohm

560ohm 680ohm 820ohm 1kohm 1.2kohm

1.5kohm 1.8kohm 2.2kohm 3.3kohm 4.7kohm

5.6kohm 6.8kohm 8.2kohm 10kohm 12kohm

15kohm 18kohm 22kohm 33kohm 47kohm

56kohm 68kohm 82kohm 100kohm 120kohm

150kohm 180kohm 220kohm 330kohm 470kohm

560kohm 820kohm 1Mohm

1 W 10ohm 33ohm 47ohm 100ohm 150ohm

180ohm 220ohm 330ohm 470ohm 560ohm

680ohm 820ohm 1kohm 1.2kohm 1.5kohm

1.8kohm 2.2kohm 3.3kohm 4.7kohm 5.6kohm

6.8kohm 8.2kohm 10kohm 12kohm 15kohm

18kohm 22kohm 33kohm 47kohm 56kohm

68kohm 82kohm 100kohm 120kohm 150kohm

180kohm 220kohm 330kohm 470kohm 560kohm

820kohm 1Mohm

5 W 10ohm 33ohm 47ohm 100ohm

Potentiometers

100ohm 1K ohm 10 K ohm 25kohm 100kohm

Electrolyte Capacitors

2.2mf/63v 4.7mf/63v 10mf/63v 22mf/63v 47mf/63v

100mf/63v 220mf/63v 330mf/63v 470mf/63V 2200mf/63v

Ceramic Disc Capacitors

2.2kpf 3.3kpf 4.7kpf 100kpf 0.001mf

0.01mf 0.1mf 0.022mf 0.22mf 0.047mf 0.47mf

Low Power Zener Diodes

5.1V 0.5W 5.1 V/1.0W 6.8V/0.5 W 12.1V/1.0W

Low Power Diodes

IN4001 IN4007 BA159

Low Power Transistors

FET BFW-10 SL 100 SK100 BC 107 BC 547

BC 557 2N 3055 2N 3773 MOSFET-2N27000

3- Terminal Voltage Regulator IC’s

7805 7812 7815 7905 7912 7915 317

OP-Amp / Timer IC’s

741 555

Page 8: MAX 5V R=1K

Digital IC Pin Details and Functional Tables

7400 QUAD 2 INPUT NAND GATE

7402 QUAD 2 INPUT NOR GATE

Page 9: MAX 5V R=1K

7404 HEX INVERTER/NOT GATE

7408 QUAD 2 INPUT AND GATE

7410 TRIPLE 3 INPUT NAND GATE

Page 10: MAX 5V R=1K

7411 TRIPLE 3 INPUT AND GATE

7420 DUAL 4 INPUT NAND GATE

Page 11: MAX 5V R=1K

7421 DUAL 4 INPUT AND GATE

74LS30 -8 INPUT NAND GATE

7432 QUAD 2 INPUT OR GATE

Page 12: MAX 5V R=1K

7446/7447 BCD to Seven Segment Decoder

7473 DUAL J-K FLIP-FLOP

Page 13: MAX 5V R=1K

7474 DUAL D FLIP-FLOP

7486 QUAD 2 INPUT EXCLUSIVE OR GATE

Page 14: MAX 5V R=1K

7490 ASYNCHRONOUS DECADE COUNTER

74112 JK FLIP FLOP WITH PRESET AND CLEAR

Page 15: MAX 5V R=1K

74LS138/74LS139 -3:8 Decoder

Page 16: MAX 5V R=1K

74151 - 8:1 MULTIPLEXER

74153 - 4:1 MULTIPLEXER

Page 17: MAX 5V R=1K

74154 – 4:16 DECODER / DEMULTIPLXER

Inputs Outputs

G1 G2 D C B A 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

L L L L L L L H H H H H H H H H H H H H H H

L L L L L H H L H H H H H H H H H H H H H H

L L L L H L H H L H H H H H H H H H H H H H

L L L L H H H H H L H H H H H H H H H H H H

L L L H L L H H H H L H H H H H H H H H H H

L L L H L H H H H H H L H H H H H H H H H H

L L L H H L H H H H H H L H H H H H H H H H

L L L H H H H H H H H H H L H H H H H H H H

L L H L L L H H H H H H H H L H H H H H H H

L L H L L H H H H H H H H H H L H H H H H H

L L H L H L H H H H H H H H H H L H H H H H

L L H L H H H H H H H H H H H H H L H H H H

L L H H L L H H H H H H H H H H H H L H H H

L L H H L H H H H H H H H H H H H H H L H H

L L H H H L H H H H H H H H H H H H H H L H

L L H H H H H H H H H H H H H H H H H H H L

L H X X X X H H H H H H H H H H H H H H H H

H L X X X X H H H H H H H H H H H H H H H H

H H X X X X H H H H H H H H H H H H H H H H

Page 18: MAX 5V R=1K

74194 FOUR BIT BIDIRECTIONAL UNIVERSAL SHIFT REGISTER

LT-542 SEVEN SEGMENT DISPLAY (COMMON ANODE)

dp

d

g

a

f b

e c

a VCC g f b

c VCC e d dp

LT542

Page 19: MAX 5V R=1K

74LS283 FOUR BIT BINARY FULL ADDER WITH FAST CARRY

LOGIC FAMILIES OVERVIEW

Logic

family

Prop.

delay

Rise/fall

Time

Vihmin Vilmax Vohmin Volmax Noise

Margin 74 22ns 2.0V 0.8V 2.4V 0.4V 0.4V

74LS 15ns 2.0V 0.8V 2.7V 0.5V 0.3V

74F 5ns 2.3ns 2.0V 0.8V 2.7V 0.5V 0.3V

74AS 4.5ns 1.5ns 2.0V 0.8V 2.7V 0.5V 0.3V

74ALS 11ns 2.3ns 2.0V 0.8V 2.5V 0.5V 0.3V

ECL 1.45ns 0.35ns -1.165V -1.475V -1.025V -1.61V 0.135V

4000 250ns 19ns 3.5V 1.5V 4.95V 0.05V 1.45V

74C 90ns 3.5V 1.5V 4.5V 0.5V 1V

74HC 18ns 3.6ns 3.5V 1.0V 4.9V 0.1V 0.9V

74HCT 23ns 3.9ns 2.0V 0.8V 4.9V 0.1V 0.7V

74AC 9ns 1.5ns 3.5V 1.5V 4.9V 0.1V 1.4V

74ACT 9ns 1.5ns 2.0V 0.8V 4.9V 0.1V 0.7V

74AHC 3.7ns 3.85V 1.65V 4.4V 0.44V 0.55V

(Typical values for rough comparison only. Refer to data sheet, values valid for Vcc=5V)


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