ME 515 Mechatronics Digital...

ME 515 Mechatronics 10/5/2006

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ME 515 Mechatronics

Digital ElectronicsAsanga Ratnaweera

Department of Mechanical EngineeringFaculty of Engineering

University of PeradeniyaTel: 081239 (3627)

Email: [email protected]

5 October 2006 Asanga Ratnaweera, Department of Mechanical Engineering

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Introduction to Digital ElectronicsDigital circuits are evolved from transistor circuits being able to output at one of the two voltage levels depending on the levels at its inputs.The two levels, usually 0 or 5 V are the low and high signals and represented by 0 and 1. Therefore, binary number system is widely used with digital circuitry.


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Boolean Expressions, Logic Gates & Truth Tables

NOTZ = AA Z

0 1

1 0

ANDZ = A.BA B Z0 0 00 1 01 0 01 1 1

ORZ = A+BA B Z0 0 00 1 11 0 11 1 1

ZABBAZ ⊕= XOR

Z


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Boolean Expressions, Logic Gates & Truth Tables

NORZ = A+B A B Z0 0 10 1 01 0 01 1 0

FAF =F

BUF

ABF = NAND


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Commercial Logic ICs

21 3 4 5 6 7

1 4 1 3 1 2 11 1 0 9 8

+ V c c

G n d(0 V )

7408

21 3 4 5 6 7

1 4 1 3 1 2 1 1 1 0 9 8

+ V c c

G n d( 0 V )

7432


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Logic Families

0.1 mW8 mWActive power Cons.

10 MHz33 MHzMax. Op. frequency

-0.20.0001-0.40.02Current / mA

4.953.5 V2.72.0Voltage / V1 state

0.5-0.00018-0.4Current / mA

0.051.50.50.8Voltage / V0 state

OutputInputOutputInput

-0.02 mA-100 mAMax. supply current

5-15 V4.75-5.25 VSupply voltage

40XX or 74HCXX74XX, 74LSXXCode

CMOSTTLDescription


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Classification of Digital circuitsDigital electronics is classified as:

Combinational logic circuits Combination logic output depends only on the inputs levels.

Sequential logic circuits.The output of sequential logic depends on both stored levels and the input levels. Therefore, sequential logic is capable of “remembering” a particular state.


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Z = A.B.C

Z = A.B.C

Combinational logic circuits

1111

0011

1101

000101100010

01000000ZCBA

Therefore;

Z = A.B.C or A.B.C

Z = A.B.C + A.B.CTruth Table


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Combinational logic circuitsProducing Boolean expressions from truth table:

Find the 1s in the Z columnWrite the Boolean expression for each 1( logic high output)Write the expressions out in words, e.g. Z = ( A AND NOT B AND C) OR (A AND B AND C)Write out the inputs, e.g. A , B CDraw in any NOT gatesDraw in the AND gatesFinally draw in the OR gates if required


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1111

0011

1101

000101100010

01000000

ZCBA

A

B

C Z

Z = A.B.C + A.B.C


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Pin-out Diagrams & Drawing CircuitsYou must be able to select suitable logic ICs (chips) and draw in the connections for a given logic system. An example is given below. Don’t forget to draw in the connections for +Vcc ( the positive supply voltage) and 0v.Remember you don’t need to use all the logic gates in a chip – if you only need one, you only use one!


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21 3 4 5 6 7

14 13 12 11 10 9 8+Vcc

Gnd(0V)

21 3 4 5 6 7

14 13 12 11 10 9 8+Vcc

Gnd(0V)

OUTPUT

7408 7432

+Vcc

0v

Input AInput B


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Combinational logic circuitsBoolean simplification

De Morgan’s theorem

Karnaugh MapA grid of 2N squares where N is the number of input variables in the Boolean expressions. K-maps are usually used for minimization expressions with six or fewer variables

yxyx +=•

yxyx •=+

yxyx +=•

yxyx •=+


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Combinational logic circuitsEx: For three variables

Each square represents one mintermOnly one variable changes between adjacent squares The maps are constructed to “wrap” around so that top and bottom corresponding squares are adjacent


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For two variablesFor four variables

24 = 16


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Combinational logic circuitsFilling out K-Map

1

1 11

00

0

0

The adjacent squares that have “1”s are combined in groups of 2, 4 or 8.When squares can be chosen as several groups, the largest grouphas to be selected and each square should be used only once


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Combinational logic circuitsIdentify the variables which do not change within the cluster and write them down as a Boolean expression

1

1 11

00

0

0

X = BC +AC + AB

BC

ABAC


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Combinational logic circuitsMore examples

11111 0

01001 1

01000 1

11010 0

1 01 10 10 0CD

AB


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Design of Combination Logic circuits

Ex:Three push buttons are provided to turn on a machine in an automobile assembly plant. For safety purposes, the machine is to be turned on, only if at least two of the buttons are pushed. Obtain a suitable Logic Circuit.


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Applications of Combinational circuitsAdders / substructures

Half adder

Full adder


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Applications of Combinational circuitsEncoders

A binary encoder generates a binary code corresponding to the input value presented at its inputs

Ex: 8 bit encoderIf 5 is pressed, binary number 0000 0101 should be generated at the output of the encoder


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Applications of Combinational circuitsEncoders


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Applications of Combinational circuitsDecoders

A binary decoder converts binary information to discrete outputs.


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Applications of Combinational circuitsDecoders


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Applications of Combinational circuitsMultiplexers

A multiplexer selects binary information from one of many input lines and directs it to a single output line.


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Applications of Combinational circuitsMultiplexers


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Applications of Combinational circuits

De-multiplexersA de-multiplexer receives binary information on a single input line and passes this information to one of its many output lines.


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Sequential logic circuitsThe output of a sequential logic device depends on its present internal state and the present inputs.

Sequential logic device has some kind of memory of at least part of its ``history'' (i.e., its previous inputs).

The memory elements in a sequential circuit are called flip-flops.


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Flop-FlopsA flip-flop circuit can be constructed from two NAND gates or two NOR gates.


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Flop-FlopsClocked SR Flip-Flop

Information from the S and R inputs passes through to the basic flip-flop only when the clock pulse goes to 1. With both S=1 and R=1, the occurrence of a clock pulse causes both outputs to momentarily go to 0.


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Flop-FlopsD Flip-Flop

The D input goes directly into the S input and the complement of the D input goes to the R input. The D input is sampled during the occurrence of a clock pulse. If it is 1, the flip-flop is switched to the set state (unless it was already set). If it is 0, the flip-flop switches to the clear state.


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Flop-FlopsJK Flip-Flop

A JK flip-flop is a refinement of the SR flip-flop in that the indeterminate state of the SR type is defined in the JK type.


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Flop-FlopsT Flip-FlopThe T flip-flop is a single input version of the JK flip-flop. The output of the T flip-flop "toggles" with each clock pulse.


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Flop-FlopsTriggering of Flip-flops

The clock pulse goes through two signal transitions: from 0 to 1 and the return from 1 to 0. The positive transition is defined as the positive edge and the negative transition as the negative edge. These flip-flops are termed edge-triggered flip-flops


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Triggering of Flip-flopsEdge-triggered flip-flops

Ex: Positive edge triggered SR flip-flop

Truth table Timing diagram


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Triggering of Flip-flopsLevel-triggered flip-flops

Level-triggered flip-flops respond to their inputs while the clock signal is at a high level and retain their output values after the level change

Timing diagram Truth table


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Clock pulse generation555 timer


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Clock pulse generation


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T = 0.7 × (R1 + 2R2) × C1f = 1.4

(R1 + 2R2) × C1T = time period in seconds (s) f = frequency in hertz (Hz) R1 = resistance in ohms ( ) R2 = resistance in ohms ( ) C1 = capacitance in farads (F)The time period can be split into two parts:

T = Tm + TsMark time (output high): Tm = 0.7 × (R1 + R2) × C1Space time (output low): Ts = 0.7 × R2 × C1


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Flop-Flop ICsFlip-flops are commercially available as IC packages


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State MachineA state machine is a device that stores the status of something at a given time and can operate on input to change the status and/or cause an action or output to take place for any given change.

Ex: computer.


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State MachineEx: Design of a modulo-4 up-down counter

State transition diagram

00 01

11 10

1

0

10

1

0

1 0


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Design of an up-down counter

Ex: Design of a modulo-4 up-down counterState Table

01101001

Next state / Q1

01111011010110010110101001001000

Next state / Q2

Current state / q2

Current state / q1

Inputx


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Design of an up-down counter

Ex: Design of a modulo-4 up-down counterState Transition Table with SR flip flops

01010101

Q2

0d10d001

S1

100d01d0

R1

01010101

S2

10101010

R2

01101001

Q1

111011101001110010100000

q2q1x


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Design of an up-down counterUse K-maps for simplification


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Design of an up-down counterLogic circuit


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Applications of Digital ElectronicsBinary counters


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Applications of Digital ElectronicsDecade counters

Use to perform binary countingA negative edge-triggered counter and the output is binary coded decimal (BCD) consists of four bits. Ex: LS 7490 IC

Output sequence


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Timing diagram

Remember: this is a negative edge-triggered counter


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Applications of Digital Electronics

Decade countersBCD counters can be cascaded in order to count in powers of 10. Output D can be used as the clock input for the second decade counter (7490)Cascading two together in order to raise the range for counting from 0 to 99.


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Note:IC 7447 negative logic seven segment LED code(LED Switches ON when output is low)


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Applications of Digital ElectronicsData registers


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Applications of Digital ElectronicsSerial & Parallel Interfaces


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Applications of Digital ElectronicsSerial & Parallel Interfaces

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